/* 
* This file is part of STiD135 OXFORD LLA 
* 
* Copyright (c) <2014>-<2018>, STMicroelectronics - All Rights Reserved 
* Author(s): Mathias Hilaire (mathias.hilaire@st.com), Thierry Delahaye (thierry.delahaye@st.com) for STMicroelectronics. 
* 
* License terms: BSD 3-clause "New" or "Revised" License. 
* 
* Redistribution and use in source and binary forms, with or without 
* modification, are permitted provided that the following conditions are met: 
* 
* 1. Redistributions of source code must retain the above copyright notice, this 
* list of conditions and the following disclaimer. 
* 
* 2. Redistributions in binary form must reproduce the above copyright notice, 
* this list of conditions and the following disclaimer in the documentation 
* and/or other materials provided with the distribution. 
* 
* 3. Neither the name of the copyright holder nor the names of its contributors 
* may be used to endorse or promote products derived from this software 
* without specific prior written permission. 
* 
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
* 
*/ 
#ifndef _PWM_REG_REG_INIT_H
#define _PWM_REG_REG_INIT_H

/* -------------------------------------------------------------------------
 * File name  : pwm_reg_reg_init.h
 * File type  : C header file
 * -------------------------------------------------------------------------
 * Description:  Register map constants
 * Generated by spirit2regtest v2.24_alpha3
 * -------------------------------------------------------------------------
 */


/* Register map constants */

/* PWM_VAL0 */
#define RSTID135_PWMTIMER_PWM_VAL0                                   0x00000000
#define RSTID135_PWMTIMER_PWM_VAL0__DEFAULT                          0x0       
#define FSTID135_PWMTIMER_PWM_VAL0_PWM_VAL__MASK                     0xFF      

/* PWM_VAL1 */
#define RSTID135_PWMTIMER_PWM_VAL1                                   0x00000004
#define RSTID135_PWMTIMER_PWM_VAL1__DEFAULT                          0x0       
#define FSTID135_PWMTIMER_PWM_VAL1_PWM_VAL__MASK                     0xFF      

/* PWM_VAL2 */
#define RSTID135_PWMTIMER_PWM_VAL2                                   0x00000008
#define RSTID135_PWMTIMER_PWM_VAL2__DEFAULT                          0x0       
#define FSTID135_PWMTIMER_PWM_VAL2_PWM_VAL__MASK                     0xFF      

/* PWM_VAL3 */
#define RSTID135_PWMTIMER_PWM_VAL3                                   0x0000000c
#define RSTID135_PWMTIMER_PWM_VAL3__DEFAULT                          0x0       
#define FSTID135_PWMTIMER_PWM_VAL3_PWM_VAL__MASK                     0xFF      

/* PWM_CPT_VAL0 */
#define RSTID135_PWMTIMER_PWM_CPT_VAL0                               0x00000010
#define RSTID135_PWMTIMER_PWM_CPT_VAL0__DEFAULT                      0x0       
#define FSTID135_PWMTIMER_PWM_CPT_VAL0_CPT_VAL__MASK                 0xFFFFFFFF

/* PWM_CPT_VAL1 */
#define RSTID135_PWMTIMER_PWM_CPT_VAL1                               0x00000014
#define RSTID135_PWMTIMER_PWM_CPT_VAL1__DEFAULT                      0x0       
#define FSTID135_PWMTIMER_PWM_CPT_VAL1_CPT_VAL__MASK                 0xFFFFFFFF

/* PWM_CPT_VAL2 */
#define RSTID135_PWMTIMER_PWM_CPT_VAL2                               0x00000018
#define RSTID135_PWMTIMER_PWM_CPT_VAL2__DEFAULT                      0x0       
#define FSTID135_PWMTIMER_PWM_CPT_VAL2_CPT_VAL__MASK                 0xFFFFFFFF

/* PWM_CPT_VAL3 */
#define RSTID135_PWMTIMER_PWM_CPT_VAL3                               0x0000001c
#define RSTID135_PWMTIMER_PWM_CPT_VAL3__DEFAULT                      0x0       
#define FSTID135_PWMTIMER_PWM_CPT_VAL3_CPT_VAL__MASK                 0xFFFFFFFF

/* PWM_CMP_VAL0 */
#define RSTID135_PWMTIMER_PWM_CMP_VAL0                               0x00000020
#define RSTID135_PWMTIMER_PWM_CMP_VAL0__DEFAULT                      0x0       
#define FSTID135_PWMTIMER_PWM_CMP_VAL0_CMP_VAL__MASK                 0xFFFFFFFF

/* PWM_CMP_VAL1 */
#define RSTID135_PWMTIMER_PWM_CMP_VAL1                               0x00000024
#define RSTID135_PWMTIMER_PWM_CMP_VAL1__DEFAULT                      0x0       
#define FSTID135_PWMTIMER_PWM_CMP_VAL1_CMP_VAL__MASK                 0xFFFFFFFF

/* PWM_CMP_VAL2 */
#define RSTID135_PWMTIMER_PWM_CMP_VAL2                               0x00000028
#define RSTID135_PWMTIMER_PWM_CMP_VAL2__DEFAULT                      0x0       
#define FSTID135_PWMTIMER_PWM_CMP_VAL2_CMP_VAL__MASK                 0xFFFFFFFF

/* PWM_CMP_VAL3 */
#define RSTID135_PWMTIMER_PWM_CMP_VAL3                               0x0000002c
#define RSTID135_PWMTIMER_PWM_CMP_VAL3__DEFAULT                      0x0       
#define FSTID135_PWMTIMER_PWM_CMP_VAL3_CMP_VAL__MASK                 0xFFFFFFFF

/* PWM_CPT_EDGE0 */
#define RSTID135_PWMTIMER_PWM_CPT_EDGE0                              0x00000030
#define RSTID135_PWMTIMER_PWM_CPT_EDGE0__DEFAULT                     0x0       
#define FSTID135_PWMTIMER_PWM_CPT_EDGE0_CE__MASK                     0x03      

/* PWM_CPT_EDGE1 */
#define RSTID135_PWMTIMER_PWM_CPT_EDGE1                              0x00000034
#define RSTID135_PWMTIMER_PWM_CPT_EDGE1__DEFAULT                     0x0       
#define FSTID135_PWMTIMER_PWM_CPT_EDGE1_CE__MASK                     0x03      

/* PWM_CPT_EDGE2 */
#define RSTID135_PWMTIMER_PWM_CPT_EDGE2                              0x00000038
#define RSTID135_PWMTIMER_PWM_CPT_EDGE2__DEFAULT                     0x0       
#define FSTID135_PWMTIMER_PWM_CPT_EDGE2_CE__MASK                     0x03      

/* PWM_CPT_EDGE3 */
#define RSTID135_PWMTIMER_PWM_CPT_EDGE3                              0x0000003c
#define RSTID135_PWMTIMER_PWM_CPT_EDGE3__DEFAULT                     0x0       
#define FSTID135_PWMTIMER_PWM_CPT_EDGE3_CE__MASK                     0x03      

/* PWM_CMP_OUT_VAL0 */
#define RSTID135_PWMTIMER_PWM_CMP_OUT_VAL0                           0x00000040
#define RSTID135_PWMTIMER_PWM_CMP_OUT_VAL0__DEFAULT                  0x0       
#define FSTID135_PWMTIMER_PWM_CMP_OUT_VAL0_CPT_OUT_VAL__MASK         0x01      

/* PWM_CMP_OUT_VAL1 */
#define RSTID135_PWMTIMER_PWM_CMP_OUT_VAL1                           0x00000044
#define RSTID135_PWMTIMER_PWM_CMP_OUT_VAL1__DEFAULT                  0x0       
#define FSTID135_PWMTIMER_PWM_CMP_OUT_VAL1_CPT_OUT_VAL__MASK         0x01      

/* PWM_CMP_OUT_VAL2 */
#define RSTID135_PWMTIMER_PWM_CMP_OUT_VAL2                           0x00000048
#define RSTID135_PWMTIMER_PWM_CMP_OUT_VAL2__DEFAULT                  0x0       
#define FSTID135_PWMTIMER_PWM_CMP_OUT_VAL2_CPT_OUT_VAL__MASK         0x01      

/* PWM_CMP_OUT_VAL3 */
#define RSTID135_PWMTIMER_PWM_CMP_OUT_VAL3                           0x0000004c
#define RSTID135_PWMTIMER_PWM_CMP_OUT_VAL3__DEFAULT                  0x0       
#define FSTID135_PWMTIMER_PWM_CMP_OUT_VAL3_CPT_OUT_VAL__MASK         0x01      

/* PWM_CTRL */
#define RSTID135_PWMTIMER_PWM_CTRL                                   0x00000050
#define RSTID135_PWMTIMER_PWM_CTRL__DEFAULT                          0x0       
#define FSTID135_PWMTIMER_PWM_CTRL_PWM_CLK_VALL__MASK                0x0000000F
#define FSTID135_PWMTIMER_PWM_CTRL_CPT_CLK_VAL__MASK                 0x000001F0
#define FSTID135_PWMTIMER_PWM_CTRL_PWM_EN__MASK                      0x00000200
#define FSTID135_PWMTIMER_PWM_CTRL_CPT_EN__MASK                      0x00000400
#define FSTID135_PWMTIMER_PWM_CTRL_PWM_CLK_VALH__MASK                0x0007F800
#define FSTID135_PWMTIMER_PWM_CTRL_VSYNC_ENABLE__MASK                0x00080000

/* PWM_INT_EN */
#define RSTID135_PWMTIMER_PWM_INT_EN                                 0x00000054
#define RSTID135_PWMTIMER_PWM_INT_EN__DEFAULT                        0x0       
#define FSTID135_PWMTIMER_PWM_INT_EN_PWM_INT_EN__MASK                0x0001    
#define FSTID135_PWMTIMER_PWM_INT_EN_CPT0_INT_EN__MASK               0x0002    
#define FSTID135_PWMTIMER_PWM_INT_EN_CPT1_INT_EN__MASK               0x0004    
#define FSTID135_PWMTIMER_PWM_INT_EN_CPT2_INT_EN__MASK               0x0008    
#define FSTID135_PWMTIMER_PWM_INT_EN_CPT3_INT_EN__MASK               0x0010    
#define FSTID135_PWMTIMER_PWM_INT_EN_CMP0_INT_EN__MASK               0x0020    
#define FSTID135_PWMTIMER_PWM_INT_EN_CMP1_INT_EN__MASK               0x0040    
#define FSTID135_PWMTIMER_PWM_INT_EN_CMP2_INT_EN__MASK               0x0080    
#define FSTID135_PWMTIMER_PWM_INT_EN_CMP3_INT_EN__MASK               0x0100    

/* PWM_INT_STA */
#define RSTID135_PWMTIMER_PWM_INT_STA                                0x00000058
#define RSTID135_PWMTIMER_PWM_INT_STA__DEFAULT                       0x0       
#define FSTID135_PWMTIMER_PWM_INT_STA_PWM_INT__MASK                  0x0001    
#define FSTID135_PWMTIMER_PWM_INT_STA_CPT0_INT__MASK                 0x0002    
#define FSTID135_PWMTIMER_PWM_INT_STA_CPT1_INT__MASK                 0x0004    
#define FSTID135_PWMTIMER_PWM_INT_STA_CPT2_INT__MASK                 0x0008    
#define FSTID135_PWMTIMER_PWM_INT_STA_CPT3_INT__MASK                 0x0010    
#define FSTID135_PWMTIMER_PWM_INT_STA_CMP0_INT__MASK                 0x0020    
#define FSTID135_PWMTIMER_PWM_INT_STA_CMP1_INT__MASK                 0x0040    
#define FSTID135_PWMTIMER_PWM_INT_STA_CMP2_INT__MASK                 0x0080    
#define FSTID135_PWMTIMER_PWM_INT_STA_CMP3_INT__MASK                 0x0100    

/* PWM_INT_ACK */
#define RSTID135_PWMTIMER_PWM_INT_ACK                                0x0000005c
#define RSTID135_PWMTIMER_PWM_INT_ACK__DEFAULT                       0x0       
#define FSTID135_PWMTIMER_PWM_INT_ACK_PWM_INT_ACK__MASK              0x0001    
#define FSTID135_PWMTIMER_PWM_INT_ACK_CPT0_INT_ACK__MASK             0x0002    
#define FSTID135_PWMTIMER_PWM_INT_ACK_CPT1_INT_ACK__MASK             0x0004    
#define FSTID135_PWMTIMER_PWM_INT_ACK_CPT2_INT_ACK__MASK             0x0008    
#define FSTID135_PWMTIMER_PWM_INT_ACK_CPT3_INT_ACK__MASK             0x0010    
#define FSTID135_PWMTIMER_PWM_INT_ACK_CMP0_INT_ACK__MASK             0x0020    
#define FSTID135_PWMTIMER_PWM_INT_ACK_CMP1_INT_ACK__MASK             0x0040    
#define FSTID135_PWMTIMER_PWM_INT_ACK_CMP2_INT_ACK__MASK             0x0080    
#define FSTID135_PWMTIMER_PWM_INT_ACK_CMP3_INT_ACK__MASK             0x0100    

/* PWM_CNT */
#define RSTID135_PWMTIMER_PWM_CNT                                    0x00000060
#define RSTID135_PWMTIMER_PWM_CNT__DEFAULT                           0x0       
#define FSTID135_PWMTIMER_PWM_CNT_PWM_CNT__MASK                      0xFF      

/* PWM_CPT_CMP_CNT */
#define RSTID135_PWMTIMER_PWM_CPT_CMP_CNT                            0x00000064
#define RSTID135_PWMTIMER_PWM_CPT_CMP_CNT__DEFAULT                   0x0       
#define FSTID135_PWMTIMER_PWM_CPT_CMP_CNT_CPT_CMP_CNT__MASK          0xFFFFFFFF


/* Number of registers */
#define STID135_PWM_REG_REG_NBREGS                                   26        

/* Number of fields */
#define STID135_PWM_REG_REG_NBFIELDS                                 55        



#endif /* #ifndef _PWM_REG_REG_INIT_H */
