/* 
* This file is part of STiD135 OXFORD LLA 
* 
* Copyright (c) <2014>-<2018>, STMicroelectronics - All Rights Reserved 
* Author(s): Mathias Hilaire (mathias.hilaire@st.com), Thierry Delahaye (thierry.delahaye@st.com) for STMicroelectronics. 
* 
* License terms: BSD 3-clause "New" or "Revised" License. 
* 
* Redistribution and use in source and binary forms, with or without 
* modification, are permitted provided that the following conditions are met: 
* 
* 1. Redistributions of source code must retain the above copyright notice, this 
* list of conditions and the following disclaimer. 
* 
* 2. Redistributions in binary form must reproduce the above copyright notice, 
* this list of conditions and the following disclaimer in the documentation 
* and/or other materials provided with the distribution. 
* 
* 3. Neither the name of the copyright holder nor the names of its contributors 
* may be used to endorse or promote products derived from this software 
* without specific prior written permission. 
* 
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
* 
*/ 
#ifndef _SOUTH_SYSCONF_REG_INIT_H
#define _SOUTH_SYSCONF_REG_INIT_H

/* -------------------------------------------------------------------------
 * File name  : south_sysconf_reg_init.h
 * File type  : C header file
 * -------------------------------------------------------------------------
 * Description:  Register map constants
 * Generated by spirit2regtest v2.24_alpha3
 * -------------------------------------------------------------------------
 */


/* Register map constants */

/* SYSTEM_CONFIG0 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0                         0x00000000
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0__DEFAULT                0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN0__MASK   0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN1__MASK   0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN2__MASK   0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN3__MASK   0x00000008

/* SYSTEM_STATUS16 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS16                        0x00000040
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS16__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS16_PWM_CAMPARE_OUT__MASK  0x0000000F

/* SYSTEM_STATUS17 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS17                        0x00000044
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS17__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS17_PWM_OUT__MASK          0x0000000F

/* SYSTEM_CONFIG32 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG32                        0x00000080
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG32__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG32_RESET_LEVEL1_N__MASK   0xFFFFFFFF

/* SYSTEM_STATUS48 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS48                        0x000000c0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS48__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS48_MODE_PIN_OUT__MASK     0x0000000F

/* SYSTEM_STATUS49 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS49                        0x000000c4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS49__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS49_NOTRESETOUT__MASK      0x00000001

/* SYSTEM_CONFIG64 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG64                        0x00000100
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG64__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG64_I2C_ADD_ID0__MASK      0x0000007F

/* SYSTEM_CONFIG65 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG65                        0x00000104
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG65__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG65_I2C_ADD_ID1__MASK      0x0000007F

/* SYSTEM_CONFIG66 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG66                        0x00000108
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG66__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG66_I2C_ADD_ID2__MASK      0x0000007F

/* SYSTEM_CONFIG67 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG67                        0x0000010c
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG67__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG67_I2C_ADD_ID3__MASK      0x0000007F

/* SYSTEM_CONFIG68 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68                        0x00000110
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_I2C_ENABLE__MASK       0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_MSB_FIRST__MASK        0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_I2C_ID_BASE__MASK      0x0000001C

/* SYSTEM_STATUS80 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80                        0x00000140
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80_I2C_STORE_OP_SBAG__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80_I2C_LOAD_OP_SBAG__MASK 0x00000002

/* SYSTEM_CONFIG96 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96                        0x00000180
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD0__MASK      0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD1__MASK      0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD2__MASK      0x00000004

/* SYSTEM_STATUS97 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS97                        0x00000184
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS97__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS97_OXFORD_DEVICE_ID__MASK 0xFFFFFFFF

/* SYSTEM_STATUS98 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS98                        0x00000188
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS98__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS98_SOUTH_SYSTEM_STATUS_ENG_METAL_FIX_NB__MASK 0x0000000F

/* SYSTEM_STATUS99 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS99                        0x0000018c
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS99__DEFAULT               0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS99_SOUTH_SYSTEM_STATUS_ENG_PROC_TYPE__MASK 0x00000007

/* SYSTEM_STATUS100 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS100                       0x00000190
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS100__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS100_SOUTH_SYSTEM_STATUS_ENG_FAB_LOC__MASK 0x0000001F

/* SYSTEM_STATUS101 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS101                       0x00000194
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS101__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS101_SOUTH_SYSTEM_STATUS_ENG_SUBSTRATE_VER__MASK 0x00000007

/* SYSTEM_STATUS102 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS102                       0x00000198
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS102__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS102_SOUTH_SYSTEM_STATUS_ENG_PROG_TRACK__MASK 0x00000003

/* SYSTEM_STATUS103 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS103                       0x0000019c
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS103__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS103_SOUTH_SYSTEM_STATUS_ENG_SALES_TYPE__MASK 0x0000003F

/* SYSTEM_STATUS112 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS112                       0x000001c0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS112__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS112_SOUTH_SYSTEM_STATUS_RX_DIS__MASK 0x0000000F

/* SYSTEM_STATUS113 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS113                       0x000001c4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS113__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS113_SOUTH_SYSTEM_STATUS_DCDCVREF_TST__MASK 0x0000000F

/* SYSTEM_STATUS114 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS114                       0x000001c8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS114__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS114_SOUTH_SYSTEM_STATUS_RX1_BB_CAL__MASK 0x000003FF

/* SYSTEM_STATUS115 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS115                       0x000001cc
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS115__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS115_SOUTH_SYSTEM_STATUS_RX2_BB_CAL__MASK 0x000003FF

/* SYSTEM_STATUS116 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS116                       0x000001d0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS116__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS116_SOUTH_SYSTEM_STATUS_RX3_BB_CAL__MASK 0x000003FF

/* SYSTEM_STATUS117 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS117                       0x000001d4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS117__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS117_SOUTH_SYSTEM_STATUS_RX4_BB_CAL__MASK 0x000003FF

/* SYSTEM_STATUS118 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS118                       0x000001d8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS118__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS118_SOUTH_SYSTEM_STATUS_RXS_BB_CAL__MASK 0x000000FF

/* SYSTEM_STATUS119 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS119                       0x000001dc
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS119__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS119_SOUTH_SYSTEM_STATUS_RX1_RF_PWR__MASK 0x0000001F

/* SYSTEM_STATUS120 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS120                       0x000001e0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS120__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS120_SOUTH_SYSTEM_STATUS_RX2_RF_PWR__MASK 0x0000001F

/* SYSTEM_STATUS121 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS121                       0x000001e4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS121__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS121_SOUTH_SYSTEM_STATUS_RX3_RF_PWR__MASK 0x0000001F

/* SYSTEM_STATUS122 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS122                       0x000001e8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS122__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS122_SOUTH_SYSTEM_STATUS_RX4_RF_PWR__MASK 0x0000001F

/* SYSTEM_STATUS123 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS123                       0x000001ec
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS123__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS123_SOUTH_SYSTEM_STATUS_RXS_RF_PWR__MASK 0x0000001F

/* SYSTEM_STATUS124 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS124                       0x000001f0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS124__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS124_SOUTH_SYSTEM_STATUS_DEMOD__MASK 0x000007FF

/* SYSTEM_STATUS125 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS125                       0x000001f4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS125__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS125_SOUTH_SYSTEM_STATUS_MINOR_CUT_ID__MASK 0x00000007

/* SYSTEM_STATUS126 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS126                       0x000001f8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS126__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS126_SOUTH_SYSTEM_STATUS_THS_DCORRECT__MASK 0x0000001F

/* SYSTEM_STATUS127 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS127                       0x000001fc
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS127__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS127_SOUTH_SYSTEM_STATUS_PM_SPEED__MASK 0x00000007

/* SYSTEM_CONFIG128 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128                       0x00000200
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB2__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB3__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB4__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB5__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB6__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB7__MASK 0x00000080

/* SYSTEM_CONFIG129 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129                       0x00000204
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129_CUST_DISABLE_TSOUT0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129_TSOUT0_REQ__MASK      0x00000002

/* SYSTEM_CONFIG130 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130                       0x00000208
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130_CUST_DISABLE_TSOUT1__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130_TSOUT1_REQ__MASK      0x00000002

/* SYSTEM_CONFIG131 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG131                       0x0000020c
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG131__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG131_CLK_FRC0_EXT_SRC_SEL__MASK 0x00000001

/* SYSTEM_CONFIG132 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG132                       0x00000210
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG132__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG132_CLK_FRC1_EXT_SRC_SEL__MASK 0x00000001

/* RESERVED144 */
#define RSTID135_SYSCFG_SOUTH_RESERVED144                            0x00000240
#define RSTID135_SYSCFG_SOUTH_RESERVED144__DEFAULT                   0x0       

/* SYSTEM_CONFIG160 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160                       0x00000280
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160_TSMUX_SEL__MASK       0x00000007
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160_RESERVED_FOR_9TH_STREAM__MASK 0x00000008

/* SYSTEM_STATUS176 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS176                       0x000002c0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS176__DEFAULT              0x0       

/* SYSTEM_CONFIG192 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG192                       0x00000300
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG192__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG192_PROM_REF_COUNTER_VALUE__MASK 0x0000FFFF

/* SYSTEM_CONFIG193 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG193                       0x00000304
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG193__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG193_PROM_SENS_CONTROL_VALUE__MASK 0x0000FFFF

/* SYSTEM_CONFIG194 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG194                       0x00000308
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG194__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG194_PROM_MODE__MASK       0x00000003

/* SYSTEM_STATUS208 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208                       0x00000340
#define RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208__DEFAULT              0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208_PROM_DATAREADY__MASK  0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208_PROM_SENSOR_STAT_O__MASK 0x0001FFFE


/* Number of registers */
#define STID135_SOUTH_SYSCONF_REG_NBREGS                             48        

/* Number of fields */
#define STID135_SOUTH_SYSCONF_REG_NBFIELDS                           65        



#endif /* #ifndef _SOUTH_SYSCONF_REG_INIT_H */
