/* 
* This file is part of STiD135 OXFORD LLA 
* 
* Copyright (c) <2014>-<2018>, STMicroelectronics - All Rights Reserved 
* Author(s): Mathias Hilaire (mathias.hilaire@st.com), Thierry Delahaye (thierry.delahaye@st.com) for STMicroelectronics. 
* 
* License terms: BSD 3-clause "New" or "Revised" License. 
* 
* Redistribution and use in source and binary forms, with or without 
* modification, are permitted provided that the following conditions are met: 
* 
* 1. Redistributions of source code must retain the above copyright notice, this 
* list of conditions and the following disclaimer. 
* 
* 2. Redistributions in binary form must reproduce the above copyright notice, 
* this list of conditions and the following disclaimer in the documentation 
* and/or other materials provided with the distribution. 
* 
* 3. Neither the name of the copyright holder nor the names of its contributors 
* may be used to endorse or promote products derived from this software 
* without specific prior written permission. 
* 
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
* 
*/ 
#ifndef _C8SECTP_OXFORD_FE_TOP_REG_INIT_H
#define _C8SECTP_OXFORD_FE_TOP_REG_INIT_H

/* -------------------------------------------------------------------------
 * File name  : c8sectp_oxford_fe_top_reg_init.h
 * File type  : C header file
 * -------------------------------------------------------------------------
 * Description:  Register map constants
 * Generated by spirit2regtest v2.24_alpha3
 * -------------------------------------------------------------------------
 */


/* Register map constants */

/* C8SECTPFE_SYS_INPUT_ERR_STATUS */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_STATUS        0x00000000
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_STATUS__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_STATUS_IBERROR__MASK 0x00000000000000FF

/* C8SECTPFE_SYS_OTHER_ERR_STATUS */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_STATUS        0x00000008
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_STATUS__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_STATUS_TSDMAERROR__MASK 0x00000002

/* C8SECTPFE_SYS_INPUT_ERR_MASK */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_MASK          0x00000010
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_MASK__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_MASK_IBERROR__MASK 0x00000000000000FF

/* C8SECTPFE_SYS_OTHER_ERR_MASK */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_MASK          0x00000018
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_MASK__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_MASK_TSDMAERROR__MASK 0x00000002

/* C8SECTPFE_SYS_INPUT_CLKEN */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_CLKEN             0x00000030
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_CLKEN__DEFAULT    0x2ffff   
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_CLKEN_IBENABLE__MASK 0x00000000000000FF

/* C8SECTPFE_SYS_OTHER_CLKEN */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_CLKEN             0x00000038
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_CLKEN__DEFAULT    0x2ffff   
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_CLKEN_TSDMAENABLE__MASK 0x00000002

/* C8SECTPFE_SYS_CFG_NUM_IB */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_IB              0x00000200
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_IB__DEFAULT     0x8       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_IB_VALUE__MASK  0xFFFFFFFF

/* C8SECTPFE_SYS_CFG_NUM_MIB */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_MIB             0x00000204
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_MIB__DEFAULT    0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_MIB_VALUE__MASK 0xFFFFFFFF

/* C8SECTPFE_SYS_CFG_NUM_SWTS */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_SWTS            0x00000208
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_SWTS__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_SWTS_VALUE__MASK 0xFFFFFFFF

/* C8SECTPFE_SYS_CFG_NUM_TSOUT */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TSOUT           0x0000020c
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TSOUT__DEFAULT  0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TSOUT_VALUE__MASK 0xFFFFFFFF

/* C8SECTPFE_SYS_CFG_NUM_CCSC */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_CCSC            0x00000210
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_CCSC__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_CCSC_VALUE__MASK 0xFFFFFFFF

/* C8SECTPFE_SYS_CFG_NUM_RAM */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_RAM             0x00000214
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_RAM__DEFAULT    0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_RAM_VALUE__MASK 0xFFFFFFFF

/* C8SECTPFE_SYS_CFG_NUM_TP */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TP              0x00000218
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TP__DEFAULT     0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TP_VALUE__MASK  0xFFFFFFFF

/* C8SECTPFE_SYS_CFG_IB0_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO            0x00000400
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO_STREAM_NUM__MASK 0x000000FF
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO_RAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB0_DMA_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_DMA_INFO        0x00000404
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_DMA_INFO__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_DMA_INFO_TSDMA_STREAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB1_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO            0x00000410
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO_STREAM_NUM__MASK 0x000000FF
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO_RAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB1_DMA_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_DMA_INFO        0x00000414
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_DMA_INFO__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_DMA_INFO_TSDMA_STREAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB2_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO            0x00000420
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO_STREAM_NUM__MASK 0x000000FF
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO_RAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB2_DMA_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_DMA_INFO        0x00000424
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_DMA_INFO__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_DMA_INFO_TSDMA_STREAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB3_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO            0x00000430
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO_STREAM_NUM__MASK 0x000000FF
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO_RAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB3_DMA_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_DMA_INFO        0x00000434
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_DMA_INFO__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_DMA_INFO_TSDMA_STREAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB4_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO            0x00000440
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO_STREAM_NUM__MASK 0x000000FF
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO_RAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB4_DMA_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_DMA_INFO        0x00000444
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_DMA_INFO__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_DMA_INFO_TSDMA_STREAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB5_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO            0x00000450
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO_STREAM_NUM__MASK 0x000000FF
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO_RAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB5_DMA_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_DMA_INFO        0x00000454
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_DMA_INFO__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_DMA_INFO_TSDMA_STREAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB6_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO            0x00000460
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO_STREAM_NUM__MASK 0x000000FF
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO_RAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB6_DMA_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_DMA_INFO        0x00000464
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_DMA_INFO__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_DMA_INFO_TSDMA_STREAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB7_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO            0x00000470
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO__DEFAULT   0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO_STREAM_NUM__MASK 0x000000FF
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO_RAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_IB7_DMA_INFO */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_DMA_INFO        0x00000474
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_DMA_INFO__DEFAULT 0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_DMA_INFO_TSDMA_STREAM_NUM__MASK 0x0000FF00

/* C8SECTPFE_SYS_CFG_RAM0_BASE */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_BASE           0x00000d00
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_BASE__DEFAULT  0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_BASE_VALUE__MASK 0xFFFFFFFF

/* C8SECTPFE_SYS_CFG_RAM0_SIZE */
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_SIZE           0x00000d04
#define RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_SIZE__DEFAULT  0x0       
#define FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_SIZE_VALUE__MASK 0xFFFFFFFF


/* Number of registers */
#define STID135_C8SECTP_OXFORD_FE_TOP_REG_NBREGS                     31        

/* Number of fields */
#define STID135_C8SECTP_OXFORD_FE_TOP_REG_NBFIELDS                   39        



#endif /* #ifndef _C8SECTP_OXFORD_FE_TOP_REG_INIT_H */
