/* 
* This file is part of STiD135 OXFORD LLA 
* 
* Copyright (c) <2014>-<2018>, STMicroelectronics - All Rights Reserved 
* Author(s): Mathias Hilaire (mathias.hilaire@st.com), Thierry Delahaye (thierry.delahaye@st.com) for STMicroelectronics. 
* 
* License terms: BSD 3-clause "New" or "Revised" License. 
* 
* Redistribution and use in source and binary forms, with or without 
* modification, are permitted provided that the following conditions are met: 
* 
* 1. Redistributions of source code must retain the above copyright notice, this 
* list of conditions and the following disclaimer. 
* 
* 2. Redistributions in binary form must reproduce the above copyright notice, 
* this list of conditions and the following disclaimer in the documentation 
* and/or other materials provided with the distribution. 
* 
* 3. Neither the name of the copyright holder nor the names of its contributors 
* may be used to endorse or promote products derived from this software 
* without specific prior written permission. 
* 
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
* 
*/ 
#ifndef _PIOMUX_SOUTH_SYSCONF_REG_INIT_H
#define _PIOMUX_SOUTH_SYSCONF_REG_INIT_H

/* -------------------------------------------------------------------------
 * File name  : piomux_south_sysconf_reg_init.h
 * File type  : C header file
 * -------------------------------------------------------------------------
 * Description:  Register map constants
 * Generated by spirit2regtest v2.24_alpha3
 * -------------------------------------------------------------------------
 */


/* Register map constants */

/* SYSTEM_CONFIG1000 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000                      0x00000000
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_0_SELECTOR__MASK 0x00000007
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_1_SELECTOR__MASK 0x00000070
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_2_SELECTOR__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_3_SELECTOR__MASK 0x00007000

/* SYSTEM_CONFIG1001 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001                      0x00000004
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_0_SELECTOR__MASK 0x00000007
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_1_SELECTOR__MASK 0x00000070
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_2_SELECTOR__MASK 0x00000700
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_3_SELECTOR__MASK 0x00007000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_4_SELECTOR__MASK 0x00070000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_5_SELECTOR__MASK 0x00700000

/* SYSTEM_CONFIG1002 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002                      0x00000008
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_0_SELECTOR__MASK 0x00000007
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_1_SELECTOR__MASK 0x00000070
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_2_SELECTOR__MASK 0x00000700
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_3_SELECTOR__MASK 0x00007000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_4_SELECTOR__MASK 0x00070000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_5_SELECTOR__MASK 0x00700000

/* SYSTEM_CONFIG1003 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003                      0x0000000c
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_0_SELECTOR__MASK 0x00000007
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_1_SELECTOR__MASK 0x00000070
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_2_SELECTOR__MASK 0x00000700
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_3_SELECTOR__MASK 0x00007000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_4_SELECTOR__MASK 0x00070000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_5_SELECTOR__MASK 0x00700000

/* SYSTEM_CONFIG1040 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040                      0x000000a0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_0_OE__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_1_OE__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_2_OE__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_3_OE__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_0_OE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_1_OE__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_2_OE__MASK 0x00000400
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_3_OE__MASK 0x00000800
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_4_OE__MASK 0x00001000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_5_OE__MASK 0x00002000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_0_OE__MASK 0x00010000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_1_OE__MASK 0x00020000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_2_OE__MASK 0x00040000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_3_OE__MASK 0x00080000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_4_OE__MASK 0x00100000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_5_OE__MASK 0x00200000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_0_OE__MASK 0x01000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_1_OE__MASK 0x02000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_2_OE__MASK 0x04000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_3_OE__MASK 0x08000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_4_OE__MASK 0x10000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_5_OE__MASK 0x20000000

/* SYSTEM_CONFIG1050 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050                      0x000000c8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_0_PU__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_1_PU__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_2_PU__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_3_PU__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_0_PU__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_1_PU__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_2_PU__MASK 0x00000400
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_3_PU__MASK 0x00000800
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_4_PU__MASK 0x00001000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_5_PU__MASK 0x00002000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_0_PU__MASK 0x00010000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_1_PU__MASK 0x00020000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_2_PU__MASK 0x00040000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_3_PU__MASK 0x00080000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_4_PU__MASK 0x00100000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_5_PU__MASK 0x00200000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_0_PU__MASK 0x01000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_1_PU__MASK 0x02000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_2_PU__MASK 0x04000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_3_PU__MASK 0x08000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_4_PU__MASK 0x10000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_5_PU__MASK 0x20000000

/* SYSTEM_CONFIG1055 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1055                      0x000000dc
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1055__DEFAULT             0x0       

/* SYSTEM_CONFIG1060 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060                      0x000000f0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_0_OD__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_1_OD__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_2_OD__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_3_OD__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_0_OD__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_1_OD__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_2_OD__MASK 0x00000400
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_3_OD__MASK 0x00000800
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_4_OD__MASK 0x00001000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_5_OD__MASK 0x00002000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_0_OD__MASK 0x00010000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_1_OD__MASK 0x00020000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_2_OD__MASK 0x00040000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_3_OD__MASK 0x00080000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_4_OD__MASK 0x00100000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_5_OD__MASK 0x00200000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_0_OD__MASK 0x01000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_1_OD__MASK 0x02000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_2_OD__MASK 0x04000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_3_OD__MASK 0x08000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_4_OD__MASK 0x10000000
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_5_OD__MASK 0x20000000

/* SYSTEM_CONFIG1100 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100                      0x00000190
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1101 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101                      0x00000194
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1102 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102                      0x00000198
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1103 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103                      0x0000019c
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1104 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104                      0x000001a0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1105 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105                      0x000001a4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1106 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106                      0x000001a8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1107 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107                      0x000001ac
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1108 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108                      0x000001b0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1109 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109                      0x000001b4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1110 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110                      0x000001b8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1111 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111                      0x000001bc
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1112 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112                      0x000001c0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1113 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113                      0x000001c4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1114 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114                      0x000001c8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1115 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115                      0x000001cc
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1116 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116                      0x000001d0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1117 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117                      0x000001d4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1118 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118                      0x000001d8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1119 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119                      0x000001dc
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1120 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120                      0x000001e0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1121 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121                      0x000001e4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1122 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122                      0x000001e8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1123 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123                      0x000001ec
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1124 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124                      0x000001f0
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1125 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125                      0x000001f4
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1126 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126                      0x000001f8
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1127 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127                      0x000001fc
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1128 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128                      0x00000200
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1129 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129                      0x00000204
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1130 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130                      0x00000208
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_RETIME__MASK 0x00000400

/* SYSTEM_CONFIG1131 */
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131                      0x0000020c
#define RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131__DEFAULT             0x0       
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLK_0__MASK 0x00000001
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLK_1__MASK 0x00000002
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLKNOTDATA__MASK 0x00000004
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_0__MASK 0x00000008
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_1__MASK 0x00000010
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_2__MASK 0x00000020
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_3__MASK 0x00000040
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_INNOTOUT__MASK 0x00000080
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DOUBLE_EDGE__MASK 0x00000100
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_INVERTCLK__MASK 0x00000200
#define FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_RETIME__MASK 0x00000400


/* Number of registers */
#define STID135_PIOMUX_SOUTH_SYSCONF_REG_NBREGS                      40        

/* Number of fields */
#define STID135_PIOMUX_SOUTH_SYSCONF_REG_NBFIELDS                    440       



#endif /* #ifndef _PIOMUX_SOUTH_SYSCONF_REG_INIT_H */
