/* 
* This file is part of STiD135 OXFORD LLA 
* 
* Copyright (c) <2014>-<2018>, STMicroelectronics - All Rights Reserved 
* Author(s): Mathias Hilaire (mathias.hilaire@st.com), Thierry Delahaye (thierry.delahaye@st.com) for STMicroelectronics. 
* 
* License terms: BSD 3-clause "New" or "Revised" License. 
* 
* Redistribution and use in source and binary forms, with or without 
* modification, are permitted provided that the following conditions are met: 
* 
* 1. Redistributions of source code must retain the above copyright notice, this 
* list of conditions and the following disclaimer. 
* 
* 2. Redistributions in binary form must reproduce the above copyright notice, 
* this list of conditions and the following disclaimer in the documentation 
* and/or other materials provided with the distribution. 
* 
* 3. Neither the name of the copyright holder nor the names of its contributors 
* may be used to endorse or promote products derived from this software 
* without specific prior written permission. 
* 
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
* 
*/ 
/*
##############

This file has been automatically generated on 2017-01-17
Script used: OxfordInitGen.py

Source file were : ./DEMOD_I2C_Adresslist.txt, ./SOC_I2C_Adresslist.txt
and all header files generated by Perl script (input files: xml Spirit files)

##############

*/
#ifndef STID135_INITLLA_H
#define STID135_INITLLA_H

#include "c8codew_addr_map.h"
#include "stid135_addr_map.h"

#include "c8codew_dvbs2fec_reg_init.h"
#include "c8codew_path_ctrl_gen_reg_init.h"
#include "c8codew_path_ctrl_reg_init.h"
#include "c8codew_rfmux_reg_init.h"
#include "c8codew_top_ctrl_reg_init.h"
#include "dvbsx_agcrf_reg_init.h"
#include "dvbsx_demod_reg_init.h"
#include "dvbsx_diseqctst_reg_init.h"
#include "dvbsx_diseqc_reg_init.h"
#include "dvbsx_fecspy_reg_init.h"
#include "dvbsx_fsk_reg_init.h"
#include "dvbsx_hware_gen_reg_init.h"
#include "dvbsx_hware_reg_init.h"
#include "dvbsx_lnbctrl_reg_init.h"
#include "dvbsx_pktdelin_reg_init.h"
#include "dvbsx_superfec_reg_init.h"
#include "dvbsx_viterbi_reg_init.h"
#include "afe_ctrl_reg_init.h"
#include "c8irq_merger_top_reg_init.h"
#include "c8sectp_fe_input_block_reg_init.h"
#include "c8sectp_fe_tag_counter_reg_init.h"
#include "c8sectp_fe_tsdma_top_reg_init.h"
#include "c8sectp_oxford_fe_top_reg_init.h"
#include "c9ths_glue_top_reg_init.h"
#include "north_sysconf_reg_init.h"
#include "oxford_flexclkgen_a_reg_spirit_reg_init.h"
#include "piomux_north_sysconf_reg_init.h"
#include "piomux_south_sysconf_reg_init.h"
#include "pio_reg_v1_4_reg_init.h"
#include "pwm_reg_reg_init.h"
#include "south_sysconf_reg_init.h"
/*
U32 C8CODEW_TOP_CTRL[1] = { C8CODEW_TOP_CTRL_ADDR(unit) };
U32 DVBSX_AGCRF[4] = { A1_DVBSX_AGCRF_ADDR(unit), A2_DVBSX_AGCRF_ADDR(unit), A3_DVBSX_AGCRF_ADDR(unit), A4_DVBSX_AGCRF_ADDR(unit) };
U32 C8CODEW_RFMUX[1] = { C8CODEW_RFMUX_ADDR(unit) };
U32 DVBSX_DISEQC[4] = { D1_DVBSX_DISEQC_ADDR(unit), D2_DVBSX_DISEQC_ADDR(unit), D3_DVBSX_DISEQC_ADDR(unit), D4_DVBSX_DISEQC_ADDR(unit) };
U32 DVBSX_DISEQCTST[4] = { Q1_DVBSX_DISEQCTST_ADDR(unit), Q2_DVBSX_DISEQCTST_ADDR(unit), Q3_DVBSX_DISEQCTST_ADDR(unit), Q4_DVBSX_DISEQCTST_ADDR(unit) };
U32 DVBSX_FSK[1] = { DVBSX_FSK_ADDR(unit) };
U32 DVBSX_LNBCTRL[1] = { DVBSX_LNBCTRL_ADDR(unit) };
U32 C8CODEW_PATH_CTRL[8] = { C1_C8CODEW_PATH_CTRL_ADDR(unit), C2_C8CODEW_PATH_CTRL_ADDR(unit), C3_C8CODEW_PATH_CTRL_ADDR(unit), C4_C8CODEW_PATH_CTRL_ADDR(unit), C5_C8CODEW_PATH_CTRL_ADDR(unit), C6_C8CODEW_PATH_CTRL_ADDR(unit), C7_C8CODEW_PATH_CTRL_ADDR(unit), C8_C8CODEW_PATH_CTRL_ADDR(unit) };
U32 C8CODEW_PATH_CTRL_GEN[4] = { G1_C8CODEW_PATH_CTRL_GEN_ADDR(unit), G2_C8CODEW_PATH_CTRL_GEN_ADDR(unit), G3_C8CODEW_PATH_CTRL_GEN_ADDR(unit), G4_C8CODEW_PATH_CTRL_GEN_ADDR(unit) };
U32 DVBSX_HWARE_GEN[4] = { H1_DVBSX_HWARE_GEN_ADDR(unit), H2_DVBSX_HWARE_GEN_ADDR(unit), H3_DVBSX_HWARE_GEN_ADDR(unit), H4_DVBSX_HWARE_GEN_ADDR(unit) };
U32 DVBSX_DEMOD[8] = { D1_DVBSX_DEMOD_ADDR(unit), D2_DVBSX_DEMOD_ADDR(unit), D3_DVBSX_DEMOD_ADDR(unit), D4_DVBSX_DEMOD_ADDR(unit), D5_DVBSX_DEMOD_ADDR(unit), D6_DVBSX_DEMOD_ADDR(unit), D7_DVBSX_DEMOD_ADDR(unit), D8_DVBSX_DEMOD_ADDR(unit) };
U32 DVBSX_VITERBI[8] = { V1_DVBSX_VITERBI_ADDR(unit), V2_DVBSX_VITERBI_ADDR(unit), V3_DVBSX_VITERBI_ADDR(unit), V4_DVBSX_VITERBI_ADDR(unit), V5_DVBSX_VITERBI_ADDR(unit), V6_DVBSX_VITERBI_ADDR(unit), V7_DVBSX_VITERBI_ADDR(unit), V8_DVBSX_VITERBI_ADDR(unit) };
U32 DVBSX_SUPERFEC[8] = { S1_DVBSX_SUPERFEC_ADDR(unit), S2_DVBSX_SUPERFEC_ADDR(unit), S3_DVBSX_SUPERFEC_ADDR(unit), S4_DVBSX_SUPERFEC_ADDR(unit), S5_DVBSX_SUPERFEC_ADDR(unit), S6_DVBSX_SUPERFEC_ADDR(unit), S7_DVBSX_SUPERFEC_ADDR(unit), S8_DVBSX_SUPERFEC_ADDR(unit) };
U32 DVBSX_HWARE[8] = { W1_DVBSX_HWARE_ADDR(unit), W2_DVBSX_HWARE_ADDR(unit), W3_DVBSX_HWARE_ADDR(unit), W4_DVBSX_HWARE_ADDR(unit), W5_DVBSX_HWARE_ADDR(unit), W6_DVBSX_HWARE_ADDR(unit), W7_DVBSX_HWARE_ADDR(unit), W8_DVBSX_HWARE_ADDR(unit) };
U32 DVBSX_PKTDELIN[8] = { K1_DVBSX_PKTDELIN_ADDR(unit), K2_DVBSX_PKTDELIN_ADDR(unit), K3_DVBSX_PKTDELIN_ADDR(unit), K4_DVBSX_PKTDELIN_ADDR(unit), K5_DVBSX_PKTDELIN_ADDR(unit), K6_DVBSX_PKTDELIN_ADDR(unit), K7_DVBSX_PKTDELIN_ADDR(unit), K8_DVBSX_PKTDELIN_ADDR(unit) };
U32 DVBSX_FECSPY[8] = { B1_DVBSX_FECSPY_ADDR(unit), B2_DVBSX_FECSPY_ADDR(unit), B3_DVBSX_FECSPY_ADDR(unit), B4_DVBSX_FECSPY_ADDR(unit), B5_DVBSX_FECSPY_ADDR(unit), B6_DVBSX_FECSPY_ADDR(unit), B7_DVBSX_FECSPY_ADDR(unit), B8_DVBSX_FECSPY_ADDR(unit) };
U32 C8CODEW_DVBS2FEC[1] = { C8CODEW_DVBS2FEC_ADDR(unit) };
*/

/*
U32 SYSCONFIGN[1] = { SYSCONFIGN_ADDR(unit) };
U32 X5BANKPIONORTH[5] = { P1_X5BANKPIONORTH_ADDR(unit), P2_X5BANKPIONORTH_ADDR(unit), P3_X5BANKPIONORTH_ADDR(unit), P4_X5BANKPIONORTH_ADDR(unit), P5_X5BANKPIONORTH_ADDR(unit) };
U32 PIONORTHMUX[1] = { PIONORTHMUX_ADDR(unit) };
U32 AFE_CTRL[1] = { AFE_CTRL_ADDR(unit) };
U32 THSENSOR[1] = { THSENSOR_ADDR(unit) };
U32 PWM[1] = { PWM_ADDR(unit) };
U32 IRQMERGER[1] = { IRQMERGER_ADDR(unit) };
U32 SYSCONFIGS[1] = { SYSCONFIGS_ADDR(unit) };
U32 X5BANKPIOSOUTH[5] = { P6_X5BANKPIOSOUTH_ADDR(unit), P7_X5BANKPIOSOUTH_ADDR(unit), P8_X5BANKPIOSOUTH_ADDR(unit), P9_X5BANKPIOSOUTH_ADDR(unit), P10_X5BANKPIOSOUTH_ADDR(unit) };
U32 PIOSOUTHMUX[1] = { PIOSOUTHMUX_ADDR(unit) };
U32 CLOCKGENNORTH[1] = { CLOCKGENNORTH_ADDR(unit) };
U32 STFECONFIG[1] = { STFECONFIG_ADDR(unit) };
U32 C8SECTPFE_IB[8] = { P1_C8SECTPFE_IB_ADDR(unit), P2_C8SECTPFE_IB_ADDR(unit), P3_C8SECTPFE_IB_ADDR(unit), P4_C8SECTPFE_IB_ADDR(unit), P5_C8SECTPFE_IB_ADDR(unit), P6_C8SECTPFE_IB_ADDR(unit), P7_C8SECTPFE_IB_ADDR(unit), P8_C8SECTPFE_IB_ADDR(unit) };
U32 C8SECTPFE_TC[2] = { P1_C8SECTPFE_TC_ADDR(unit), P2_C8SECTPFE_TC_ADDR(unit) };
U32 C8SECTPFE_TSDMA[1] = { C8SECTPFE_TSDMA_ADDR(unit) };
*/


#define REG_RC8CODEW_C8CODEW_TOP_CTRL_MID (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_MID)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_MID_MRELEASE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_MID*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_MID_MRELEASE__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_MID_MCHIP_IDENT (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_MID*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_MID_MCHIP_IDENT__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_DID (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_DID)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_DID_DEVICE_ID (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_DID*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_DID_DEVICE_ID__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_TOP_FRESINT (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_TOP_FRESINT__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_TOP_FRESMAS (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_TOP_FRESMAS__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_TOP_FRESI2C (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_TOP_FRESI2C__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_FRESTUNER (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_FRESTUNER__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_FRESFEC (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TOP_FRES_FRESFEC__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TOP_STOPCLK (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TOP_STOPCLK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TOP_STOPCLK_STOP_CKTUNER (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TOP_STOPCLK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TOP_STOPCLK_STOP_CKTUNER__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI1_SIGN (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI1_SIGN__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI1_REVERSE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI1_REVERSE__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI2_SIGN (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI2_SIGN__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI2_REVERSE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI2_REVERSE__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI3_SIGN (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI3_SIGN__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI3_REVERSE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI3_REVERSE__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI4_SIGN (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI4_SIGN__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI4_REVERSE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICFG_ADCI4_REVERSE__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_DSQADCICFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_DSQADCICFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_DSQADCICFG_DISEQC_ADCI_SIGN (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_DSQADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_DSQADCICFG_DISEQC_ADCI_SIGN__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_DSQADCICFG_DISEQC_ADCI_GAIN (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_DSQADCICFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_DSQADCICFG_DISEQC_ADCI_GAIN__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_ADCICLK (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_ADCICLK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_ADCI1_INVCLK (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICLK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_ADCI1_INVCLK__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_ADCI2_INVCLK (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICLK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_ADCI2_INVCLK__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_ADCI3_INVCLK (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICLK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_ADCI3_INVCLK__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_ADCI4_INVCLK (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICLK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_ADCI4_INVCLK__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_I2C_FSKI_INVCLK (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_ADCICLK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_ADCICLK_I2C_FSKI_INVCLK__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_SYNTCTRL (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_SYNTCTRL)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYNTCTRL_STANDBY (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYNTCTRL*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYNTCTRL_STANDBY__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_I2CCFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_I2CCFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CCFG_STATUS_WR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CCFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CCFG_STATUS_WR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CCFG_I2C_FORCEACT (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CCFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CCFG_I2C_FORCEACT__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS1 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS1)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS1_CHIP_SYSSTATUS (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS1_CHIP_SYSSTATUS__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS0 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS0)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS0_CHIP_SYSSTATUS (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYSSTATUS0_CHIP_SYSSTATUS__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_STOP_SDAT2SDA (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_STOP_SDAT2SDA__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_STOP_ENABLE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_STOP_ENABLE__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_SCLT_DELAY (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_SCLT_DELAY__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_ENARPT_LEVEL (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_ENARPT_LEVEL__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_I2CT_ON (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT1_I2CT_ON__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT2 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT2)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT2_I2C_FASTMODE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT2_I2C_FASTMODE__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT2_I2C_MEDIUMSPEED (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CRPT2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CRPT2_I2C_MEDIUMSPEED__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_DACR1 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_DACR1)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_DACR1_DAC_VALUE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_DACR1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_DACR1_DAC_VALUE__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_DACR1_DAC_MODE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_DACR1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_DACR1_DAC_MODE__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_DACR2 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_DACR2)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_DACR2_DAC_VALUE (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_DACR2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_DACR2_DAC_VALUE__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MDISEQC_IRQ_1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MDISEQC_IRQ_1__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MDISEQC_IRQ_2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MDISEQC_IRQ_2__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MDISEQC_IRQ_3 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MDISEQC_IRQ_3__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MDISEQC_IRQ_4 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MDISEQC_IRQ_4__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MLNBCTRL_IRQ_1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MLNBCTRL_IRQ_1__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MLNBCTRL_IRQ_2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MLNBCTRL_IRQ_2__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MLNBCTRL_IRQ_3 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MLNBCTRL_IRQ_3__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MLNBCTRL_IRQ_4 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQMSK_MLNBCTRL_IRQ_4__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SDISEQC_IRQ_1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SDISEQC_IRQ_1__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SDISEQC_IRQ_2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SDISEQC_IRQ_2__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SDISEQC_IRQ_3 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SDISEQC_IRQ_3__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SDISEQC_IRQ_4 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SDISEQC_IRQ_4__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SLNBCTRL_IRQ_1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SLNBCTRL_IRQ_1__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SLNBCTRL_IRQ_2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SLNBCTRL_IRQ_2__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SLNBCTRL_IRQ_3 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SLNBCTRL_IRQ_3__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SLNBCTRL_IRQ_4 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQSTATUS_SLNBCTRL_IRQ_4__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FDISEQC_IRQ_1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FDISEQC_IRQ_1__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FDISEQC_IRQ_2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FDISEQC_IRQ_2__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FDISEQC_IRQ_3 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FDISEQC_IRQ_3__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FDISEQC_IRQ_4 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FDISEQC_IRQ_4__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FLNBCTRL_IRQ_1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FLNBCTRL_IRQ_1__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FLNBCTRL_IRQ_2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FLNBCTRL_IRQ_2__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FLNBCTRL_IRQ_3 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FLNBCTRL_IRQ_3__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FLNBCTRL_IRQ_4 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SYS_IRQFORCE_FLNBCTRL_IRQ_4__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TSRCSSEL (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TSRCSSEL)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TSRCSSEL_TSRCS_SEL (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TSRCSSEL*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TSRCSSEL_TSRCS_SEL__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_AGCOBSSEL (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_AGCOBSSEL)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_AGCOBSSEL_AGCOBS_SEL (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_AGCOBSSEL*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_AGCOBSSEL_AGCOBS_SEL__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_SDDATASEL (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_SDDATASEL)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SDDATASEL_SDDDATA1_SEL (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SDDATASEL*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SDDATASEL_SDDDATA1_SEL__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SDDATASEL_SDDDATA2_SEL (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SDDATASEL*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SDDATASEL_SDDDATA2_SEL__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_SGNLGSEL (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_SGNLGSEL)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SGNLGSEL_SGNLG1_SEL (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SGNLGSEL*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SGNLGSEL_SGNLG1_SEL__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_SGNLGSEL_SGNLG2_SEL (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_SGNLGSEL*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_SGNLGSEL_SGNLG2_SEL__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG_GPIO0_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG_GPIO0_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG_GPIO0_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG_GPIO0_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG_GPIO0_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO0CFG_GPIO0_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG_GPIO1_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG_GPIO1_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG_GPIO1_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG_GPIO1_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG_GPIO1_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO1CFG_GPIO1_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG_GPIO2_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG_GPIO2_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG_GPIO2_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG_GPIO2_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG_GPIO2_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO2CFG_GPIO2_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG_GPIO3_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG_GPIO3_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG_GPIO3_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG_GPIO3_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG_GPIO3_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO3CFG_GPIO3_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG_GPIO4_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG_GPIO4_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG_GPIO4_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG_GPIO4_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG_GPIO4_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO4CFG_GPIO4_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG_GPIO5_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG_GPIO5_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG_GPIO5_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG_GPIO5_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG_GPIO5_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO5CFG_GPIO5_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG_GPIO6_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG_GPIO6_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG_GPIO6_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG_GPIO6_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG_GPIO6_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO6CFG_GPIO6_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG_GPIO7_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG_GPIO7_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG_GPIO7_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG_GPIO7_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG_GPIO7_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO7CFG_GPIO7_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG_GPIO8_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG_GPIO8_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG_GPIO8_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG_GPIO8_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG_GPIO8_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO8CFG_GPIO8_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG_GPIO9_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG_GPIO9_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG_GPIO9_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG_GPIO9_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG_GPIO9_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO9CFG_GPIO9_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG_GPIO10_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG_GPIO10_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG_GPIO10_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG_GPIO10_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG_GPIO10_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO10CFG_GPIO10_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG_GPIO11_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG_GPIO11_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG_GPIO11_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG_GPIO11_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG_GPIO11_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO11CFG_GPIO11_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG_GPIO12_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG_GPIO12_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG_GPIO12_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG_GPIO12_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG_GPIO12_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO12CFG_GPIO12_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG_GPIO13_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG_GPIO13_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG_GPIO13_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG_GPIO13_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG_GPIO13_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO13CFG_GPIO13_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG_GPIO14_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG_GPIO14_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG_GPIO14_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG_GPIO14_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG_GPIO14_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO14CFG_GPIO14_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG_GPIO15_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG_GPIO15_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG_GPIO15_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG_GPIO15_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG_GPIO15_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO15CFG_GPIO15_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG_GPIO16_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG_GPIO16_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG_GPIO16_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG_GPIO16_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG_GPIO16_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO16CFG_GPIO16_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG_GPIO17_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG_GPIO17_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG_GPIO17_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG_GPIO17_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG_GPIO17_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO17CFG_GPIO17_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG_GPIO18_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG_GPIO18_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG_GPIO18_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG_GPIO18_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG_GPIO18_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO18CFG_GPIO18_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG_GPIO19_XOR (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG_GPIO19_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG_GPIO19_CONFIG (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG_GPIO19_CONFIG__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG_GPIO19_OPD (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIO19CFG_GPIO19_OPD__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2_GPIO_OBS16 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2_GPIO_OBS16__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2_GPIO_OBS17 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2_GPIO_OBS17__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2_GPIO_OBS18 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2_GPIO_OBS18__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2_GPIO_OBS19 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS2_GPIO_OBS19__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS8 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS8__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS9 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS9__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS10 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS10__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS11 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS11__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS12 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS12__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS13 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS13__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS14 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS14__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS15 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS1_GPIO_OBS15__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS0 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS0__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS1__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS2__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS3 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS3__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS4 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS4__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS5 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS5__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS6 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS6__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS7 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_GPIOOBS0_GPIO_OBS7__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TSTOUT (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TSTOUT)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TSTOUT_TEST_OUT (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TSTOUT*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TSTOUT_TEST_OUT__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TSTOUT_TS (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TSTOUT*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TSTOUT_TS__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TSTSYS (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TSTSYS)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TSTSYS_DUPLMODE_OUT (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TSTSYS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TSTSYS_DUPLMODE_OUT__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TSTSYS_TBUSDUPLOUT_MSK (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TSTSYS*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TSTSYS_TBUSDUPLOUT_MSK__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2_TBUSXXX (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2_TBUSXXX__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2_TS_INT (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2_TS_INT__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2_TB_TMGCOHER (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX2_TB_TMGCOHER__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX1 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX1)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX1_TBUSXXX (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX1_TBUSXXX__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX0 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX0)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX0_TBUSXXX (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSXXX0_TBUSXXX__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_BITSPEED1 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_BITSPEED1)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_BITSPEED1_BITSPEED (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_BITSPEED1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_BITSPEED1_BITSPEED__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_BITSPEED0 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_BITSPEED0)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_BITSPEED0_BITSPEED (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_BITSPEED0*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_BITSPEED0_BITSPEED__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT1 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT1)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT1_TBUSBIT1_SELECT (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT1_TBUSBIT1_SELECT__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT1_OUT_BIT1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT1*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT1_OUT_BIT1__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT2 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT2)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT2_TBUSBIT2_SELECT (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT2_TBUSBIT2_SELECT__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT2_OUT_BIT2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT2*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_TBUSBIT2_OUT_BIT2__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG_I2CBIT_OBS2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG_I2CBIT_OBS2__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG_I2CMAPO2M_ON (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG_I2CMAPO2M_ON__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG_I2CBIT_OBS1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG_I2CBIT_OBS1__MASK)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG_I2CMAPO1M_ON (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPOCFG_I2CMAPO1M_ON__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO11 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO11)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO11_I2CMAP_OBS1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO11*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO11_I2CMAP_OBS1__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO10 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO10)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO10_I2CMAP_OBS1 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO10*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO10_I2CMAP_OBS1__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO21 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO21)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO21_I2CMAP_OBS2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO21*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO21_I2CMAP_OBS2__MASK)

#define REG_RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO20 (C8CODEW_TOP_CTRL[0] + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO20)
#define FLD_FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO20_I2CMAP_OBS2 (C8CODEW_TOP_CTRL[0]*(1<<16) + RC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO20*(1<<16) + FC8CODEW_C8CODEW_TOP_CTRL_I2CMAPO20_I2CMAP_OBS2__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRFCFG(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRFCFG)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCFG_AGCRF_BETA(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCFG_AGCRF_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCFG_AGCRF_OVADC_DETECT(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCFG_AGCRF_OVADC_DETECT__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCFG_AGCRF_DC_CTRL(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCFG_AGCRF_DC_CTRL__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRFRFN(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRFRFN)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFRFN_AGCRF_INFLIMIT(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFRFN*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFRFN_AGCRF_INFLIMIT__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFRFN_AGCRF_SUPLIMIT(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFRFN*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFRFN_AGCRF_SUPLIMIT__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRFCN(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRFCN)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCN_RST_AGCRF(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCN*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCN_RST_AGCRF__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCN_DIS_AGCRF_CTRL(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCN*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCN_DIS_AGCRF_CTRL__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCN_AGCRF_MINPOWER(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCN*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCN_AGCRF_MINPOWER__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCN_AGCRF_NOSLOWLK(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCN*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCN_AGCRF_NOSLOWLK__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCN_AGCRF_NOSIGNAL(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCN*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCN_AGCRF_NOSIGNAL__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFCN_AGCRF_LOCKED(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFCN*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFCN_AGCRF_LOCKED__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRFREF(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRFREF)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFREF_AGCRF_REF(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFREF*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFREF_AGCRF_REF__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG)
#define FLD_FC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG_DCCOMP_BETA(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG_DCCOMP_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG_AGC_PWM_SPEED(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG_AGC_PWM_SPEED__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG_AGCRFBB_PWM_SWAP(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_IQDC_AGCCFG_AGCRFBB_PWM_SWAP__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG)
#define FLD_FC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG_AGCRF_I2CCONSTEL_LIGNE(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG_AGCRF_I2CCONSTEL_LIGNE__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG_AGCRF_IDCCOMP_OV(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG_AGCRF_IDCCOMP_OV__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG_AGCRF_QDCCOMP_OV(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG*(1<<16) + FC8CODEW_DVBSX_AGCRF_IQDCCOMPCFG_AGCRF_QDCCOMP_OV__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP_AGCRF_IAVERAGE_ADJ(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP_AGCRF_IAVERAGE_ADJ__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP2(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP2)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP2_AGCRF_OVADCI(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP2*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_IDCCOMP2_AGCRF_OVADCI__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP_AGCRF_QAVERAGE_ADJ(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP_AGCRF_QAVERAGE_ADJ__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP2(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP2)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP2_AGCRF_OVADCQ(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP2*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_QDCCOMP2_AGCRF_OVADCQ__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_POWERI(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_POWERI)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_POWERI_AGCRF_POWER_I(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_POWERI*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_POWERI_AGCRF_POWER_I__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_POWERQ(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_POWERQ)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_POWERQ_AGCRF_POWER_Q(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_POWERQ*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_POWERQ_AGCRF_POWER_Q__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRFIN1(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRFIN1)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFIN1_AGCRF_VALUE(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFIN1*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFIN1_AGCRF_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRFIN0(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRFIN0)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRFIN0_AGCRF_VALUE(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRFIN0*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRFIN0_AGCRF_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCINC(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCINC)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCINC_AGC_REF_MSB(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCINC*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCINC_AGC_REF_MSB__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCINC_PWM_RF_INV(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCINC*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCINC_PWM_RF_INV__MASK)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCINC_PWM_BB_INV(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCINC*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCINC_PWM_BB_INV__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_TESTBUS(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_TESTBUS)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_TESTBUS_TAG2CBUS(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_TESTBUS*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_TESTBUS_TAG2CBUS__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_PWMRFINC(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_PWMRFINC)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_PWMRFINC_PWM_RF_INC(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_PWMRFINC*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_PWMRFINC_PWM_RF_INC__MASK)

#define REG_RC8CODEW_DVBSX_AGCRF_AGCRF_PWMBBINC(PATH) (DVBSX_AGCRF[PATH-1] + RC8CODEW_DVBSX_AGCRF_AGCRF_PWMBBINC)
#define FLD_FC8CODEW_DVBSX_AGCRF_AGCRF_PWMBBINC_PWM_BB_INC(PATH) (DVBSX_AGCRF[PATH-1]*(1<<16) + RC8CODEW_DVBSX_AGCRF_AGCRF_PWMBBINC*(1<<16) + FC8CODEW_DVBSX_AGCRF_AGCRF_PWMBBINC_PWM_BB_INC__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUX0 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUX0)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUX0_RFMUX_DEMOD_SEL_1 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUX0*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUX0_RFMUX_DEMOD_SEL_1__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUX1 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUX1)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUX1_RFMUX_DEMOD_SEL_2 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUX1*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUX1_RFMUX_DEMOD_SEL_2__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUX2 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUX2)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUX2_RFMUX_DEMOD_SEL_3 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUX2*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUX2_RFMUX_DEMOD_SEL_3__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUX3 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUX3)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUX3_RFMUX_DEMOD_SEL_4 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUX3*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUX3_RFMUX_DEMOD_SEL_4__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUX4 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUX4)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUX4_RFMUX_DEMOD_SEL_5 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUX4*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUX4_RFMUX_DEMOD_SEL_5__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUX5 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUX5)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUX5_RFMUX_DEMOD_SEL_6 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUX5*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUX5_RFMUX_DEMOD_SEL_6__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUX6 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUX6)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUX6_RFMUX_DEMOD_SEL_7 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUX6*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUX6_RFMUX_DEMOD_SEL_7__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUX7 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUX7)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUX7_RFMUX_DEMOD_SEL_8 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUX7*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUX7_RFMUX_DEMOD_SEL_8__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUXRV0 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUXRV0)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUXRV0_RFMUX_AGCRF_SEL_1 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUXRV0*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUXRV0_RFMUX_AGCRF_SEL_1__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUXRV1 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUXRV1)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUXRV1_RFMUX_AGCRF_SEL_2 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUXRV1*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUXRV1_RFMUX_AGCRF_SEL_2__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUXRV2 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUXRV2)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUXRV2_RFMUX_AGCRF_SEL_3 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUXRV2*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUXRV2_RFMUX_AGCRF_SEL_3__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_RFMUXRV3 (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_RFMUXRV3)
#define FLD_FC8CODEW_C8CODEW_RFMUX_RFMUXRV3_RFMUX_AGCRF_SEL_4 (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_RFMUXRV3*(1<<16) + FC8CODEW_C8CODEW_RFMUX_RFMUXRV3_RFMUX_AGCRF_SEL_4__MASK)

#define REG_RC8CODEW_C8CODEW_RFMUX_AGCRFXOR (C8CODEW_RFMUX[0] + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR)
#define FLD_FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCRF1_XOR (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR*(1<<16) + FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCRF1_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCRF2_XOR (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR*(1<<16) + FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCRF2_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCRF3_XOR (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR*(1<<16) + FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCRF3_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCRF4_XOR (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR*(1<<16) + FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCRF4_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCBB1_XOR (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR*(1<<16) + FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCBB1_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCBB2_XOR (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR*(1<<16) + FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCBB2_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCBB3_XOR (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR*(1<<16) + FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCBB3_XOR__MASK)
#define FLD_FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCBB4_XOR (C8CODEW_RFMUX[0]*(1<<16) + RC8CODEW_C8CODEW_RFMUX_AGCRFXOR*(1<<16) + FC8CODEW_C8CODEW_RFMUX_AGCRFXOR_AGCBB4_XOR__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISIRQCFG(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISIRQCFG)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENGAPBURST(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENGAPBURST__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENTXFIFO64B(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENTXFIFO64B__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENTXEND(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENTXEND__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENTIMEOUT(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENTIMEOUT__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENTRFINISH(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENTRFINISH__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENRXFIFO8B(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENRXFIFO8B__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENRXEND(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQCFG_ENRXEND__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISIRQSTAT(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISIRQSTAT)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQGAPBURST(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQSTAT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQGAPBURST__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQTXFIFO64B(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQSTAT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQTXFIFO64B__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQTXEND(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQSTAT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQTXEND__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQTIMEOUT(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQSTAT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQTIMEOUT__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQTRFINISH(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQSTAT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQTRFINISH__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQRXFIFO8B(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQSTAT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQRXFIFO8B__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQRXEND(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISIRQSTAT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISIRQSTAT_IRQRXEND__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISTXCFG(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISTXCFG)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXCFG_DISEQC_MODE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXCFG_DISEQC_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXCFG_DIS_PRECHARGE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXCFG_DIS_PRECHARGE__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXCFG_ENVELOP(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXCFG_ENVELOP__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXCFG_TIM_CMD(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXCFG_TIM_CMD__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXCFG_TIM_OFF(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXCFG_TIM_OFF__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXCFG_DISTX_RESET(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXCFG_DISTX_RESET__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISTXSTATUS(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISTXSTATUS)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TR_FINISH(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXSTATUS*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TR_FINISH__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TR_TIMEOUT(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXSTATUS*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TR_TIMEOUT__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TX_END(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXSTATUS*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TX_END__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TX_FIFO64B(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXSTATUS*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TX_FIFO64B__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_GAP_BURST(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXSTATUS*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_GAP_BURST__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TX_IDLE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXSTATUS*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TX_IDLE__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TX_FIFO_FULL(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXSTATUS*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXSTATUS_TX_FIFO_FULL__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISTXBYTES(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISTXBYTES)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXBYTES_TXFIFO_BYTES(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXBYTES*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXBYTES_TXFIFO_BYTES__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISTXFIFO(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISTXFIFO)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXFIFO_DISEQC_TX_FIFO(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXFIFO*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXFIFO_DISEQC_TX_FIFO__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISTXF22(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISTXF22)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXF22_F22TX(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXF22*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXF22_F22TX__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISTXWAIT(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISTXWAIT)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTXWAIT_DISTXWAIT_VAL(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTXWAIT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTXWAIT_DISTXWAIT_VAL__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISTIMEOCFG(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISTIMEOCFG)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTIMEOCFG_TIMEOUT_OFF(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTIMEOCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTIMEOCFG_TIMEOUT_OFF__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTIMEOCFG_RXCHOICE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTIMEOCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTIMEOCFG_RXCHOICE__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTIMEOCFG_ONECHIP_TRX(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTIMEOCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTIMEOCFG_ONECHIP_TRX__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISTIMEOUT(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISTIMEOUT)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISTIMEOUT_TIMEOUT_COUNT(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISTIMEOUT*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISTIMEOUT_TIMEOUT_COUNT__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXCFG(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXCFG)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXCFG_DISRX_ON(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXCFG_DISRX_ON__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXCFG_SIGNED_RXIN(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXCFG_SIGNED_RXIN__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXCFG_IGNORE_SHORT22K(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXCFG_IGNORE_SHORT22K__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXCFG_PINSELECT(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXCFG_PINSELECT__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXCFG_EXTENVELOP(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXCFG_EXTENVELOP__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXCFG_DISRX_RESET(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXCFG*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXCFG_DISRX_RESET__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXSTAT1(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXSTAT1)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_FIFOEMPTY(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_FIFOEMPTY__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_8BFIFOREADY(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_8BFIFOREADY__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_CONTTONE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_CONTTONE__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_RXDETECT(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_RXDETECT__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_RXACTIVE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_RXACTIVE__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_RXEND(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT1_RXEND__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXSTAT0(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXSTAT0)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_RXMSGLOST(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT0*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_RXMSGLOST__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_SHORT22K(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT0*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_SHORT22K__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_FIFOOVF(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT0*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_FIFOOVF__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_RXNONBYTE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT0*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_RXNONBYTE__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_FIFOPFAIL(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT0*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_FIFOPFAIL__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_RXFAIL(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSTAT0*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSTAT0_RXFAIL__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXBYTES(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXBYTES)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXBYTES_RXFIFO_BYTES(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXBYTES*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXBYTES_RXFIFO_BYTES__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXPARITY1(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXPARITY1)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXPARITY1_DISRX_PARITY(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXPARITY1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXPARITY1_DISRX_PARITY__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXPARITY0(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXPARITY0)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXPARITY0_DISRX_PARITY(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXPARITY0*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXPARITY0_DISRX_PARITY__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXFIFO(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXFIFO)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXFIFO_DISEQC_RX_FIFO(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXFIFO*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXFIFO_DISEQC_RX_FIFO__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXDC1(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXDC1)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXDC1_DC_VALUE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXDC1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXDC1_DC_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXDC0(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXDC0)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXDC0_DC_VALUE(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXDC0*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXDC0_DC_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXKOFF(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXKOFF)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXKOFF_K_OFFSET_EXP(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXKOFF*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXKOFF_K_OFFSET_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXKOFF_K_OFFSET_MAN(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXKOFF*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXKOFF_K_OFFSET_MAN__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXF221(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXF221)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXF221_F22RX(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXF221*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXF221_F22RX__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXF220(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXF220)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXF220_F22RX(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXF220*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXF220_F22RX__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXF100(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXF100)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXF100_F100RX(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXF100*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXF100_F100RX__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXK1(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXK1)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXK1_K1_OFFSET_EXP(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXK1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXK1_K1_OFFSET_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXK1_K1K2_FACTOR2X(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXK1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXK1_K1K2_FACTOR2X__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXK1_K1_OFFSET_MAN(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXK1*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXK1_K1_OFFSET_MAN__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXK2(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXK2)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXK2_K2_OFFSET_EXP(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXK2*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXK2_K2_OFFSET_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXK2_K2_OFFSET_MAN(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXK2*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXK2_K2_OFFSET_MAN__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXPK(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXPK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXPK_APK(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXPK*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXPK_APK__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXPK_BPK(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXPK*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXPK_BPK__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXENV(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXENV)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXENV_ATH(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXENV*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXENV_ATH__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXENV_K_ENV(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXENV*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXENV_K_ENV__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXVMIN(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXVMIN)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXVMIN_VMIN(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXVMIN*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXVMIN_VMIN__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_DISRXSHORT22K(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_DISRXSHORT22K)
#define FLD_FC8CODEW_DVBSX_DISEQC_DISRXSHORT22K_SHORT22K_LENGTH(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_DISRXSHORT22K*(1<<16) + FC8CODEW_DVBSX_DISEQC_DISRXSHORT22K_SHORT22K_LENGTH__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_ACRPRESC(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_ACRPRESC)
#define FLD_FC8CODEW_DVBSX_DISEQC_ACRPRESC_ACR_PRESC(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_ACRPRESC*(1<<16) + FC8CODEW_DVBSX_DISEQC_ACRPRESC_ACR_PRESC__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQC_ACRPRESC_ACR_CODFRDY(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_ACRPRESC*(1<<16) + FC8CODEW_DVBSX_DISEQC_ACRPRESC_ACR_CODFRDY__MASK)

#define REG_RC8CODEW_DVBSX_DISEQC_ACRDIV(PATH) (DVBSX_DISEQC[PATH-1] + RC8CODEW_DVBSX_DISEQC_ACRDIV)
#define FLD_FC8CODEW_DVBSX_DISEQC_ACRDIV_ACR_DIV(PATH) (DVBSX_DISEQC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQC_ACRDIV*(1<<16) + FC8CODEW_DVBSX_DISEQC_ACRDIV_ACR_DIV__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISTBUS(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISTBUS)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISTBUS_TBUS_DISRXCFG(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISTBUS*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISTBUS_TBUS_DISRXCFG__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISTBUS_TBUS_DISTXCFG(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISTBUS*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISTBUS_TBUS_DISTXCFG__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISTSTCFG(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISTSTCFG)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISTSTCFG_USE_PRBS(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISTSTCFG*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISTSTCFG_USE_PRBS__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISTSTCFG_START_PRBS(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISTSTCFG*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISTSTCFG_START_PRBS__MASK)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISTSTCFG_RESET_RXSPY(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISTSTCFG*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISTSTCFG_RESET_RXSPY__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISPRBSEED(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISPRBSEED)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISPRBSEED_PRBS_SEED(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISPRBSEED*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISPRBSEED_PRBS_SEED__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT1(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT1)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT1_PRBS_COUNT(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT1*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT1_PRBS_COUNT__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT0(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT0)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT0_PRBS_COUNT(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT0*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISPRBSCNT0_PRBS_COUNT__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR1(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR1)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR1_RXSPY_ERRCOUNT(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR1*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR1_RXSPY_ERRCOUNT__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR0(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR0)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR0_RXSPY_ERRCOUNT(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR0*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISRXSPYERR0_RXSPY_ERRCOUNT__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT1(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT1)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT1_RXSPY_COUNT(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT1*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT1_RXSPY_COUNT__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT0(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT0)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT0_RXSPY_COUNT(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT0*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISRXSPYCNT0_RXSPY_COUNT__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN1(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN1)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN1_PEAK_MEAN(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN1*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN1_PEAK_MEAN__MASK)

#define REG_RC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN0(PATH) (DVBSX_DISEQCTST[PATH-1] + RC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN0)
#define FLD_FC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN0_PEAK_MEAN(PATH) (DVBSX_DISEQCTST[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN0*(1<<16) + FC8CODEW_DVBSX_DISEQCTST_DISRXPEAKMEAN0_PEAK_MEAN__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKTFC2 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKTFC2)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTFC2_FSKT_CAR (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTFC2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTFC2_FSKT_CAR__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTFC2_FSKT_KMOD (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTFC2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTFC2_FSKT_KMOD__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKTFC1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKTFC1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTFC1_FSKT_CAR (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTFC1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTFC1_FSKT_CAR__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKTFC0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKTFC0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTFC0_FSKT_CAR (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTFC0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTFC0_FSKT_CAR__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKTDELTAF1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKTDELTAF1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTDELTAF1_FSKT_DELTAF (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTDELTAF1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTDELTAF1_FSKT_DELTAF__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKTDELTAF0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKTDELTAF0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTDELTAF0_FSKT_DELTAF (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTDELTAF0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTDELTAF0_FSKT_DELTAF__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKTCTRL (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKTCTRL)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_DACMODE (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTCTRL*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_DACMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_MOD_EN (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTCTRL*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_MOD_EN__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_MOD_SGN (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTCTRL*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_MOD_SGN__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_EN_SGN (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTCTRL*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_EN_SGN__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_PINSEL (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKTCTRL*(1<<16) + FC8CODEW_DVBSX_FSK_FSKTCTRL_FSKT_PINSEL__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRFC2 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRFC2)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFC2_FSKR_CAR (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFC2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFC2_FSKR_CAR__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFC2_FSKR_KAGC (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFC2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFC2_FSKR_KAGC__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFC2_FSKR_OUTSGN (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFC2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFC2_FSKR_OUTSGN__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFC2_FSKR_DETSGN (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFC2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFC2_FSKR_DETSGN__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRFC1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRFC1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFC1_FSKR_CAR (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFC1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFC1_FSKR_CAR__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRFC0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRFC0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFC0_FSKR_CAR (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFC0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFC0_FSKR_CAR__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRK1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRK1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRK1_FSKR_K1_MANT (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRK1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRK1_FSKR_K1_MANT__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRK1_FSKR_K1_EXP (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRK1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRK1_FSKR_K1_EXP__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRK2 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRK2)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRK2_FSKR_K2_MANT (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRK2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRK2_FSKR_K2_MANT__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRK2_FSKR_K2_EXP (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRK2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRK2_FSKR_K2_EXP__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRAGCR (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRAGCR)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRAGCR_FSKR_AGC_REF (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRAGCR*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRAGCR_FSKR_AGC_REF__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRAGCR_FSKR_OUTCTL (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRAGCR*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRAGCR_FSKR_OUTCTL__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRAGC (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRAGC)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRAGC_FSKR_AGC_ACCU (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRAGC*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRAGC_FSKR_AGC_ACCU__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRALPHA (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRALPHA)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRALPHA_FSKR_ALPHA_M (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRALPHA*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRALPHA_FSKR_ALPHA_M__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRALPHA_FSKR_ALPHA_EXP (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRALPHA*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRALPHA_FSKR_ALPHA_EXP__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRPLTH1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRPLTH1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRPLTH1_FSKR_PLL_TRESH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRPLTH1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRPLTH1_FSKR_PLL_TRESH__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRPLTH1_FSKR_BETA (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRPLTH1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRPLTH1_FSKR_BETA__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRPLTH0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRPLTH0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRPLTH0_FSKR_PLL_TRESH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRPLTH0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRPLTH0_FSKR_PLL_TRESH__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRDF1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRDF1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDF1_FSKR_DELTAF (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDF1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDF1_FSKR_DELTAF__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDF1_FSKR_STATE (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDF1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDF1_FSKR_STATE__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDF1_FSKR_OUT (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDF1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDF1_FSKR_OUT__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRDF0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRDF0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDF0_FSKR_DELTAF (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDF0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDF0_FSKR_DELTAF__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRSTEPP (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRSTEPP)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRSTEPP_FSKR_STEP_PLUS (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRSTEPP*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRSTEPP_FSKR_STEP_PLUS__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRSTEPM (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRSTEPM)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRSTEPM_FSKR_STEP_MINUS (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRSTEPM*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRSTEPM_FSKR_STEP_MINUS__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRDET1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRDET1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDET1_FSKR_CARDET_ACCU (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDET1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDET1_FSKR_CARDET_ACCU__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDET1_FSKR_DETECT (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDET1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDET1_FSKR_DETECT__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRDET0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRDET0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDET0_FSKR_CARDET_ACCU (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDET0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDET0_FSKR_CARDET_ACCU__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRDTH1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRDTH1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDTH1_FSKR_CARDET_THRESH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDTH1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDTH1_FSKR_CARDET_THRESH__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDTH1_FSKR_CARLOSS_THRESH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDTH1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDTH1_FSKR_CARLOSS_THRESH__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRDTH0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRDTH0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDTH0_FSKR_CARDET_THRESH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDTH0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDTH0_FSKR_CARDET_THRESH__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRLOSS (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRLOSS)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRLOSS_FSKR_CARLOSS_THRESH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRLOSS*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRLOSS_FSKR_CARLOSS_THRESH__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRLEAK (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRLEAK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRLEAK_FSKR_LEAK (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRLEAK*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRLEAK_FSKR_LEAK__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRAGCTH (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRAGCTH)

#define REG_RC8CODEW_DVBSX_FSK_FSKRFINIIR (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRFINIIR)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFINIIR_FSKR_FIN_TCSTE (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFINIIR*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFINIIR_FSKR_FIN_TCSTE__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFINIIR_FSKR_SCALE_EXP (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFINIIR*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFINIIR_FSKR_SCALE_EXP__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRFBIT1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRFBIT1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFBIT1_FSKR_BITFREQ_REG (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFBIT1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFBIT1_FSKR_BITFREQ_REG__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRFBIT0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRFBIT0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFBIT0_FSKR_BITFREQ_REG (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFBIT0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFBIT0_FSKR_BITFREQ_REG__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRMINSTART (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRMINSTART)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRMINSTART_FSKR_MIN_START_THRES (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRMINSTART*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRMINSTART_FSKR_MIN_START_THRES__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRMAXSTART (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRMAXSTART)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRMAXSTART_FSKR_MAX_START_THRES (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRMAXSTART*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRMAXSTART_FSKR_MAX_START_THRES__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRPEAKDIF (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRPEAKDIF)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRPEAKDIF_FSKR_PEAK_DIFF_THRES (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRPEAKDIF*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRPEAKDIF_FSKR_PEAK_DIFF_THRES__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRMINPK (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRMINPK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRMINPK_FSKR_SLICER_MIN_PEAK (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRMINPK*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRMINPK_FSKR_SLICER_MIN_PEAK__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRMAXPK (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRMAXPK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRMAXPK_FSKR_SLICER_MAX_PEAK (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRMAXPK*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRMAXPK_FSKR_SLICER_MAX_PEAK__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRFWDWN (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRFWDWN)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFWDWN_FSKR_FW_DWN_STEP (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFWDWN*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFWDWN_FSKR_FW_DWN_STEP__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRFWTH (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRFWTH)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRFWTH_FSKR_FW_THRES (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRFWTH*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRFWTH_FSKR_FW_THRES__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRINITDEV (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRINITDEV)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRINITDEV_FSKR_INIT_DEVIATION (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRINITDEV*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRINITDEV_FSKR_INIT_DEVIATION__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRMINDEV (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRMINDEV)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRMINDEV_FSKR_MIN_DEVIATION (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRMINDEV*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRMINDEV_FSKR_MIN_DEVIATION__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRMAXDEV (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRMAXDEV)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRMAXDEV_FSKR_MAX_DEVIATION (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRMAXDEV*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRMAXDEV_FSKR_MAX_DEVIATION__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRMAXTERR (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRMAXTERR)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRMAXTERR_FSKR_MAX_TMG_ERR (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRMAXTERR*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRMAXTERR_FSKR_MAX_TMG_ERR__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRKTMG (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRKTMG)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRKTMG_FSKR_KTMG (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRKTMG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRKTMG_FSKR_KTMG__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRKTMG_FSKR_REF_TCSTE (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRKTMG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRKTMG_FSKR_REF_TCSTE__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRLOW (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRLOW)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRLOW_FSKR_SLICER_LOW_REF (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRLOW*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRLOW_FSKR_SLICER_LOW_REF__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRHIGH (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRHIGH)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRHIGH_FSKR_SLICER_HIGH_REF (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRHIGH*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRHIGH_FSKR_SLICER_HIGH_REF__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRWORDVAL3 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRWORDVAL3)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRWORDVAL3_FSKR_STARTWORD_VAL (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRWORDVAL3*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRWORDVAL3_FSKR_STARTWORD_VAL__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRWORDVAL2 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRWORDVAL2)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRWORDVAL2_FSKR_STARTWORD_VAL (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRWORDVAL2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRWORDVAL2_FSKR_STARTWORD_VAL__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRWORDVAL1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRWORDVAL1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRWORDVAL1_FSKR_STARTWORD_VAL (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRWORDVAL1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRWORDVAL1_FSKR_STARTWORD_VAL__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRWORDVAL0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRWORDVAL0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRWORDVAL0_FSKR_STARTWORD_VAL (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRWORDVAL0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRWORDVAL0_FSKR_STARTWORD_VAL__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRWORDMSK3 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRWORDMSK3)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRWORDMSK3_FSKR_STARTWORD_MSK (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRWORDMSK3*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRWORDMSK3_FSKR_STARTWORD_MSK__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRWORDMSK2 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRWORDMSK2)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRWORDMSK2_FSKR_STARTWORD_MSK (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRWORDMSK2*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRWORDMSK2_FSKR_STARTWORD_MSK__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRWORDMSK1 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRWORDMSK1)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRWORDMSK1_FSKR_STARTWORD_MSK (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRWORDMSK1*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRWORDMSK1_FSKR_STARTWORD_MSK__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRWORDMSK0 (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRWORDMSK0)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRWORDMSK0_FSKR_STARTWORD_MSK (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRWORDMSK0*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRWORDMSK0_FSKR_STARTWORD_MSK__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRDELAYLG (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRDELAYLG)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRDELAYLG_FSKR_DELAY_LENGTH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRDELAYLG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRDELAYLG_FSKR_DELAY_LENGTH__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRSTOPLG (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRSTOPLG)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRSTOPLG_FSKR_MESSAGE_LENGTH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRSTOPLG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRSTOPLG_FSKR_MESSAGE_LENGTH__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRSTOPLG_FSKR_STOP_LENGTH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRSTOPLG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRSTOPLG_FSKR_STOP_LENGTH__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRMESLG (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRMESLG)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRMESLG_FSKR_MESSAGE_LENGTH (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRMESLG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRMESLG_FSKR_MESSAGE_LENGTH__MASK)

#define REG_RC8CODEW_DVBSX_FSK_FSKRCFG (DVBSX_FSK[0] + RC8CODEW_DVBSX_FSK_FSKRCFG)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_DETECT_CFG (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRCFG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_DETECT_CFG__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_INV_DATA (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRCFG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_INV_DATA__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_STARTWORD_OFFSET (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRCFG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_STARTWORD_OFFSET__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_RESET_FSM (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRCFG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_RESET_FSM__MASK)
#define FLD_FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_OLD_DATA_EN (DVBSX_FSK[0]*(1<<16) + RC8CODEW_DVBSX_FSK_FSKRCFG*(1<<16) + FC8CODEW_DVBSX_FSK_FSKRCFG_FSKR_OLD_DATA_EN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VER (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VER)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VER_LNB_IP_VERSION (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VER*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VER_LNB_IP_VERSION__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_FPWM0 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_FPWM0)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_FPWM0_FPWM (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_FPWM0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_FPWM0_FPWM__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_FPWM1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_FPWM1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_FPWM1_FPWM (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_FPWM1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_FPWM1_FPWM__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_FADC0 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_FADC0)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_FADC0_FADC (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_FADC0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_FADC0_FADC__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_FADC1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_FADC1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_FADC1_FADC (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_FADC1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_FADC1_FADC__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_FTIMER (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_FTIMER)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_FTIMER_FTIMER (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_FTIMER*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_FTIMER_FTIMER__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_VLNB_ON_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_VLNB_ON_EN__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_VLNB_SEL (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_VLNB_SEL__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_LOWI_CTRL_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_LOWI_CTRL_EN__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_FPWM_HALF_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_FPWM_HALF_EN__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_PWM_OPENLOOP (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VCTRL_PWM_OPENLOOP__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_DMAX (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_DMAX)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DMAX_PWM_DMAX (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DMAX*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DMAX_PWM_DMAX__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_DFORCED (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_DFORCED)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DFORCED_PWM_DFORCED (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DFORCED*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DFORCED_PWM_DFORCED__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL0 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL0)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VSEL0_VSENSE_MAX (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VSEL0_VSENSE_MAX__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VSEL1_VSENSE_HIGH (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VSEL1_VSENSE_HIGH__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL2 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL2)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VSEL2_VSENSE_LOW (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL2*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VSEL2_VSENSE_LOW__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL3 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL3)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VSEL3_VSENSE_MIN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VSEL3*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VSEL3_VSENSE_MIN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT0 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT0)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT0_DCFLT_K_EXP (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT0_DCFLT_K_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT0_DCFLT_K_MAN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT0_DCFLT_K_MAN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT1_DCFLT_ORDER (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DCFLT1_DCFLT_ORDER__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT0 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT0)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT0_LOOPFLT_GP_EXP (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT0_LOOPFLT_GP_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT0_LOOPFLT_GP_MAN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT0_LOOPFLT_GP_MAN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT1_LOOPFLT_GI_EXP (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT1_LOOPFLT_GI_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT1_LOOPFLT_GI_MAN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOOPFLT1_LOOPFLT_GI_MAN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE1_VSTABLE_TIME (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE1_VSTABLE_TIME__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE1_VSTABLE_TH (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE1_VSTABLE_TH__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE2 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE2)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE2_VTRANS_TIMEOUT (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE2*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VSTABLE2_VTRANS_TIMEOUT__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF0 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF0)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF0_ISENSE_TEN_EXP (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF0_ISENSE_TEN_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF0_ISENSE_TEN_MAN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF0_ISENSE_TEN_MAN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1_ISENSE_TDIS_RATIO (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1_ISENSE_TDIS_RATIO__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1_ISENSE_LIMIT_MODE (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1_ISENSE_LIMIT_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1_ISENSE_LIMIT_K (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ISAF1_ISENSE_LIMIT_K__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_SCSAF (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_SCSAF)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_SCSAF_SC_TON_EXP (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_SCSAF*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_SCSAF_SC_TON_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_SCSAF_SC_TON_MAN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_SCSAF*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_SCSAF_SC_TON_MAN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0_OC_TON_EXP (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0_OC_TON_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0_OC_TON_MAN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0_OC_TON_MAN__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0_OCSAF_DIS (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF0_OCSAF_DIS__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1_OC_TOFF_RATIO (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1_OC_TOFF_RATIO__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1_VLNB_ON_POCL_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1_VLNB_ON_POCL_EN__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1_VLNB_OFF_CLR (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1_VLNB_OFF_CLR__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1_VLNB_OFF_DLY (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_OCSAF1_VLNB_OFF_DLY__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0_DSQDRV_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0_DSQDRV_EN__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0_DSQDRV_MODE (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0_DSQDRV_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0_DSQDRV_AGC_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV0_DSQDRV_AGC_EN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV1_DSQDRV_AMP_TH (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV1_DSQDRV_AMP_TH__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV1_DSQDRV_AGC_SPEED (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV1_DSQDRV_AGC_SPEED__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV2 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV2)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV2_DSQDRV_DC (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV2*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV2_DSQDRV_DC__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV2_DSQDRV_GAIN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV2*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV2_DSQDRV_GAIN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV3 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV3)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV3_DSQDRV_K_EXP (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV3*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV3_DSQDRV_K_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV3_DSQDRV_K_MAN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV3*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_DSQDRV3_DSQDRV_K_MAN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1_LOWI_CTRL_MODE (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1_LOWI_CTRL_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1_LOWI_CTRL_START (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1_LOWI_CTRL_START__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1_LOWI_CTRL_FORCED (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL1_LOWI_CTRL_FORCED__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL2 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL2)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL2_LOWI_CTRL_DC (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL2*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL2_LOWI_CTRL_DC__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL2_LOWI_CTRL_TH (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL2*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL2_LOWI_CTRL_TH__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL3 (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL3)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL3_LOWI_CTRL_TIME (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL3*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_LOWICTRL3_LOWI_CTRL_TIME__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_ISENSE_OVER_STATUS (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_ISENSE_OVER_STATUS__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_SC_OVER_STATUS (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_SC_OVER_STATUS__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_OC_OVER_STATUS (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_OC_OVER_STATUS__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_VSTABLE_STATUS (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_VSTABLE_STATUS__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_LOWI_STATUS (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_SAFSTAT_LOWI_STATUS__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_VSENSESTAT (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_VSENSESTAT)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_VSENSESTAT_VSENSE_STATUS (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_VSENSESTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_VSENSESTAT_VSENSE_STATUS__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_PWMDSTAT (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_PWMDSTAT)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_PWMDSTAT_PWM_DATA_STATUS (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_PWMDSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_PWMDSTAT_PWM_DATA_STATUS__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_ITEN (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_ITEN)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ITEN_ISENSE_OVER_IT_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ITEN*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ITEN_ISENSE_OVER_IT_EN__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ITEN_SC_OVER_IT_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ITEN*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ITEN_SC_OVER_IT_EN__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ITEN_OC_OVER_IT_EN (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ITEN*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ITEN_OC_OVER_IT_EN__MASK)

#define REG_RC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT (DVBSX_LNBCTRL[0] + RC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT_ISENSE_OVER_IT_STAT (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT_ISENSE_OVER_IT_STAT__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT_SC_OVER_IT_STAT (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT_SC_OVER_IT_STAT__MASK)
#define FLD_FC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT_OC_OVER_IT_STAT (DVBSX_LNBCTRL[0]*(1<<16) + RC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT*(1<<16) + FC8CODEW_DVBSX_LNBCTRL_LNB_ITSTAT_OC_OVER_IT_STAT__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_STOPCLK(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_STOPCLK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_STOPCLK_STOP_CKDEMOD(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_STOPCLK*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_STOPCLK_STOP_CKDEMOD__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_STOPCLK_STOP_CKDVBS1FEC(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_STOPCLK*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_STOPCLK_STOP_CKDVBS1FEC__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_STOPCLK_STOP_CKDVBS2FEC(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_STOPCLK*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_STOPCLK_STOP_CKDVBS2FEC__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_FRES(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_FRES)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_FRES_FRESSYM(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_FRES*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_FRES_FRESSYM__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_FRES_FRESVIT(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_FRES*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_FRES_FRESVIT__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_FRES_FRESSFEC(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_FRES*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_FRES_FRESSFEC__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_FRES_FRESPKTD(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_FRES*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_FRES_FRESPKTD__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1_MFEC_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1_MFEC_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1_MSTREAM_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1_MSTREAM_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1_MIRQ_SPY_ENDSIM(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1_MIRQ_SPY_ENDSIM__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1_MSTROUT(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK1_MSTROUT__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MDEMOD_IRQ(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MDEMOD_IRQ__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MDEMOD_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MDEMOD_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MDEMOD_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MDEMOD_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MDVBS1_PRF(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MDVBS1_PRF__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MPKTDEL_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MPKTDEL_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MPKTDEL_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MPKTDEL_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MPKTDEL_ERROR(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MPKTDEL_ERROR__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MFEC_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQMSK0_MFEC_LOCK__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1_SFEC_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1_SFEC_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1_SSTREAM_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1_SSTREAM_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1_SIRQ_SPY_ENDSIM(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1_SIRQ_SPY_ENDSIM__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1_SSTROUT(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS1_SSTROUT__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SDEMOD_IRQ(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SDEMOD_IRQ__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SDEMOD_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SDEMOD_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SDEMOD_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SDEMOD_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SDVBS1_PRF(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SDVBS1_PRF__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SPKTDEL_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SPKTDEL_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SPKTDEL_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SPKTDEL_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SPKTDEL_ERROR(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SPKTDEL_ERROR__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SFEC_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQSTATUS0_SFEC_LOCK__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1_FFEC_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1_FFEC_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1_FSTREAM_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1_FSTREAM_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1_FIRQ_SPY_ENDSIM(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1_FIRQ_SPY_ENDSIM__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1_FSTROUT(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE1_FSTROUT__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FDEMOD_IRQ(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FDEMOD_IRQ__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FDEMOD_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FDEMOD_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FDEMOD_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FDEMOD_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FDVBS1_PRF(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FDVBS1_PRF__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FPKTDEL_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FPKTDEL_LOCK__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FPKTDEL_LOCKB(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FPKTDEL_LOCKB__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FPKTDEL_ERROR(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FPKTDEL_ERROR__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FFEC_LOCK(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_IRQFORCE0_FFEC_LOCK__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS0(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS0)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS0_STREAMSTATUS0_SEL(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS0*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS0_STREAMSTATUS0_SEL__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS1(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS1)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS1_STREAMSTATUS1_SEL(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS1*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS1_STREAMSTATUS1_SEL__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS2(PATH) (C8CODEW_PATH_CTRL[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS2)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS2_STREAMSTATUS2_SEL(PATH) (C8CODEW_PATH_CTRL[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS2*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_STRSTATUS2_STREAMSTATUS2_SEL__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN_FRESTS(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN_FRESTS__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN_FRESMAS(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN_FRESMAS__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN_FRESINT(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN_FRESINT__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN_FRESI2C(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_GEN_FRESGEN_FRESI2C__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_GEN_TBUSSEL(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_GEN_TBUSSEL)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_GEN_TBUSSEL_TBUS_SELECT(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_GEN_TBUSSEL*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_GEN_TBUSSEL_TBUS_SELECT__MASK)

#define REG_RC8CODEW_C8CODEW_PATH_CTRL_GEN_BYPASSEN(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1] + RC8CODEW_C8CODEW_PATH_CTRL_GEN_BYPASSEN)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_GEN_BYPASSEN_DEMOD_BYP(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_GEN_BYPASSEN*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_GEN_BYPASSEN_DEMOD_BYP__MASK)
#define FLD_FC8CODEW_C8CODEW_PATH_CTRL_GEN_BYPASSEN_DVBS2FEC_BYPASS(PATH) (C8CODEW_PATH_CTRL_GEN[PATH-1]*(1<<16) + RC8CODEW_C8CODEW_PATH_CTRL_GEN_BYPASSEN*(1<<16) + FC8CODEW_C8CODEW_PATH_CTRL_GEN_BYPASSEN_DVBS2FEC_BYPASS__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1(PATH) (DVBSX_HWARE_GEN[PATH-1] + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_SCRAUL_UNSYNC(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_SCRAUL_UNSYNC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_SCRAULBAD(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_SCRAULBAD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_UL_SCRAMBDETECY(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_UL_SCRAMBDETECY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_NOT_UL_SCRAMBDETECT(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_NOT_UL_SCRAMBDETECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_DILUL_NOSCRAMBLER(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_DILUL_NOSCRAMBLER__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_SUL_SELECTOS(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_SUL_SELECTOS__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_ULDTV67_FALSELOCK_DETECTM(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_ULDTV67_FALSELOCK_DETECTM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_SDESC_UNSYNCOS(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG1_SDESC_UNSYNCOS__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0(PATH) (DVBSX_HWARE_GEN[PATH-1] + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_SCRALL_UNSYNC(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_SCRALL_UNSYNC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_SCRALLBAD(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_SCRALLBAD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_LL_SCRAMBDETECT(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_LL_SCRAMBDETECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_NOT_LL_SCRAMBDETECT(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_NOT_LL_SCRAMBDETECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_DILLL_NOSCRAMBLER(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_DILLL_NOSCRAMBLER__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_NOT_SUL_SELECTOS(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_NOT_SUL_SELECTOS__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_LLDTV67_FALSELOCK_DETECTM(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_LLDTV67_FALSELOCK_DETECTM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_RS_ERR(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_RCDEBUG0_RS_ERR__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_GEN_TSGENERAL(PATH) (DVBSX_HWARE_GEN[PATH-1] + RC8CODEW_DVBSX_HWARE_GEN_TSGENERAL)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_RST_REEDSOLO(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENERAL*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_RST_REEDSOLO__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_TSFIFO_PERMPARAL(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENERAL*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_TSFIFO_PERMPARAL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_MUXSTREAM_OUTMODE(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENERAL*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_MUXSTREAM_OUTMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_MUXSTREAM_COMPMODE(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENERAL*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_MUXSTREAM_COMPMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_TSFIFO_DISTS2PAR(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENERAL*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_TSFIFO_DISTS2PAR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_EN_LGNERROR(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENERAL*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENERAL_EN_LGNERROR__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2(PATH) (DVBSX_HWARE_GEN[PATH-1] + RC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_PCRCLK_DEFMODE(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_PCRCLK_DEFMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_INVTSIN_EXTNCR1(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_INVTSIN_EXTNCR1__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_TSFIFO_ULTRABS(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_TSFIFO_ULTRABS__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_TSUFBS_PATHSEL(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_TSUFBS_PATHSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_TSUFBS_ITSEL(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGENCFG2_TSUFBS_ITSEL__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS(PATH) (DVBSX_HWARE_GEN[PATH-1] + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSFIFORC_DEMODSEL(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSFIFORC_DEMODSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSFIFO2_DEMODSEL(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSFIFO2_DEMODSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSFIFO1_DEMODSEL(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSFIFO1_DEMODSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_RSIN_OVERTIME(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_RSIN_OVERTIME__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_RS_MULTCALC(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_RS_MULTCALC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_RSMEM_FULL(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_RSMEM_FULL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSUFBS1_ENABLE(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSUFBS1_ENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSUFBS2_ENABLE(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSGSTATUS_TSUFBS2_ENABLE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_GEN_TSRSCFG(PATH) (DVBSX_HWARE_GEN[PATH-1] + RC8CODEW_DVBSX_HWARE_GEN_TSRSCFG)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSRSCFG_MAX_ERASURES(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSRSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSRSCFG_MAX_ERASURES__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSRSCFG_NOVER_RSERASURE(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSRSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSRSCFG_NOVER_RSERASURE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSRSCFG_RSER_MULTIPASSES(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSRSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSRSCFG_RSER_MULTIPASSES__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSRSCFG_DIS_RSTOVF(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSRSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSRSCFG_DIS_RSTOVF__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_GEN_TSTTSRS(PATH) (DVBSX_HWARE_GEN[PATH-1] + RC8CODEW_DVBSX_HWARE_GEN_TSTTSRS)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSTTSRS_TSTRS_DISRS1(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSTTSRS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSTTSRS_TSTRS_DISRS1__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSTTSRS_TSTRS_DISRS2(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSTTSRS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSTTSRS_TSTRS_DISRS2__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSTTSRS_DIS_RSINKILL(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSTTSRS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSTTSRS_DIS_RSINKILL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_GEN_TSTTSRS_REMOVE_ALLBUGS(PATH) (DVBSX_HWARE_GEN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_GEN_TSTTSRS*(1<<16) + FC8CODEW_DVBSX_HWARE_GEN_TSTTSRS_REMOVE_ALLBUGS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_IQCONST(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_IQCONST)
#define FLD_FC8CODEW_DVBSX_DEMOD_IQCONST_IQSYMB_SEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_IQCONST*(1<<16) + FC8CODEW_DVBSX_DEMOD_IQCONST_IQSYMB_SEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_IQCONST_CONSTEL_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_IQCONST*(1<<16) + FC8CODEW_DVBSX_DEMOD_IQCONST_CONSTEL_SELECT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_IQOPTION(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_IQOPTION)
#define FLD_FC8CODEW_DVBSX_DEMOD_IQOPTION_I2CCONSTEL_LIGNE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_IQOPTION*(1<<16) + FC8CODEW_DVBSX_DEMOD_IQOPTION_I2CCONSTEL_LIGNE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ISYMB(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ISYMB)
#define FLD_FC8CODEW_DVBSX_DEMOD_ISYMB_I_SYMBOL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ISYMB*(1<<16) + FC8CODEW_DVBSX_DEMOD_ISYMB_I_SYMBOL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_QSYMB(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_QSYMB)
#define FLD_FC8CODEW_DVBSX_DEMOD_QSYMB_Q_SYMBOL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_QSYMB*(1<<16) + FC8CODEW_DVBSX_DEMOD_QSYMB_Q_SYMBOL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1CFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1CFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CFG_IQMISM_SLOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CFG_IQMISM_SLOW__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CFG_DCCOMP_SLOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CFG_DCCOMP_SLOW__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CFG_QUAD_CORRECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CFG_QUAD_CORRECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CFG_QUAD_FROZEN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CFG_QUAD_FROZEN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CFG_AMM_CORRECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CFG_AMM_CORRECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CFG_AMM_FROZEN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CFG_AMM_FROZEN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CFG_DC_CTRL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CFG_DC_CTRL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1CN(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1CN)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CN_AGCIQ_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CN*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CN_AGCIQ_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CN_AGCOUT_FAST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CN*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CN_AGCOUT_FAST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CN_AGC1_MINPOWER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CN*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CN_AGC1_MINPOWER__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CN_AGC1_NOSLOWLK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CN*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CN_AGC1_NOSLOWLK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CN_AGC1_NOSIGNAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CN*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CN_AGC1_NOSIGNAL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1CN_AGC1_LOCKED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1CN*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1CN_AGC1_LOCKED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1REF(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1REF)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1REF_AGCIQ_REF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1REF*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1REF_AGCIQ_REF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1POWERI(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1POWERI)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1POWERI_POWER_I(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1POWERI*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1POWERI_POWER_I__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1POWERQ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1POWERQ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1POWERQ_POWER_Q(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1POWERQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1POWERQ_POWER_Q__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1AMM(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1AMM)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1AMM_AMM_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1AMM*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1AMM_AMM_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1QUAD(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1QUAD)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1QUAD_QUAD_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1QUAD*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1QUAD_QUAD_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1IQIN1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1IQIN1)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1IQIN1_AGCIQ_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1IQIN1*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1IQIN1_AGCIQ_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1IQIN0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1IQIN0)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1IQIN0_AGCIQ_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1IQIN0*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1IQIN0_AGCIQ_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1SHDB(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1SHDB)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1SHDB_DCVAL_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1SHDB*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1SHDB_DCVAL_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1SHDB_ADCIN_IQOFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1SHDB*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1SHDB_ADCIN_IQOFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1SHDB_DCCOMP_DRIFT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1SHDB*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1SHDB_DCCOMP_DRIFT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1SHDB_SHDB_PERMUTE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1SHDB*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1SHDB_SHDB_PERMUTE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1OPT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1OPT)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1OPT_XOR_ADCIN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1OPT*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1OPT_XOR_ADCIN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1OPT_XOR_AGCRF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1OPT*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1OPT_XOR_AGCRF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1OPT_XORDAC_AGCRF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1OPT*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1OPT_XORDAC_AGCRF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1OPT_AGC1OUT_DIV2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1OPT*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1OPT_AGC1OUT_DIV2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1OPT_AGC1OUT_LSBOFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1OPT*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1OPT_AGC1OUT_LSBOFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1OPT_SHDB_LSBPERMUTE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1OPT*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1OPT_SHDB_LSBPERMUTE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1OPT_XOR2_ADCIN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1OPT*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1OPT_XOR2_ADCIN__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DEMOD(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DEMOD)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMOD_ROLLOFF_CONTROL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMOD_ROLLOFF_CONTROL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMOD_MANUALSX_ROLLOFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMOD_MANUALSX_ROLLOFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMOD_SPECINV_CONTROL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMOD_SPECINV_CONTROL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMOD_MANUAL_MODCOD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMOD_MANUAL_MODCOD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMOD_MANUALS2_ROLLOFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMOD_MANUALS2_ROLLOFF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDCFGMD(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDCFGMD)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFGMD_TUN_RNG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFGMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFGMD_TUN_RNG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFGMD_NOFORCE_RELOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFGMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFGMD_NOFORCE_RELOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFGMD_CFR_AUTOSCAN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFGMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFGMD_CFR_AUTOSCAN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFGMD_SCAN_ENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFGMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFGMD_SCAN_ENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFGMD_STC_ENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFGMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFGMD_STC_ENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFGMD_DVBS1_ENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFGMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFGMD_DVBS1_ENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFGMD_DVBS2_ENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFGMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFGMD_DVBS2_ENABLE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDCFG2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDCFG2)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG2_NSTOP_ETAPE8(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG2_NSTOP_ETAPE8__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG2_COARSE_LK23MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG2_COARSE_LK23MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG2_TMGLOCK_NSCANSTOP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG2_TMGLOCK_NSCANSTOP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG2_BWOFFSET_COLDWARM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG2_BWOFFSET_COLDWARM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG2_INFINITE_RELOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG2_INFINITE_RELOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG2_BLINDPEA_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG2_BLINDPEA_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG2_S1S2_SEQUENTIAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG2_S1S2_SEQUENTIAL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG2_AGC1_WAITLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG2_AGC1_WAITLOCK__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDISTATE(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDISTATE)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDISTATE_I2C_DEMOD_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDISTATE*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDISTATE_I2C_DEMOD_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDISTATE_SDMDRST_DIRCLK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDISTATE*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDISTATE_SDMDRST_DIRCLK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDISTATE_FORCE_ETAPED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDISTATE*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDISTATE_FORCE_ETAPED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDISTATE_I2C_NORESETDMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDISTATE*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDISTATE_I2C_NORESETDMODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDT0M(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDT0M)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDT0M_DMDT0_MIN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDT0M*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDT0M_DMDT0_MIN__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDT0L(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDT0L)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDT0L_DMDT0_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDT0L*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDT0L_DMDT0_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDT1M(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDT1M)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDT1M_DMDT1ETAPE6_MIN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDT1M*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDT1M_DMDT1ETAPE6_MIN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDT1M_DMDT1ET6_SYMB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDT1M*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDT1M_DMDT1ET6_SYMB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDT1M_DMDT1ETAPE3_MIN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDT1M*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDT1M_DMDT1ETAPE3_MIN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDT1M_DMDT1ET3_SYMB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDT1M*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDT1M_DMDT1ET3_SYMB__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDT1L(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDT1L)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDT1L_DMDT1ETAPE6_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDT1L*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDT1L_DMDT1ETAPE6_MAX__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDT1L_DMDT1ETAPE3_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDT1L*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDT1L_DMDT1ETAPE3_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDCFG3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDCFG3)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG3_LOCKTIME_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG3_LOCKTIME_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG3_NOSTOP_FIFOFULL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG3_NOSTOP_FIFOFULL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG3_DIS_SFRUPLOW_TRK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG3_DIS_SFRUPLOW_TRK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG3_INV_SEQSRCH(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG3_INV_SEQSRCH__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG3_NO_BWCENTERING(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG3_NO_BWCENTERING__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG3_DVBS1_TMGWAIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG3_DVBS1_TMGWAIT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDCFG4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDCFG4)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG4_NO_TNRBWINIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG4_NO_TNRBWINIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG4_DIS_HDRDIVLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG4_DIS_HDRDIVLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG4_DIS_CLKENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG4_DIS_CLKENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG4_TUNER_NRELAUNCH(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG4_TUNER_NRELAUNCH__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG4_S1HIER_ENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG4_S1HIER_ENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG4_DEMOD_FASTLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG4_DEMOD_FASTLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG4_S1S2TOUT_FAST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG4_S1S2TOUT_FAST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG4_DIS_VITLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG4_DIS_VITLOCK__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDCFG5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDCFG5)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG5_CFRINIT_INVZIGZAG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG5_CFRINIT_INVZIGZAG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG5_TOUT_TMGNLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG5_TOUT_TMGNLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG5_DMDTOUT_NBACK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG5_DMDTOUT_NBACK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG5_DIS_S2REJECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG5_DIS_S2REJECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG5_DUMMYPL_CFG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG5_DUMMYPL_CFG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCFG5_DMDSLOW_NCONSTEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCFG5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCFG5_DMDSLOW_NCONSTEL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDMODCOD(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDMODCOD)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDMODCOD_DEMOD_TYPE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDMODCOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDMODCOD_DEMOD_TYPE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDMODCOD_DEMOD_MODCOD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDMODCOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDMODCOD_DEMOD_MODCOD__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDPLFNUM(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDPLFNUM)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDPLFNUM_DEMOD_PLFNUM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDPLFNUM*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDPLFNUM_DEMOD_PLFNUM__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDSTATE(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDSTATE)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSTATE_DEMOD_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSTATE*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSTATE_DEMOD_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSTATE_HEADER_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSTATE*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSTATE_HEADER_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSTATE_DEMOD_LOCKED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSTATE*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSTATE_DEMOD_LOCKED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDFLYW(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDFLYW)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDFLYW_FLYWHEEL_CPT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDFLYW*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDFLYW_FLYWHEEL_CPT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDFLYW_I2C_IRQVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDFLYW*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDFLYW_I2C_IRQVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DSTATUS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DSTATUS)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS_OVADC_DETECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS_OVADC_DETECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS_DEMOD_SYSCFG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS_DEMOD_SYSCFG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS_TIMING_IS_LOCKED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS_TIMING_IS_LOCKED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS_LOCK_DEFINITIF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS_LOCK_DEFINITIF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS_SDVBS1_ENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS_SDVBS1_ENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS_TMGLOCK_QUALITY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS_TMGLOCK_QUALITY__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS_CAR_LOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS_CAR_LOCK__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DSTATUS2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DSTATUS2)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS2_GAMMA_OVERUNDER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS2_GAMMA_OVERUNDER__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS2_CFR_OVERFLOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS2_CFR_OVERFLOW__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS2_AGC2_OVERFLOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS2_AGC2_OVERFLOW__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS2_AGC1_NOSIGNALACK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS2_AGC1_NOSIGNALACK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS2_POLYPH_SATEVENT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS2_POLYPH_SATEVENT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS2_MODCODRQ_SYNCTAG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS2_MODCODRQ_SYNCTAG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS2_DEMOD_TIMEOUT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS2_DEMOD_TIMEOUT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS2_DEMOD_DELOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS2_DEMOD_DELOCK__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DSTATUS3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DSTATUS3)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS3_ETAPE1A_DVBXMEM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS3_ETAPE1A_DVBXMEM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS3_DEMOD_FAIL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS3_DEMOD_FAIL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS3_RELOCK_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS3_RELOCK_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS3_GAMMA_LOWBAUDRATE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS3_GAMMA_LOWBAUDRATE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS3_DEMOD_CFGMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS3_DEMOD_CFGMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS3_CFR_ZIGZAG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS3_CFR_ZIGZAG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DSTATUS4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DSTATUS4)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS4_DETECTION_TRIAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS4_DETECTION_TRIAX__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS4_CSTENV_DETECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS4_CSTENV_DETECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS4_DMDPROG_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS4_DMDPROG_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS4_HIER_DETECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS4_HIER_DETECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS4_PILOT_FAILDETECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS4_PILOT_FAILDETECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS4_NOSTHRES1_FAIL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS4_NOSTHRES1_FAIL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS4_NOSTHRES2_FAIL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS4_NOSTHRES2_FAIL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS4_RAINFADE_DETECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS4_RAINFADE_DETECT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DSTATUS5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DSTATUS5)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS5_DEROT1B_ON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS5_DEROT1B_ON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS5_SHDB_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS5_SHDB_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS5_SHDB_OVERFLOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS5_SHDB_OVERFLOW__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS5_SDEMAP_FIFOUSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS5_SDEMAP_FIFOUSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS5_FIFO2_ON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS5_FIFO2_ON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS5_SUPERHDEBMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS5_SUPERHDEBMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS5_FIFO2_ACTBOURRAGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS5_FIFO2_ACTBOURRAGE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DSTATUS6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DSTATUS6)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS6_SPECINV_DEMOD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS6*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS6_SPECINV_DEMOD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS6_AGC2_NOSIGNAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS6*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS6_AGC2_NOSIGNAL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS6_AGC2_MODOV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS6*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS6_AGC2_MODOV__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS6_SFRAME_DETECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS6*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS6_SFRAME_DETECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS6_DUMMY_DVBS2X(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS6*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS6_DUMMY_DVBS2X__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSTATUS6_SIGNAL_ANNEXEM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSTATUS6*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSTATUS6_SIGNAL_ANNEXEM__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDERRORS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDERRORS)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDERRORS_DVBSXSEL_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDERRORS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDERRORS_DVBSXSEL_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDERRORS_AGC2REF_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDERRORS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDERRORS_AGC2REF_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDERRORS_TRNPROG_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDERRORS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDERRORS_TRNPROG_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDERRORS_CARPROG_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDERRORS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDERRORS_CARPROG_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDERRORS_GAMMAPROG_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDERRORS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDERRORS_GAMMAPROG_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDERRORS_CKSYMPROG_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDERRORS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDERRORS_CKSYMPROG_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDERRORS_FIFO2PROG_ERROR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDERRORS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDERRORS_FIFO2PROG_ERROR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_HDEBITCFG2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_HDEBITCFG2)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG2_DEMODFLT_XXXMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG2_DEMODFLT_XXXMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG2_EN_FIFO2DIV2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG2_EN_FIFO2DIV2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG2_MODE_HAUTDEBIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG2_MODE_HAUTDEBIT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_HDEBITCFG1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_HDEBITCFG1)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_DEMODFLT_WORKMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_DEMODFLT_WORKMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_DIS_SKIPFAST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_DIS_SKIPFAST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_DIS_SDEMAPFIFO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_DIS_SDEMAPFIFO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_DIS_SKIPSDDATA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_DIS_SKIPSDDATA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_NSHDB_BOURRAGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_NSHDB_BOURRAGE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_NFIFO2_ZERODEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_NFIFO2_ZERODEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_NPOLYPH_S1SHORT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG1_NPOLYPH_S1SHORT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_HDEBITCFG0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_HDEBITCFG0)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_SDEMAP_MAXLLRRATE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG0*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_SDEMAP_MAXLLRRATE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_CARRIER1_NFASTLOOP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG0*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_CARRIER1_NFASTLOOP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_STC_HDBJUMP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG0*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_STC_HDBJUMP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_DEROT1G_DISLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG0*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_DEROT1G_DISLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_FIFO2_ULTRABS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG0*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG0_FIFO2_ULTRABS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DSAMPDLY(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DSAMPDLY)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSAMPDLY_DEMOD_SAMPDELAYX2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSAMPDLY*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSAMPDLY_DEMOD_SAMPDELAYX2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DSYMBDLY(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DSYMBDLY)
#define FLD_FC8CODEW_DVBSX_DEMOD_DSYMBDLY_DEMOD_SYMBDELAY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DSYMBDLY*(1<<16) + FC8CODEW_DVBSX_DEMOD_DSYMBDLY_DEMOD_SYMBDELAY__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SHDBFIFO21(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SHDBFIFO21)
#define FLD_FC8CODEW_DVBSX_DEMOD_SHDBFIFO21_FIFO2_DATANBR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SHDBFIFO21*(1<<16) + FC8CODEW_DVBSX_DEMOD_SHDBFIFO21_FIFO2_DATANBR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SHDBFIFO20(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SHDBFIFO20)
#define FLD_FC8CODEW_DVBSX_DEMOD_SHDBFIFO20_FIFO2_DATANBR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SHDBFIFO20*(1<<16) + FC8CODEW_DVBSX_DEMOD_SHDBFIFO20_FIFO2_DATANBR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SHDBPARAL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SHDBPARAL)
#define FLD_FC8CODEW_DVBSX_DEMOD_SHDBPARAL_SHDBVECT_SAMPLEN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SHDBPARAL*(1<<16) + FC8CODEW_DVBSX_DEMOD_SHDBPARAL_SHDBVECT_SAMPLEN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SHDBPARAL_SHDBVECT_SYMBLEN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SHDBPARAL*(1<<16) + FC8CODEW_DVBSX_DEMOD_SHDBPARAL_SHDBVECT_SYMBLEN__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICEADR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICEADR)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICEADR_DEMODFLT_RAMI2CADR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICEADR*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICEADR_DEMODFLT_RAMI2CADR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICEADR_DEMODFLT_RAMCFG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICEADR*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICEADR_DEMODFLT_RAMCFG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICEDATA(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICEDATA)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICEDATA_DEMODFLT_RAMDATA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICEDATA*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICEDATA_DEMODFLT_RAMDATA__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICECFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICECFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICECFG_DEMODFLT_RAMPAGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICECFG_DEMODFLT_RAMPAGE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICECFG_DEMODFLT_RAMMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICECFG_DEMODFLT_RAMMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICECFG_DEMODFLT_INCDEC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICECFG_DEMODFLT_INCDEC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICECFG_DIS_DUMMYFLT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICECFG_DIS_DUMMYFLT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICENBR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICENBR)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICENBR_DEMODFLT_SLICENBR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICENBR*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICENBR_DEMODFLT_SLICENBR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICESYMB2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICESYMB2)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICESYMB2_DEMODFLT_SYMBNBR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICESYMB2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICESYMB2_DEMODFLT_SYMBNBR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICESYMB1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICESYMB1)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICESYMB1_DEMODFLT_SYMBNBR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICESYMB1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICESYMB1_DEMODFLT_SYMBNBR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICESYMB0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICESYMB0)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICESYMB0_DEMODFLT_SYMBNBR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICESYMB0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICESYMB0_DEMODFLT_SYMBNBR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICERATIO(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICERATIO)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICERATIO_DEMODFLT_RATIO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICERATIO*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICERATIO_DEMODFLT_RATIO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICESTAT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICESTAT)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICESTAT_DEMODFLT_PKTDELIN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICESTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICESTAT_DEMODFLT_PKTDELIN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICESTAT_DEMODFLT_ISIMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICESTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICESTAT_DEMODFLT_ISIMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICESTAT_DEMODFLT_PDELSYNC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICESTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICESTAT_DEMODFLT_PDELSYNC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICEMAX(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICEMAX)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICEMAX_DEMODFLT_SLICEMAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICEMAX*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICEMAX_DEMODFLT_SLICEMAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICEMIN(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICEMIN)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICEMIN_DEMODFLT_SLICEMIN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICEMIN*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICEMIN_DEMODFLT_SLICEMIN__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICESEL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICESEL)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICESEL_DEMODFLT_SLICESEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICESEL*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICESEL_DEMODFLT_SLICESEL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SLICEANC(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SLICEANC)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICEANC_DEMODFLT_TYPE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICEANC*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICEANC_DEMODFLT_TYPE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SLICEANC_DEMODFLT_MODCOD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SLICEANC*(1<<16) + FC8CODEW_DVBSX_DEMOD_SLICEANC_DEMODFLT_MODCOD__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DEMODAUX(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DEMODAUX)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMODAUX_DEMODAUX_INDEX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMODAUX*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMODAUX_DEMODAUX_INDEX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_HDEBITCFG4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_HDEBITCFG4)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_SOFDEROT1B(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_SOFDEROT1B__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_FIFO2_NCRCARE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_FIFO2_NCRCARE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_EN_SUPERFRAME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_EN_SUPERFRAME__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_HWAREDELAI(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_HWAREDELAI__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_SDEMAPDLY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_SDEMAPDLY__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_SDEMAPGAP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_SDEMAPGAP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_PCRCLOCKOV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_HDEBITCFG4*(1<<16) + FC8CODEW_DVBSX_DEMOD_HDEBITCFG4_DIS_PCRCLOCKOV__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FILTCFGM(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FILTCFGM)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGM_FILTRE3_MANUEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGM_FILTRE3_MANUEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGM_FILTRE2_MANUEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGM_FILTRE2_MANUEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGM_FILTRE1_MANUEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGM_FILTRE1_MANUEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGM_BYP_HDBFILTRE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGM_BYP_HDBFILTRE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGM_FILTRES_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGM_FILTRES_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGM_HDBFILTRE_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGM_HDBFILTRE_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FILTCFGL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FILTCFGL)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGL_FILTRE3_AMPL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGL_FILTRE3_AMPL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGL_FILTRE2_AMPL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGL_FILTRE2_AMPL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGL_FILTRE1_AMPL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGL_FILTRE1_AMPL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FILTCFGL_FILTRE_DEBUG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FILTCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_FILTCFGL_FILTRE_DEBUG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_IQFILT0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_IQFILT0)
#define FLD_FC8CODEW_DVBSX_DEMOD_IQFILT0_IQPOWER_DEROT1G(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_IQFILT0*(1<<16) + FC8CODEW_DVBSX_DEMOD_IQFILT0_IQPOWER_DEROT1G__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_IQFILT1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_IQFILT1)
#define FLD_FC8CODEW_DVBSX_DEMOD_IQFILT1_IQPOWER_FILTRE1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_IQFILT1*(1<<16) + FC8CODEW_DVBSX_DEMOD_IQFILT1_IQPOWER_FILTRE1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_IQFILT2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_IQFILT2)
#define FLD_FC8CODEW_DVBSX_DEMOD_IQFILT2_IQPOWER_FILTRE2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_IQFILT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_IQFILT2_IQPOWER_FILTRE2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_IQFILT3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_IQFILT3)
#define FLD_FC8CODEW_DVBSX_DEMOD_IQFILT3_IQPOWER_FILTRE3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_IQFILT3*(1<<16) + FC8CODEW_DVBSX_DEMOD_IQFILT3_IQPOWER_FILTRE3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CORRELMANT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CORRELMANT)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELMANT_CORREL_MANT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELMANT*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELMANT_CORREL_MANT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CORRELABS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CORRELABS)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELABS_CORREL_ABS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELABS*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELABS_CORREL_ABS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CORRELABSM(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CORRELABSM)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELABSM_CORREL_ABSM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELABSM*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELABSM_CORREL_ABSM__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CORRELEXP(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CORRELEXP)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELEXP_CORREL_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELEXP*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELEXP_CORREL_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELEXP_CORREL_ABSEXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELEXP*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELEXP_CORREL_ABSEXP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CORRELCOEF(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CORRELCOEF)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELCOEF_CORREL_COEFM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELCOEF*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELCOEF_CORREL_COEFM__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CORRELCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CORRELCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELCFG_CONFIG_I_ONLY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELCFG_CONFIG_I_ONLY__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELCFG_CONFIG_DISABLE_INV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELCFG_CONFIG_DISABLE_INV__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELCFG_CONFIG_SATUR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELCFG_CONFIG_SATUR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELCFG_CONFIG_CONFIDENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELCFG_CONFIG_CONFIDENCE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELCFG_CORRELABSM_NDIV4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELCFG_CORRELABSM_NDIV4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CORRELFREQ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CORRELFREQ)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELFREQ_DIFFPILOT_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELFREQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELFREQ_DIFFPILOT_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELFREQ_DIS_PLHEGALMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELFREQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELFREQ_DIS_PLHEGALMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELFREQ_EN_EGALPLH(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELFREQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELFREQ_EN_EGALPLH__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELFREQ_DIFFPILOT_LOCKSEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELFREQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELFREQ_DIFFPILOT_LOCKSEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELFREQ_EGALPLH_BEFLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELFREQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELFREQ_EGALPLH_BEFLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CORRELFREQ_NODEL_BADFRAME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CORRELFREQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_CORRELFREQ_NODEL_BADFRAME__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHMODCOD(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHMODCOD)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHMODCOD_PLH_TYPE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHMODCOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHMODCOD_PLH_TYPE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHMODCOD_PLH_MODCOD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHMODCOD*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHMODCOD_PLH_MODCOD__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDREG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDREG)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDREG_DECIM_PLFRAMES(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDREG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDREG_DECIM_PLFRAMES__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDREG_HIER_SHORTFRAME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDREG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDREG_HIER_SHORTFRAME__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDREG_PMGR_PSYNCMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDREG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDREG_PMGR_PSYNCMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDREG_DIS_STCPUNCT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDREG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDREG_DIS_STCPUNCT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDREG_DIS_STCPILOTS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDREG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDREG_DIS_STCPILOTS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2O(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2O)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2O_AGC2_COEF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2O*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2O_AGC2_COEF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2O_AGC2_LKEQUA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2O*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2O_AGC2_LKEQUA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2O_AGC2OV_FSTOP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2O*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2O_AGC2OV_FSTOP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2O_CSTENV_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2O*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2O_CSTENV_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2REF(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2REF)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2REF_AGC2_REF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2REF*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2REF_AGC2_REF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCNADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCNADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCNADJ_AGCADJ_XXDB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCNADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCNADJ_AGCADJ_XXDB__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCKS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCKS)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCKS_AGC2AMPL_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCKS*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCKS_AGC2AMPL_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCKS_AGC2AMPL_DVBS1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCKS*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCKS_AGC2AMPL_DVBS1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCKS_AGC2GEN_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCKS*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCKS_AGC2GEN_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCKS_DIS_RHIER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCKS*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCKS_DIS_RHIER__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCKS_RSADJ_CCMMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCKS*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCKS_RSADJ_CCMMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCKS_RSADJ_MANUALCFG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCKS*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCKS_RSADJ_MANUALCFG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCRSADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCRSADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCRSADJ_RS_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCRSADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCRSADJ_RS_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCRSADJ_RSADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCRSADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCRSADJ_RSADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCRQ8ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCRQ8ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCRQ8ADJ_RQ8_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCRQ8ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCRQ8ADJ_RQ8_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCRQ8ADJ_RQ8ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCRQ8ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCRQ8ADJ_RQ8ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR1ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR1ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR1ADJ_R1_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR1ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR1ADJ_R1_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR1ADJ_R1ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR1ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR1ADJ_R1ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR2ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR2ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR2ADJ_R2_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR2ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR2ADJ_R2_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR2ADJ_R2ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR2ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR2ADJ_R2ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR3ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR3ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR3ADJ_R3_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR3ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR3ADJ_R3_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR3ADJ_R3ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR3ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR3ADJ_R3ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR4ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR4ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR4ADJ_R4_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR4ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR4ADJ_R4_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR4ADJ_R4ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR4ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR4ADJ_R4ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR5ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR5ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR5ADJ_R5_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR5ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR5ADJ_R5_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR5ADJ_R5ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR5ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR5ADJ_R5ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR6ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR6ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR6ADJ_R6_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR6ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR6ADJ_R6_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR6ADJ_R6ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR6ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR6ADJ_R6ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR7ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR7ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR7ADJ_R7_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR7ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR7ADJ_R7_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR7ADJ_R7ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR7ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR7ADJ_R7ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR8ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR8ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR8ADJ_R8_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR8ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR8ADJ_R8_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR8ADJ_R8ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR8ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR8ADJ_R8ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGCR1BADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGCR1BADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR1BADJ_R1B_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR1BADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR1BADJ_R1B_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGCR1BADJ_R1BADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGCR1BADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGCR1BADJ_R1BADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2ADJ_AGC2REF_XXDB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2ADJ_AGC2REF_XXDB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2ADJ_AGC2ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2ADJ_AGC2ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2I1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2I1)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2I1_AGC2ACC_MANT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2I1*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2I1_AGC2ACC_MANT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2I0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2I0)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2I0_AGC2ACC_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2I0*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2I0_AGC2ACC_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2I0_AGC2ACC_MANT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2I0*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2I0_AGC2ACC_MANT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2IMP(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2IMP)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2IMP_AGC2_IMPCPT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2IMP*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2IMP_AGC2_IMPCPT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC1ADJ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC1ADJ)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1ADJ_AGC1_ADJUSTED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1ADJ_AGC1_ADJUSTED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC1ADJ_AGC1ADJ_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC1ADJ*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC1ADJ_AGC1ADJ_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2R10DB(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2R10DB)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2R10DB_AGC2AMPL_10DB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2R10DB*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2R10DB_AGC2AMPL_10DB__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2R20DB(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2R20DB)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2R20DB_AGC2AMPL_20DB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2R20DB*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2R20DB_AGC2AMPL_20DB__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2AMPL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2AMPL)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2AMPL_AGC2AMPL_AGC2IN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2AMPL*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2AMPL_AGC2AMPL_AGC2IN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2AMPL_AGC2STRUCT_AGC2IN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2AMPL*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2AMPL_AGC2STRUCT_AGC2IN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2AMPL_AGC2GEN_AGC2IN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2AMPL*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2AMPL_AGC2GEN_AGC2IN__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2VAR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2VAR)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2VAR_ACCU_AGC2DIFF_I2C(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2VAR*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2VAR_ACCU_AGC2DIFF_I2C__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AGC2RATIO(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AGC2RATIO)
#define FLD_FC8CODEW_DVBSX_DEMOD_AGC2RATIO_AGC2AMPL_RATIO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AGC2RATIO*(1<<16) + FC8CODEW_DVBSX_DEMOD_AGC2RATIO_AGC2AMPL_RATIO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CARCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CARCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARCFG_PH_DET_ALGO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARCFG_PH_DET_ALGO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARCFG_ROTAON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARCFG_ROTAON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARCFG_EN_S2FREQDET(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARCFG_EN_S2FREQDET__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARCFG_CARHDR_NODIV8(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARCFG_CARHDR_NODIV8__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARCFG_CFRCNTR_ISOL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARCFG_CFRCNTR_ISOL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARCFG_CFRUPLOW_USEMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARCFG_CFRUPLOW_USEMODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLCNLK(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLCNLK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLCNLK_CAR1NLK_ALPHA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLCNLK_CAR1NLK_ALPHA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLCNLK_CAR1NLK_ALPHA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLCNLK_CAR1NLK_ALPHA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLCNLK_WIDE_FREQDET(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLCNLK_WIDE_FREQDET__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLCNLK_ABCLC1_OLDMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLCNLK_ABCLC1_OLDMODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLCNLK(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLCNLK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLCNLK_CAR1NLK_BETA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLCNLK_CAR1NLK_BETA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLCNLK_CAR1NLK_BETA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLCNLK_CAR1NLK_BETA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLCNLK_ROTA1G_MANUEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLCNLK_ROTA1G_MANUEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLCNLK_ROTA1G_OFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLCNLK_ROTA1G_OFF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLCLK(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLCLK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLCLK_CAR1LK_ALPHA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLCLK_CAR1LK_ALPHA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLCLK_CAR1LK_ALPHA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLCLK_CAR1LK_ALPHA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLCLK_CAR1LK_ABS2_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLCLK_CAR1LK_ABS2_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLCLK(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLCLK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLCLK_CAR1LK_BETA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLCLK_CAR1LK_BETA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLCLK_CAR1LK_BETA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLCLK_CAR1LK_BETA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLCLK_CAR1LK_ABNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLCLK_CAR1LK_ABNOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLCLK_FORCE_DELTAF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLCLK_FORCE_DELTAF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CARFREQ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CARFREQ)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARFREQ_BETA_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARFREQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARFREQ_BETA_FREQ__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARFREQ_KC_COARSE_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARFREQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARFREQ_KC_COARSE_EXP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CARHDR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CARHDR)
#define FLD_FC8CODEW_DVBSX_DEMOD_CARHDR_K_FREQ_HDR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CARHDR*(1<<16) + FC8CODEW_DVBSX_DEMOD_CARHDR_K_FREQ_HDR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LDT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LDT)
#define FLD_FC8CODEW_DVBSX_DEMOD_LDT_CARLOCK_THRES(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LDT*(1<<16) + FC8CODEW_DVBSX_DEMOD_LDT_CARLOCK_THRES__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LDT2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LDT2)
#define FLD_FC8CODEW_DVBSX_DEMOD_LDT2_CARLOCK_THRES2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LDT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_LDT2_CARLOCK_THRES2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRICFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRICFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRICFG_NEG_CFRSTEP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRICFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRICFG_NEG_CFRSTEP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRIROLL_GARDER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRICFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRIROLL_GARDER__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_CSTINC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRICFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_CSTINC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_UNVALSKIP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRICFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_UNVALSKIP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_ABORTPRED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRICFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_ABORTPRED__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_ABORTDBL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRICFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_ABORTDBL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_LUNVALCPT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRICFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_LUNVALCPT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_UNVALRNG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRICFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRICFG_CFRINIT_UNVALRNG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR1BCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR1BCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1BCFG_CFR1BTOCFR1_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1BCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1BCFG_CFR1BTOCFR1_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1BCFG_ROTA1F_OFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1BCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1BCFG_ROTA1F_OFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1BCFG_CENTER1B_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1BCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1BCFG_CENTER1B_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1BCFG_CFR1BTO1_FEPSMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1BCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1BCFG_CFR1BTO1_FEPSMODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRULB1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRULB1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRULB1_CFR_ULBORNE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRULB1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRULB1_CFR_ULBORNE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRULB1_CFRULB_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRULB1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRULB1_CFRULB_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRULB0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRULB0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRULB0_CFR_ULBORNE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRULB0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRULB0_CFR_ULBORNE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRCNTR2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRCNTR2)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRCNTR2_CFRINIT_CENTRE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRCNTR2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRCNTR2_CFRINIT_CENTRE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRCNTR1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRCNTR1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRCNTR1_CFRINIT_CENTRE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRCNTR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRCNTR1_CFRINIT_CENTRE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRCNTR0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRCNTR0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRCNTR0_CFRINIT_CENTRE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRCNTR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRCNTR0_CFRINIT_CENTRE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRIBASE2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRIBASE2)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRIBASE2_CFRINIT_BASE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRIBASE2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRIBASE2_CFRINIT_BASE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRIBASE1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRIBASE1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRIBASE1_CFRINIT_BASE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRIBASE1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRIBASE1_CFRINIT_BASE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRIBASE0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRIBASE0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRIBASE0_CFRINIT_BASE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRIBASE0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRIBASE0_CFRINIT_BASE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRINIT2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRINIT2)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRINIT2_CFR_INIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRINIT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRINIT2_CFR_INIT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRINIT1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRINIT1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRINIT1_CFR_INIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRINIT1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRINIT1_CFR_INIT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRINIT0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRINIT0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRINIT0_CFR_INIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRINIT0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRINIT0_CFR_INIT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRUP2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRUP2)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRUP2_CFR_UP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRUP2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRUP2_CFR_UP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRUP1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRUP1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRUP1_CFR_UP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRUP1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRUP1_CFR_UP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRUP0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRUP0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRUP0_CFR_UP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRUP0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRUP0_CFR_UP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRLOW2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRLOW2)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRLOW2_CFR_LOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRLOW2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRLOW2_CFR_LOW__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRLOW1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRLOW1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRLOW1_CFR_LOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRLOW1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRLOW1_CFR_LOW__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRLOW0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRLOW0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRLOW0_CFR_LOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRLOW0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRLOW0_CFR_LOW__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRINC2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRINC2)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRINC2_CFR_INC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRINC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRINC2_CFR_INC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRINC2_MANUAL_CFRINC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRINC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRINC2_MANUAL_CFRINC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRINC1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRINC1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRINC1_CFR_INC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRINC1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRINC1_CFR_INC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFRINC0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFRINC0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFRINC0_CFR_INC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFRINC0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFRINC0_CFR_INC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR12(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR12)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR12_CAR_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR12*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR12_CAR_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR11(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR11)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR11_CAR_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR11*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR11_CAR_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR10(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR10)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR10_CAR_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR10*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR10_CAR_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LDI(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LDI)
#define FLD_FC8CODEW_DVBSX_DEMOD_LDI_LOCK_DET_INTEGR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LDI*(1<<16) + FC8CODEW_DVBSX_DEMOD_LDI_LOCK_DET_INTEGR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR1F2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR1F2)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1F2_CFR1F_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1F2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1F2_CFR1F_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR1F1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR1F1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1F1_CFR1F_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1F1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1F1_CFR1F_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR1F0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR1F0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1F0_CFR1F_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1F0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1F0_CFR1F_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR1G(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR1G)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1G_CFR1G_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1G*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1G_CFR1G_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR1B2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR1B2)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1B2_CFR1B_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1B2*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1B2_CFR1B_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR1B1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR1B1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1B1_CFR1B_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1B1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1B1_CFR1B_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR1B0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR1B0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR1B0_CFR1B_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR1B0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR1B0_CFR1B_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_GAUSSR0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_GAUSSR0)
#define FLD_FC8CODEW_DVBSX_DEMOD_GAUSSR0_R0_GAUSSIEN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GAUSSR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_GAUSSR0_R0_GAUSSIEN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GAUSSR0_EN_CCIMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GAUSSR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_GAUSSR0_EN_CCIMODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CCIR0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CCIR0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CCIR0_R0_CCI(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CCIR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CCIR0_R0_CCI__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CCIR0_CCIDETECT_PLHONLY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CCIR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CCIR0_CCIDETECT_PLHONLY__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CCIQUANT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CCIQUANT)
#define FLD_FC8CODEW_DVBSX_DEMOD_CCIQUANT_CCI_QUANT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CCIQUANT*(1<<16) + FC8CODEW_DVBSX_DEMOD_CCIQUANT_CCI_QUANT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CCIQUANT_CCI_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CCIQUANT*(1<<16) + FC8CODEW_DVBSX_DEMOD_CCIQUANT_CCI_BETA__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CCITHRES(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CCITHRES)
#define FLD_FC8CODEW_DVBSX_DEMOD_CCITHRES_CCI_THRESHOLD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CCITHRES*(1<<16) + FC8CODEW_DVBSX_DEMOD_CCITHRES_CCI_THRESHOLD__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CCIACC(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CCIACC)
#define FLD_FC8CODEW_DVBSX_DEMOD_CCIACC_CCI_VALUE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CCIACC*(1<<16) + FC8CODEW_DVBSX_DEMOD_CCIACC_CCI_VALUE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG_TMG_MINFREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG_TMG_MINFREQ__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG_MANUAL_SCAN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG_MANUAL_SCAN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG_DO_TIMING_CORR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG_DO_TIMING_CORR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG_TMGLOCK_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG_TMGLOCK_BETA__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_RTCNLK(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_RTCNLK)
#define FLD_FC8CODEW_DVBSX_DEMOD_RTCNLK_TMGBETA_NLKEXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_RTCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_RTCNLK_TMGBETA_NLKEXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_RTCNLK_TMGALPHA_NLKEXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_RTCNLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_RTCNLK_TMGALPHA_NLKEXP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_RTCLK(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_RTCLK)
#define FLD_FC8CODEW_DVBSX_DEMOD_RTCLK_TMGBETA_LKEXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_RTCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_RTCLK_TMGBETA_LKEXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_RTCLK_TMGALPHA_LKEXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_RTCLK*(1<<16) + FC8CODEW_DVBSX_DEMOD_RTCLK_TMGALPHA_LKEXP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGTHRISE(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGTHRISE)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGTHRISE_TMGLOCK_THRISE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGTHRISE*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGTHRISE_TMGLOCK_THRISE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGTHFALL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGTHFALL)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGTHFALL_TMGLOCK_THFALL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGTHFALL*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGTHFALL_TMGLOCK_THFALL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRUPRATIO(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRUPRATIO)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRUPRATIO_SFR_UPRATIO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRUPRATIO*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRUPRATIO_SFR_UPRATIO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRLOWRATIO(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRLOWRATIO)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRLOWRATIO_SFR_LOWRATIO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRLOWRATIO*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRLOWRATIO_SFR_LOWRATIO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_KTTMG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_KTTMG)
#define FLD_FC8CODEW_DVBSX_DEMOD_KTTMG_DIS_DFACTLOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_KTTMG*(1<<16) + FC8CODEW_DVBSX_DEMOD_KTTMG_DIS_DFACTLOW__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_KTTMG_POLYOV2_ADJ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_KTTMG*(1<<16) + FC8CODEW_DVBSX_DEMOD_KTTMG_POLYOV2_ADJ__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_KTTMG_KT_TMG_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_KTTMG*(1<<16) + FC8CODEW_DVBSX_DEMOD_KTTMG_KT_TMG_EXP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_KREFTMG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_KREFTMG)
#define FLD_FC8CODEW_DVBSX_DEMOD_KREFTMG_START_KREFTMG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_KREFTMG*(1<<16) + FC8CODEW_DVBSX_DEMOD_KREFTMG_START_KREFTMG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_KREFTMG_STOP_KREFTMG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_KREFTMG*(1<<16) + FC8CODEW_DVBSX_DEMOD_KREFTMG_STOP_KREFTMG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRSTEP(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRSTEP)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRSTEP_SFR_CENTERSTEP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRSTEP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRSTEP_SFR_CENTERSTEP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRSTEP_SFR_SCANSTEP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRSTEP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRSTEP_SFR_SCANSTEP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGCFG2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGCFG2)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG2_SFRRATIO_FINE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG2_SFRRATIO_FINE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG2_NOTMG_DVBS1DERAT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG2_NOTMG_DVBS1DERAT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG2_SCANINIT_QUART(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG2_SCANINIT_QUART__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG2_DIS_SMOOTHTMG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG2_DIS_SMOOTHTMG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG2_TIMING_DEBUG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG2_TIMING_DEBUG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG2_KREFTMG2_DECMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG2_KREFTMG2_DECMODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_KREFTMG2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_KREFTMG2)
#define FLD_FC8CODEW_DVBSX_DEMOD_KREFTMG2_KREF_TMG2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_KREFTMG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_KREFTMG2_KREF_TMG2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGCFG3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGCFG3)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG3_SFRVAL_MINMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG3_SFRVAL_MINMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG3_AUTO_GLOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG3_AUTO_GLOW__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG3_AUTO_GUP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG3_AUTO_GUP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG3_CONT_TMGCENTER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG3_CONT_TMGCENTER__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG3_CFRINC_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG3_CFRINC_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGCFG3_TIMING_NEWALGO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGCFG3_TIMING_NEWALGO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGMTHRES(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGMTHRES)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGMTHRES_NTIMING_D81C(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGMTHRES*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGMTHRES_NTIMING_D81C__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGMTHRES_NTIMING_PLFSTART(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGMTHRES*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGMTHRES_NTIMING_PLFSTART__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGMTHRES_NTIMING_QPSK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGMTHRES*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGMTHRES_NTIMING_QPSK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGMTHRES_TMG_MOD_THRES(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGMTHRES*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGMTHRES_TMG_MOD_THRES__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRINIT2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRINIT2)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRINIT2_SFR_INIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRINIT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRINIT2_SFR_INIT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRINIT1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRINIT1)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRINIT1_SFR_INIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRINIT1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRINIT1_SFR_INIT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRINIT0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRINIT0)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRINIT0_SFR_INIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRINIT0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRINIT0_SFR_INIT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRUP2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRUP2)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRUP2_SYMB_FREQ_UP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRUP2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRUP2_SYMB_FREQ_UP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRUP1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRUP1)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRUP1_SYMB_FREQ_UP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRUP1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRUP1_SYMB_FREQ_UP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRUP0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRUP0)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRUP0_SYMB_FREQ_UP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRUP0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRUP0_SYMB_FREQ_UP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRLOW2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRLOW2)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRLOW2_SYMB_FREQ_LOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRLOW2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRLOW2_SYMB_FREQ_LOW__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRLOW1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRLOW1)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRLOW1_SYMB_FREQ_LOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRLOW1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRLOW1_SYMB_FREQ_LOW__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFRLOW0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFRLOW0)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFRLOW0_SYMB_FREQ_LOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFRLOW0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFRLOW0_SYMB_FREQ_LOW__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFR3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFR3)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFR3_SYMB_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFR3*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFR3_SYMB_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFR2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFR2)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFR2_SYMB_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFR2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFR2_SYMB_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFR1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFR1)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFR1_SYMB_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFR1_SYMB_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SFR0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SFR0)
#define FLD_FC8CODEW_DVBSX_DEMOD_SFR0_SYMB_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SFR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SFR0_SYMB_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGREG2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGREG2)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGREG2_TMGREG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGREG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGREG2_TMGREG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGREG1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGREG1)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGREG1_TMGREG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGREG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGREG1_TMGREG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGREG0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGREG0)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGREG0_TMGREG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGREG0*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGREG0_TMGREG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGLOCK1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGLOCK1)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGLOCK1_TMGLOCK_LEVEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGLOCK1*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGLOCK1_TMGLOCK_LEVEL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGLOCK0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGLOCK0)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGLOCK0_TMGLOCK_LEVEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGLOCK0*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGLOCK0_TMGLOCK_LEVEL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TMGOBS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TMGOBS)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGOBS_TMG_SCANFAIL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGOBS_TMG_SCANFAIL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGOBS_CHCENTERING_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGOBS_CHCENTERING_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGOBS_TMG_SCANNING(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGOBS_TMG_SCANNING__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGOBS_SCAN_SIGN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGOBS_SCAN_SIGN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TMGOBS_ROLLOFF_STATUS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TMGOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_TMGOBS_ROLLOFF_STATUS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDCODSFR2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDCODSFR2)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCODSFR2_DEMOD_CODGAMMA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCODSFR2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCODSFR2_DEMOD_CODGAMMA__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDCODSFR1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDCODSFR1)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCODSFR1_DEMOD_CODGAMMA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCODSFR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCODSFR1_DEMOD_CODGAMMA__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDCODSFR0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDCODSFR0)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDCODSFR0_DEMOD_CODGAMMA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDCODSFR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDCODSFR0_DEMOD_CODGAMMA__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DFECFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DFECFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_DFECFG_DFEFILT_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DFECFG_DFEFILT_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DFECFG_XFEFIELD_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DFECFG_XFEFIELD_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DFECFG_DFEFILT_ON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DFECFG_DFEFILT_ON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DFECFG_DFE_NEWCALC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DFECFG_DFE_NEWCALC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFECFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFECFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFECFG_FFEFILT_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFECFG_FFEFILT_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFECFG_EXTXFE_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFECFG_EXTXFE_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFECFG_FFENCALC_OFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFECFG_FFENCALC_OFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFECFG_FFEFILT_ON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFECFG_FFEFILT_ON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFECFG_FFE_NEWCALC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFECFG_FFE_NEWCALC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_XFECFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_XFECFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG_EGAL_POSTCAR3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG_EGAL_POSTCAR3__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG_EGAL_NOSATRST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG_EGAL_NOSATRST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG_EGAL_DVBS2RST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG_EGAL_DVBS2RST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG_EGAL_STARTCALC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG_EGAL_STARTCALC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG_NOTMG_NEGALWAIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG_NOTMG_NEGALWAIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG_EGALCALC_OBS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG_EGALCALC_OBS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_XFECFG2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_XFECFG2)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG2_EQUAL_USEDSYMB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG2_EQUAL_USEDSYMB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG2_XFECALC_N256APSK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG2_XFECALC_N256APSK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG2_EGALAGC2_DEBUG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG2_EGALAGC2_DEBUG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_XFECFG2_EXTWDFE_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_XFECFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_XFECFG2_EXTWDFE_SELECT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PEGALCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PEGALCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_IMMEDIAT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PEGALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_IMMEDIAT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_PZERO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PEGALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_PZERO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_NTMG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PEGALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_NTMG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_NDATA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PEGALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_NDATA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALPLH_MAN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PEGALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALPLH_MAN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_MAN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PEGALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_PEGALCFG_EGALAGC2_MAN__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFECFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFECFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFECFG_WDFEFILT_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFECFG_WDFEFILT_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFECFG_EGALWDFE_SIZE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFECFG_EGALWDFE_SIZE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFECFG_WDFEFILT_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFECFG_WDFEFILT_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFECFG_WDFE_NEWCALC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFECFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFECFG_WDFE_NEWCALC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFERCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFERCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFERCFG_WDFERFILT_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFERCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFERCFG_WDFERFILT_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFERCFG_WDFER_DEBUG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFERCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFERCFG_WDFER_DEBUG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFERCFG_WDFER_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFERCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFERCFG_WDFER_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFERCFG_NWDFER_ORDERING(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFERCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFERCFG_NWDFER_ORDERING__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFERCFG_WDFER_NEWCALC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFERCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFERCFG_WDFER_NEWCALC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFERAMPOS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFERAMPOS)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFERAMPOS_WDFERAM_POS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFERAMPOS*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFERAMPOS_WDFERAM_POS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFERAMI(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFERAMI)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFERAMI_WDFERAM_I(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFERAMI*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFERAMI_WDFERAM_I__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFERAMQ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFERAMQ)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFERAMQ_WDFERAM_Q(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFERAMQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFERAMQ_WDFERAM_Q__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEROBS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEROBS)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEROBS_WDFEOBS_VAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEROBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEROBS_WDFEOBS_VAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DFESTNBR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DFESTNBR)
#define FLD_FC8CODEW_DVBSX_DEMOD_DFESTNBR_DFENBR_VAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DFESTNBR*(1<<16) + FC8CODEW_DVBSX_DEMOD_DFESTNBR_DFENBR_VAL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DFESTNBR_WDFE_PRESENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DFESTNBR*(1<<16) + FC8CODEW_DVBSX_DEMOD_DFESTNBR_WDFE_PRESENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFESTNBR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFESTNBR)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFESTNBR_FFENBR_VAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFESTNBR*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFESTNBR_FFENBR_VAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAI1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAI1)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAI1_EQUA_ACCI1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAI1*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAI1_EQUA_ACCI1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAQ1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAQ1)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAQ1_EQUA_ACCQ1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAQ1*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAQ1_EQUA_ACCQ1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAI2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAI2)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAI2_EQUA_ACCI2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAI2*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAI2_EQUA_ACCI2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAQ2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAQ2)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAQ2_EQUA_ACCQ2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAQ2*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAQ2_EQUA_ACCQ2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAI3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAI3)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAI3_EQUA_ACCI3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAI3*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAI3_EQUA_ACCI3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAQ3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAQ3)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAQ3_EQUA_ACCQ3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAQ3*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAQ3_EQUA_ACCQ3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAI4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAI4)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAI4_EQUA_ACCI4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAI4*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAI4_EQUA_ACCI4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAQ4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAQ4)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAQ4_EQUA_ACCQ4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAQ4*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAQ4_EQUA_ACCQ4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAI5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAI5)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAI5_EQUA_ACCI5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAI5*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAI5_EQUA_ACCI5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAQ5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAQ5)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAQ5_EQUA_ACCQ5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAQ5*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAQ5_EQUA_ACCQ5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAI6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAI6)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAI6_EQUA_ACCI6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAI6*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAI6_EQUA_ACCI6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAQ6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAQ6)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAQ6_EQUA_ACCQ6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAQ6*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAQ6_EQUA_ACCQ6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAI7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAI7)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAI7_EQUA_ACCI7(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAI7*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAI7_EQUA_ACCI7__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAQ7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAQ7)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAQ7_EQUA_ACCQ7(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAQ7*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAQ7_EQUA_ACCQ7__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAI8(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAI8)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAI8_EQUA_ACCI8(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAI8*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAI8_EQUA_ACCI8__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EQUAQ8(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EQUAQ8)
#define FLD_FC8CODEW_DVBSX_DEMOD_EQUAQ8_EQUA_ACCQ8(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EQUAQ8*(1<<16) + FC8CODEW_DVBSX_DEMOD_EQUAQ8_EQUA_ACCQ8__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEI1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEI1)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEI1_FFE_ACCI1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEI1*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEI1_FFE_ACCI1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEQ1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEQ1)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEQ1_FFE_ACCQ1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEQ1*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEQ1_FFE_ACCQ1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEI2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEI2)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEI2_FFE_ACCI2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEI2*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEI2_FFE_ACCI2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEQ2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEQ2)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEQ2_FFE_ACCQ2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEQ2*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEQ2_FFE_ACCQ2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEI3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEI3)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEI3_FFE_ACCI3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEI3*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEI3_FFE_ACCI3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEQ3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEQ3)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEQ3_FFE_ACCQ3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEQ3*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEQ3_FFE_ACCQ3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEI4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEI4)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEI4_FFE_ACCI4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEI4*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEI4_FFE_ACCI4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEQ4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEQ4)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEQ4_FFE_ACCQ4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEQ4*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEQ4_FFE_ACCQ4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEI5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEI5)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEI5_FFE_ACCI5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEI5*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEI5_FFE_ACCI5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFEQ5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFEQ5)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFEQ5_FFE_ACCQ5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFEQ5*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFEQ5_FFE_ACCQ5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN1)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN1_NUM_WDFE1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN1*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN1_NUM_WDFE1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI1)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI1_I_WDFE1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI1*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI1_I_WDFE1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ1)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ1_Q_WDFE1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ1*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ1_Q_WDFE1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN2)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN2_NUM_WDFE2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN2*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN2_NUM_WDFE2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI2)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI2_I_WDFE2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI2*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI2_I_WDFE2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ2)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ2_Q_WDFE2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ2*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ2_Q_WDFE2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN3)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN3_NUM_WDFE3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN3*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN3_NUM_WDFE3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI3)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI3_I_WDFE3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI3*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI3_I_WDFE3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ3)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ3_Q_WDFE3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ3*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ3_Q_WDFE3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN4)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN4_NUM_WDFE4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN4*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN4_NUM_WDFE4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI4)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI4_I_WDFE4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI4*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI4_I_WDFE4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ4)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ4_Q_WDFE4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ4*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ4_Q_WDFE4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN5)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN5_NUM_WDFE5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN5*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN5_NUM_WDFE5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI5)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI5_I_WDFE5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI5*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI5_I_WDFE5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ5)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ5_Q_WDFE5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ5*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ5_Q_WDFE5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN6)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN6_NUM_WDFE6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN6*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN6_NUM_WDFE6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI6)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI6_I_WDFE6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI6*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI6_I_WDFE6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ6)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ6_Q_WDFE6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ6*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ6_Q_WDFE6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN7)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN7_NUM_WDFE7(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN7*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN7_NUM_WDFE7__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI7)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI7_I_WDFE7(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI7*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI7_I_WDFE7__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ7)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ7_Q_WDFE7(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ7*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ7_Q_WDFE7__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN8(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN8)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN8_NUM_WDFE8(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN8*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN8_NUM_WDFE8__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI8(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI8)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI8_I_WDFE8(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI8*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI8_I_WDFE8__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ8(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ8)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ8_Q_WDFE8(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ8*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ8_Q_WDFE8__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN9(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN9)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN9_NUM_WDFE9(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN9*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN9_NUM_WDFE9__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI9(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI9)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI9_I_WDFE9(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI9*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI9_I_WDFE9__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ9(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ9)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ9_Q_WDFE9(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ9*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ9_Q_WDFE9__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN10(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN10)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN10_NUM_WDFE10(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN10*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN10_NUM_WDFE10__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI10(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI10)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI10_I_WDFE10(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI10*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI10_I_WDFE10__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ10(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ10)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ10_Q_WDFE10(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ10*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ10_Q_WDFE10__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN11(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN11)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN11_NUM_WDFE11(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN11*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN11_NUM_WDFE11__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI11(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI11)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI11_I_WDFE11(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI11*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI11_I_WDFE11__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CAR2CFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CAR2CFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR2CFG_PH_DET_ALGO2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR2CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR2CFG_PH_DET_ALGO2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR2CFG_ROTA2ON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR2CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR2CFG_ROTA2ON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR2CFG_STOP_NCO2UPDATE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR2CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR2CFG_STOP_NCO2UPDATE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR2CFG_STOP_CFR2UPDATE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR2CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR2CFG_STOP_CFR2UPDATE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR2CFG_EN_PHNOSRAM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR2CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR2CFG_EN_PHNOSRAM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR2CFG_STOPCAR2_DELFRAME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR2CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR2CFG_STOPCAR2_DELFRAME__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR2CFG_DESCRAMB_OFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR2CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR2CFG_DESCRAMB_OFF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR2CFR1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR2CFR1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR2CFR1_CFR2TOCFR1_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR2CFR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR2CFR1_CFR2TOCFR1_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR2CFR1_BCHERRCFR2_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR2CFR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR2CFR1_BCHERRCFR2_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR2CFR1_EN_S2CAR2CENTER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR2CFR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR2CFR1_EN_S2CAR2CENTER__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR2CFR1_CFR2_S2CONTROL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR2CFR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR2CFR1_CFR2_S2CONTROL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CAR3CFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CAR3CFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR3CFG_CARRIER3_ALPHA3DL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR3CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR3CFG_CARRIER3_ALPHA3DL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR3CFG_ABAMPLIF_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR3CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR3CFG_ABAMPLIF_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR3CFG_CAR3INTERM_DVBS1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR3CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR3CFG_CAR3INTERM_DVBS1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CAR3CFG_CARRIER23_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CAR3CFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CAR3CFG_CARRIER23_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR22(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR22)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR22_CAR2_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR22*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR22_CAR2_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR21(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR21)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR21_CAR2_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR21*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR21_CAR2_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR20(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR20)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR20_CAR2_FREQ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR20*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR20_CAR2_FREQ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLC2S1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLC2S1)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S1_CAR2S1_ALPHA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S1*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S1_CAR2S1_ALPHA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S1_CAR2S1_ALPHA_MANT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S1*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S1_CAR2S1_ALPHA_MANT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S1_CAR2S1_ANOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S1*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S1_CAR2S1_ANOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S1_NOSRAM_COEFOBS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S1*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S1_NOSRAM_COEFOBS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLC2S2Q(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLC2S2Q)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2Q_CAR2S2_Q_ALPH_E(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2Q*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2Q_CAR2S2_Q_ALPH_E__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2Q_CAR2S2_Q_ALPH_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2Q*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2Q_CAR2S2_Q_ALPH_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2Q_CAR2S2_QANOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2Q*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2Q_CAR2S2_QANOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2Q_ENAB_SPSKSYMB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2Q*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2Q_ENAB_SPSKSYMB__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLC2S28(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLC2S28)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S28_CAR2S2_8_ALPH_E(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S28*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S28_CAR2S2_8_ALPH_E__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S28_CAR2S2_8_ALPH_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S28*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S28_CAR2S2_8_ALPH_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S28_CAR2S2_8ANOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S28*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S28_CAR2S2_8ANOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S28_PLFCALC_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S28*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S28_PLFCALC_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLC2S216A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLC2S216A)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S216A_CAR2S2_16A_ALPH_E(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S216A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S216A_CAR2S2_16A_ALPH_E__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S216A_CAR2S2_16A_ALPH_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S216A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S216A_CAR2S2_16A_ALPH_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S216A_CAR2S2_16ANOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S216A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S216A_CAR2S2_16ANOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S216A_DIS_CPHERR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S216A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S216A_DIS_CPHERR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLC2S232A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLC2S232A)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S232A_CAR2S2_32A_ALPH_E(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S232A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S232A_CAR2S2_32A_ALPH_E__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S232A_CAR2S2_32A_ALPH_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S232A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S232A_CAR2S2_32A_ALPH_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S232A_CAR2S2_32ANOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S232A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S232A_CAR2S2_32ANOSAUTO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLC2S264A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLC2S264A)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S264A_CAR2S2_64APSK_ALPHA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S264A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S264A_CAR2S2_64APSK_ALPHA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S264A_CAR2S2_64APSK_ALPHA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S264A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S264A_CAR2S2_64APSK_ALPHA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S264A_CAR2S2_64ANOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S264A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S264A_CAR2S2_64ANOSAUTO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLC2S2128A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLC2S2128A)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2128A_CAR2S2_128APSK_ALPHA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2128A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2128A_CAR2S2_128APSK_ALPHA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2128A_CAR2S2_128APSK_ALPHA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2128A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2128A_CAR2S2_128APSK_ALPHA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2128A_CAR2S2_128ANOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2128A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2128A_CAR2S2_128ANOSAUTO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ACLC2S2256A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ACLC2S2256A)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2256A_CAR2S2_256APSK_ALPHA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2256A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2256A_CAR2S2_256APSK_ALPHA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2256A_CAR2S2_256APSK_ALPHA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2256A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2256A_CAR2S2_256APSK_ALPHA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ACLC2S2256A_CAR2S2_256ANOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ACLC2S2256A*(1<<16) + FC8CODEW_DVBSX_DEMOD_ACLC2S2256A_CAR2S2_256ANOSAUTO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLC2S1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLC2S1)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S1_CAR2S1_BETA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S1*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S1_CAR2S1_BETA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S1_CAR2S1_BETA_MANT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S1*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S1_CAR2S1_BETA_MANT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S1_CAR2S1_BNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S1*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S1_CAR2S1_BNOSAUTO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLC2S2Q(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLC2S2Q)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2Q_CAR2S2_Q_BETA_E(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2Q*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2Q_CAR2S2_Q_BETA_E__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2Q_CAR2S2_Q_BETA_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2Q*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2Q_CAR2S2_Q_BETA_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2Q_CAR2S2_QBNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2Q*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2Q_CAR2S2_QBNOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2Q_DVBS2S2Q_NIP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2Q*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2Q_DVBS2S2Q_NIP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLC2S28(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLC2S28)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S28_CAR2S2_8_BETA_E(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S28*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S28_CAR2S2_8_BETA_E__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S28_CAR2S2_8_BETA_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S28*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S28_CAR2S2_8_BETA_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S28_CAR2S2_8BNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S28*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S28_CAR2S2_8BNOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S28_DVBS2S28_NIP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S28*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S28_DVBS2S28_NIP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLC2S216A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLC2S216A)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S216A_CAR2S2_16A_BETA_E(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S216A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S216A_CAR2S2_16A_BETA_E__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S216A_CAR2S2_16A_BETA_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S216A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S216A_CAR2S2_16A_BETA_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S216A_CAR2S2_16BNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S216A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S216A_CAR2S2_16BNOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S216A_DVBS2S216A_NIP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S216A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S216A_DVBS2S216A_NIP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLC2S232A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLC2S232A)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S232A_CAR2S2_32A_BETA_E(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S232A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S232A_CAR2S2_32A_BETA_E__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S232A_CAR2S2_32A_BETA_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S232A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S232A_CAR2S2_32A_BETA_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S232A_CAR2S2_32BNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S232A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S232A_CAR2S2_32BNOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S232A_DVBS2S232A_NIP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S232A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S232A_DVBS2S232A_NIP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLC2S264A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLC2S264A)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S264A_CAR2S2_64APSK_BETA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S264A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S264A_CAR2S2_64APSK_BETA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S264A_CAR2S2_64APSK_BETA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S264A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S264A_CAR2S2_64APSK_BETA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S264A_CAR2S2_64BNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S264A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S264A_CAR2S2_64BNOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S264A_DVBS2S264A_NIP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S264A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S264A_DVBS2S264A_NIP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLC2S2128A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLC2S2128A)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2128A_CAR2S2_128APSK_BETA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2128A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2128A_CAR2S2_128APSK_BETA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2128A_CAR2S2_128APSK_BETA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2128A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2128A_CAR2S2_128APSK_BETA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2128A_CAR2S2_128BNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2128A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2128A_CAR2S2_128BNOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2128A_DVBS2S2128A_NIP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2128A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2128A_DVBS2S2128A_NIP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BCLC2S2256A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BCLC2S2256A)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2256A_CAR2S2_256APSK_BETA_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2256A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2256A_CAR2S2_256APSK_BETA_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2256A_CAR2S2_256APSK_BETA_MANTISSE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2256A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2256A_CAR2S2_256APSK_BETA_MANTISSE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2256A_CAR2S2_256BNOSAUTO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2256A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2256A_CAR2S2_256BNOSAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_BCLC2S2256A_DVBS2S2256A_NIP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BCLC2S2256A*(1<<16) + FC8CODEW_DVBSX_DEMOD_BCLC2S2256A_DVBS2S2256A_NIP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NCO2MAX1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NCO2MAX1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2MAX1_TETA2MAX_VABS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2MAX1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2MAX1_TETA2MAX_VABS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NCO2MAX0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NCO2MAX0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA3L_RSTCHG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2MAX0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA3L_RSTCHG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA3D_RSTCHG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2MAX0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA3D_RSTCHG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA2A_RSTCHG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2MAX0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA2A_RSTCHG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA2T_RSTCHG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2MAX0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA2T_RSTCHG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA2MAX_VABS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2MAX0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2MAX0_TETA2MAX_VABS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NCO2FR1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NCO2FR1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2FR1_NCO2MAX_VABS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2FR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2FR1_NCO2MAX_VABS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NCO2FR0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NCO2FR0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2FR0_TETA3L_DAMPLON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2FR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2FR0_TETA3L_DAMPLON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2FR0_TETA3D_DAMPLON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2FR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2FR0_TETA3D_DAMPLON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2FR0_TETA2_DAMPLON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2FR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2FR0_TETA2_DAMPLON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2FR0_TETA1_DAMPLON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2FR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2FR0_TETA1_DAMPLON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NCO2FR0_NCO2MAX_VABS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NCO2FR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NCO2FR0_NCO2MAX_VABS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR2AVRGE1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR2AVRGE1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR2AVRGE1_I2C_CFR2AVERAGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR2AVRGE1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR2AVRGE1_I2C_CFR2AVERAGE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFR2AVRGE0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFR2AVRGE0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFR2AVRGE0_I2C_CFR2AVERAGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFR2AVRGE0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFR2AVRGE0_I2C_CFR2AVERAGE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DPILOTMAX1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DPILOTMAX1)
#define FLD_FC8CODEW_DVBSX_DEMOD_DPILOTMAX1_ABSDIFF_PILOTRAMPE_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DPILOTMAX1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DPILOTMAX1_ABSDIFF_PILOTRAMPE_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DPILOTMAX0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DPILOTMAX0)
#define FLD_FC8CODEW_DVBSX_DEMOD_DPILOTMAX0_ABSDIFF_PILOTRAMPE_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DPILOTMAX0*(1<<16) + FC8CODEW_DVBSX_DEMOD_DPILOTMAX0_ABSDIFF_PILOTRAMPE_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFG_NOSDATA_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFG_NOSDATA_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFG_NOSPLH_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFG_NOSPLH_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFG_DUMMYPL_NOSDATA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFG_DUMMYPL_NOSDATA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFG_NOSIN_EGALSEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFG_NOSIN_EGALSEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFG_DIS_ACMRATIO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFG_DIS_ACMRATIO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSCFGF1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSCFGF1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFGF1_FRAMESEL_TYPE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFGF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFGF1_FRAMESEL_TYPE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFGF1_FRAMESEL_TYPESEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFGF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFGF1_FRAMESEL_TYPESEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFGF1_NOSDATA_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFGF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFGF1_NOSDATA_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFGF1_NOS_DELFRAME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFGF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFGF1_NOS_DELFRAME__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFGF1_LOWNOISE_MESURE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFGF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFGF1_LOWNOISE_MESURE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSCFGF2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSCFGF2)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFGF2_FRAMESEL_MODCOD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFGF2*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFGF2_FRAMESEL_MODCOD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSCFGF2_FRAMESEL_MODCODSEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSCFGF2*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSCFGF2_FRAMESEL_MODCODSEL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSDATAT1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSDATAT1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSDATAT1_NOSDATAT_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSDATAT1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSDATAT1_NOSDATAT_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSDATAT0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSDATAT0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSDATAT0_NOSDATAT_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSDATAT0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSDATAT0_NOSDATAT_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSDATA1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSDATA1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSDATA1_NOSDATA_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSDATA1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSDATA1_NOSDATA_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSDATA0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSDATA0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSDATA0_NOSDATA_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSDATA0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSDATA0_NOSDATA_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSPLHT1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSPLHT1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSPLHT1_NOSPLHT_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSPLHT1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSPLHT1_NOSPLHT_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSPLHT0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSPLHT0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSPLHT0_NOSPLHT_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSPLHT0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSPLHT0_NOSPLHT_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSPLH1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSPLH1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSPLH1_NOSPLH_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSPLH1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSPLH1_NOSPLH_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSPLH0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSPLH0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSPLH0_NOSPLH_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSPLH0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSPLH0_NOSPLH_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSDATAT1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSDATAT1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSDATAT1_NOSDATAT_UNNORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSDATAT1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSDATAT1_NOSDATAT_UNNORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSDATAT0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSDATAT0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSDATAT0_NOSDATAT_UNNORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSDATAT0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSDATAT0_NOSDATAT_UNNORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSFRAME1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSFRAME1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSFRAME1_NOSFRAME_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSFRAME1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSFRAME1_NOSFRAME_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSFRAME0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSFRAME0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSFRAME0_NOSFRAME_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSFRAME0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSFRAME0_NOSFRAME_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSRAD1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSRAD1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSRAD1_NOSRADIAL_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSRAD1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSRAD1_NOSRADIAL_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NNOSRAD0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NNOSRAD0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NNOSRAD0_NOSRADIAL_NORMED(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NNOSRAD0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NNOSRAD0_NOSRADIAL_NORMED__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSRAMCNR1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSRAMCNR1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMCNR1_NOSRAM_CNRVAL_EXT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMCNR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMCNR1_NOSRAM_CNRVAL_EXT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSRAMCNR0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSRAMCNR0)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMCNR0_NOSRAM_CNRVAL_EXT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMCNR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMCNR0_NOSRAM_CNRVAL_EXT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSTHRES1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSTHRES1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSTHRES1_NOS_THRESHOLD1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSTHRES1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSTHRES1_NOS_THRESHOLD1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSTHRES2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSTHRES2)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSTHRES2_NOS_THRESHOLD2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSTHRES2*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSTHRES2_NOS_THRESHOLD2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSDIFF1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSDIFF1)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSDIFF1_NOSTHRES1_DIFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSDIFF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSDIFF1_NOSTHRES1_DIFF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_RAINFADE(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_RAINFADE)
#define FLD_FC8CODEW_DVBSX_DEMOD_RAINFADE_RAINFADE_TIMEOUT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_RAINFADE*(1<<16) + FC8CODEW_DVBSX_DEMOD_RAINFADE_RAINFADE_TIMEOUT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_RAINFADE_RAINFADE_CNLIMIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_RAINFADE*(1<<16) + FC8CODEW_DVBSX_DEMOD_RAINFADE_RAINFADE_CNLIMIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_RAINFADE_NOSTHRES_UNITS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_RAINFADE*(1<<16) + FC8CODEW_DVBSX_DEMOD_RAINFADE_NOSTHRES_UNITS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSRAMCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSRAMCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_LGNCNR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_LGNCNR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_CNRONLY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_CNRONLY__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_ACTIVATION(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_ACTIVATION__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_QUADRAT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_QUADRAT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_DVBS2DATA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMCFG_NOSRAM_DVBS2DATA__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSRAMPOS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSRAMPOS)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMPOS_NOSRAM_CNRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMPOS*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMPOS_NOSRAM_CNRVAL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMPOS_NOSRAM_VALIDE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMPOS*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMPOS_NOSRAM_VALIDE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMPOS_NOSRAM_LGNCNR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMPOS*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMPOS_NOSRAM_LGNCNR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_NOSRAMVAL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_NOSRAMVAL)
#define FLD_FC8CODEW_DVBSX_DEMOD_NOSRAMVAL_NOSRAM_CNRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_NOSRAMVAL*(1<<16) + FC8CODEW_DVBSX_DEMOD_NOSRAMVAL_NOSRAM_CNRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SOFCODE3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SOFCODE3)
#define FLD_FC8CODEW_DVBSX_DEMOD_SOFCODE3_USER_SOF_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SOFCODE3*(1<<16) + FC8CODEW_DVBSX_DEMOD_SOFCODE3_USER_SOF_SEQUENCE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SOFCODE3_USER_SOF_PROG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SOFCODE3*(1<<16) + FC8CODEW_DVBSX_DEMOD_SOFCODE3_USER_SOF_PROG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SOFCODE3_EGALPLH_MUXING(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SOFCODE3*(1<<16) + FC8CODEW_DVBSX_DEMOD_SOFCODE3_EGALPLH_MUXING__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SOFCODE3_USERPLHEADER_ON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SOFCODE3*(1<<16) + FC8CODEW_DVBSX_DEMOD_SOFCODE3_USERPLHEADER_ON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SOFCODE2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SOFCODE2)
#define FLD_FC8CODEW_DVBSX_DEMOD_SOFCODE2_USER_SOF_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SOFCODE2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SOFCODE2_USER_SOF_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SOFCODE1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SOFCODE1)
#define FLD_FC8CODEW_DVBSX_DEMOD_SOFCODE1_USER_SOF_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SOFCODE1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SOFCODE1_USER_SOF_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SOFCODE0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SOFCODE0)
#define FLD_FC8CODEW_DVBSX_DEMOD_SOFCODE0_USER_SOF_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SOFCODE0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SOFCODE0_USER_SOF_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSSCRAMB7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB7)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSSCRAMB7_USER_PLSSCRAMB_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB7*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSSCRAMB7_USER_PLSSCRAMB_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSSCRAMB6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB6)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSSCRAMB6_USER_PLSSCRAMB_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB6*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSSCRAMB6_USER_PLSSCRAMB_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSSCRAMB5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB5)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSSCRAMB5_USER_PLSSCRAMB_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB5*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSSCRAMB5_USER_PLSSCRAMB_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSSCRAMB4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB4)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSSCRAMB4_USER_PLSSCRAMB_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB4*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSSCRAMB4_USER_PLSSCRAMB_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSSCRAMB3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB3)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSSCRAMB3_USER_PLSSCRAMB_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB3*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSSCRAMB3_USER_PLSSCRAMB_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSSCRAMB2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB2)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSSCRAMB2_USER_PLSSCRAMB_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB2*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSSCRAMB2_USER_PLSSCRAMB_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSSCRAMB1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSSCRAMB1_USER_PLSSCRAMB_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSSCRAMB1_USER_PLSSCRAMB_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSSCRAMB0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSSCRAMB0_USER_PLSSCRAMB_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSSCRAMB0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSSCRAMB0_USER_PLSSCRAMB_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_USER_PLSSCRAMBM_SEQUENCE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_MPLS_PERMUTE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_MPLS_PERMUTE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_PLFNUM_PERMUTE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_PLFNUM_PERMUTE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_EN_DVBS2ORIG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_EN_DVBS2ORIG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_EN_DVBS2EXT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_EN_DVBS2EXT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_EN_ANNEXEM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_EN_ANNEXEM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_PLHDETECT_SERIE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBB_PLHDETECT_SERIE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBA(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBA)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBA_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMBA*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMBA_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB9(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB9)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB9_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB9*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB9_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB8(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB8)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB8_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB8*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB8_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB7)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB7_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB7*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB7_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB6)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB6_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB6*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB6_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB5)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB5_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB5*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB5_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB4)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB4_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB4*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB4_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB3)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB3_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB3*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB3_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB2)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB2_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB2*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB2_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB1_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB1_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB0_USER_PLSSCRAMBM_SEQUENCE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLSMSCRAMB0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLSMSCRAMB0_USER_PLSSCRAMBM_SEQUENCE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLROOT2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLROOT2)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLROOT2_PLSCRAMB_ROOT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLROOT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLROOT2_PLSCRAMB_ROOT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLROOT2_PLSCRAMB_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLROOT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLROOT2_PLSCRAMB_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLROOT2_PLHAUTO_FASTMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLROOT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLROOT2_PLHAUTO_FASTMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLROOT2_PLHAUTO_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLROOT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLROOT2_PLHAUTO_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLROOT1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLROOT1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLROOT1_PLSCRAMB_ROOT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLROOT1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLROOT1_PLSCRAMB_ROOT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLROOT0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLROOT0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLROOT0_PLSCRAMB_ROOT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLROOT0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLROOT0_PLSCRAMB_ROOT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST0)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST0_NACCES_MODCODCH(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST0*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST0_NACCES_MODCODCH__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST0_NOSPLHT_NOPILOT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST0*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST0_NOSPLHT_NOPILOT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST0_MODCOD_RESLST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST0*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST0_MODCOD_RESLST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST0_MODCODRQ_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST0*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST0_MODCODRQ_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST0_SYNCTAG_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST0*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST0_SYNCTAG_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST0_MODCODRQ_NRSTTOK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST0*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST0_MODCODRQ_NRSTTOK__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST1)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST1_DIS_32PSK_9_10(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST1*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST1_DIS_32PSK_9_10__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST1_NRESET_MODCODLST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST1*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST1_NRESET_MODCODLST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST1_SYMBRATE_FILTER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST1*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST1_SYMBRATE_FILTER__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST1_HIER_MODCODSEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST1*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST1_HIER_MODCODSEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST1_AUTODET_HIERSFEC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST1*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST1_AUTODET_HIERSFEC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST1_EN_HIERSFEC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST1*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST1_EN_HIERSFEC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST2)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST2_DIS_32PSK_5_6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST2*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST2_DIS_32PSK_5_6__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST2_DIS_32PSK_8_9(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST2*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST2_DIS_32PSK_8_9__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST3)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST3_DIS_32PSK_3_4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST3*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST3_DIS_32PSK_3_4__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST3_DIS_32PSK_4_5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST3*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST3_DIS_32PSK_4_5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST4)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST4_DIS_16PSK_8_9(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST4*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST4_DIS_16PSK_8_9__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST4_DIS_16PSK_9_10(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST4*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST4_DIS_16PSK_9_10__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST4_DUMMYPL_NOPILOT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST4*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST4_DUMMYPL_NOPILOT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST4_DUMMYPL_PILOT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST4*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST4_DUMMYPL_PILOT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST5)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST5_DIS_16PSK_4_5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST5*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST5_DIS_16PSK_4_5__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST5_DIS_16PSK_5_6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST5*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST5_DIS_16PSK_5_6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST6)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST6_DIS_16PSK_2_3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST6*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST6_DIS_16PSK_2_3__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST6_DIS_16PSK_3_4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST6*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST6_DIS_16PSK_3_4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST7)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST7_DIS_8P_8_9(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST7*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST7_DIS_8P_8_9__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST7_DIS_8PSK_9_10(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST7*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST7_DIS_8PSK_9_10__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST7_MODCOD_NNOSFILTER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST7*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST7_MODCOD_NNOSFILTER__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST8(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST8)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST8_DIS_8P_3_4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST8*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST8_DIS_8P_3_4__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST8_DIS_8P_5_6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST8*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST8_DIS_8P_5_6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLST9(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLST9)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST9_DIS_8P_3_5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST9*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST9_DIS_8P_3_5__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLST9_DIS_8P_2_3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLST9*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLST9_DIS_8P_2_3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLSTA(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLSTA)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTA_DIS_QP_8_9(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTA*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTA_DIS_QP_8_9__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTA_DIS_QPSK_9_10(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTA*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTA_DIS_QPSK_9_10__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTA_NOSFILTER_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTA*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTA_NOSFILTER_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTA_NOSFILTER_LIMITE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTA*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTA_NOSFILTER_LIMITE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLSTB(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLSTB)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTB_DIS_QP_4_5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTB*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTB_DIS_QP_4_5__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTB_DIS_QP_5_6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTB*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTB_DIS_QP_5_6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLSTC(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLSTC)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTC_DIS_QP_2_3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTC*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTC_DIS_QP_2_3__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTC_DIS_QP_3_4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTC*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTC_DIS_QP_3_4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLSTD(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLSTD)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTD_DIS_QPSK_1_2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTD*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTD_DIS_QPSK_1_2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTD_DIS_QPSK_3_5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTD*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTD_DIS_QPSK_3_5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLSTE(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLSTE)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTE_DIS_QPSK_1_3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTE*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTE_DIS_QPSK_1_3__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTE_DIS_QPSK_2_5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTE*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTE_DIS_QPSK_2_5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLSTF(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLSTF)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTF_MODCOD_NSTOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTF*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTF_MODCOD_NSTOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTF_DDEMOD_NSET(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTF*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTF_DDEMOD_NSET__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTF_DEMODOUT_ENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTF*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTF_DEMODOUT_ENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTF_DEMOD_INVMODLST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTF*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTF_DEMOD_INVMODLST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLSTF_DIS_QPSK_1_4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLSTF*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLSTF_DIS_QPSK_1_4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS10(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS10)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_32APSK_32_45_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_32APSK_32_45_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_32APSK_32_45_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_32APSK_32_45_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R250_8PSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R250_8PSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R251_16APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R251_16APSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R252_32APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R252_32APSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R253_64APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R253_64APSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R254_256APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R254_256APSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R255_1024APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS10_DIS_R255_1024APSK_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS11(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS11)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_26_45_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_26_45_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_26_45_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_26_45_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_3_5_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_3_5_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_3_5_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_3_5_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_32_45_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_32_45_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_32_45_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_16APSK_32_45_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_32APSK_2_3_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_32APSK_2_3_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_32APSK_2_3_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS11_DIS_32APSK_2_3_SH_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS12(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS12)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_8PSK_26_45_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS12*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_8PSK_26_45_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_8PSK_26_45_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS12*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_8PSK_26_45_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_8PSK_32_45_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS12*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_8PSK_32_45_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_8PSK_32_45_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS12*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_8PSK_32_45_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_16APSK_7_15_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS12*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_16APSK_7_15_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_16APSK_7_15_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS12*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_16APSK_7_15_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_16APSK_8_15_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS12*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_16APSK_8_15_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_16APSK_8_15_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS12*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS12_DIS_16APSK_8_15_SH_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS13(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS13)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_QPSK_8_15_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS13*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_QPSK_8_15_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_QPSK_8_15_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS13*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_QPSK_8_15_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_QPSK_32_45_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS13*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_QPSK_32_45_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_QPSK_32_45_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS13*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_QPSK_32_45_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_8PSK_7_15_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS13*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_8PSK_7_15_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_8PSK_7_15_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS13*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_8PSK_7_15_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_8PSK_8_15_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS13*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_8PSK_8_15_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_8PSK_8_15_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS13*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS13_DIS_8PSK_8_15_SH_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS14(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS14)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_11_45_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS14*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_11_45_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_11_45_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS14*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_11_45_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_4_15_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS14*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_4_15_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_4_15_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS14*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_4_15_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_14_45_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS14*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_14_45_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_14_45_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS14*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_14_45_SH_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_7_15_SH_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS14*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_7_15_SH_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_7_15_SH_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS14*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS14_DIS_QPSK_7_15_SH_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS15(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS15)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_31_45_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS15*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_31_45_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_31_45_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS15*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_31_45_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_32_45_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS15*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_32_45_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_32_45_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS15*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_32_45_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_11_15_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS15*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_11_15_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_11_15_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS15*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_11_15_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_3_4_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS15*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_3_4_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_3_4_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS15*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS15_DIS_256APSK_3_4_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS16(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS16)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_128APSK_3_4_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS16*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_128APSK_3_4_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_128APSK_3_4_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS16*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_128APSK_3_4_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_128APSK_7_9_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS16*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_128APSK_7_9_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_128APSK_7_9_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS16*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_128APSK_7_9_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_256APSK_29_45_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS16*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_256APSK_29_45_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_256APSK_29_45_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS16*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_256APSK_29_45_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_256APSK_2_3_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS16*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_256APSK_2_3_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_256APSK_2_3_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS16*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS16_DIS_256APSK_2_3_L_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS17(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS17)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_R192_64APSK_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS17*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_R192_64APSK_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_R193_64APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS17*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_R193_64APSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_64APSK_4_5_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS17*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_64APSK_4_5_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_64APSK_4_5_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS17*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_64APSK_4_5_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_R196_64APSK_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS17*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_R196_64APSK_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_R197_64APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS17*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_R197_64APSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_64APSK_5_6_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS17*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_64APSK_5_6_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_64APSK_5_6_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS17*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS17_DIS_64APSK_5_6_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS18(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS18)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_32_45_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS18*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_32_45_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_32_45_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS18*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_32_45_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_11_15_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS18*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_11_15_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_11_15_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS18*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_11_15_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_R188_64APSK_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS18*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_R188_64APSK_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_R189_64APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS18*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_R189_64APSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_7_9_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS18*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_7_9_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_7_9_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS18*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS18_DIS_64APSK_7_9_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS19(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS19)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_R176_32APSK_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS19*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_R176_32APSK_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_R177_32APSK_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS19*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_R177_32APSK_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_32_45_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS19*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_32_45_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_32_45_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS19*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_32_45_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_11_15_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS19*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_11_15_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_11_15_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS19*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_11_15_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_7_9_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS19*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_7_9_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_7_9_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS19*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS19_DIS_32APSK_7_9_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS1A(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS1A)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_13_18_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1A*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_13_18_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_13_18_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1A*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_13_18_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_7_9_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1A*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_7_9_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_7_9_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1A*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_7_9_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_77_90_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1A*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_77_90_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_77_90_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1A*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_16APSK_77_90_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_32APSK_2_3_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1A*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_32APSK_2_3_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_32APSK_2_3_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1A*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1A_DIS_32APSK_2_3_L_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS1B(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS1B)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_28_45_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1B*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_28_45_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_28_45_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1B*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_28_45_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_23_36_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1B*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_23_36_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_23_36_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1B*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_23_36_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_2_3_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1B*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_2_3_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_2_3_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1B*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_2_3_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_25_36_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1B*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_25_36_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_25_36_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1B*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1B_DIS_16APSK_25_36_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS1C(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS1C)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_5_9_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1C*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_5_9_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_5_9_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1C*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_5_9_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_26_45_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1C*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_26_45_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_26_45_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1C*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_26_45_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_3_5_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1C*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_3_5_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_3_5_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1C*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_3_5_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_3_5_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1C*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_3_5_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_3_5_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1C*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1C_DIS_16APSK_3_5_L_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS1D(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS1D)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_8PSK_25_36_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1D*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_8PSK_25_36_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_8PSK_25_36_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1D*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_8PSK_25_36_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_8PSK_13_18_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1D*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_8PSK_13_18_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_8PSK_13_18_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1D*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_8PSK_13_18_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_16APSK_1_2_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1D*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_16APSK_1_2_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_16APSK_1_2_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1D*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_16APSK_1_2_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_16APSK_8_15_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1D*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_16APSK_8_15_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_16APSK_8_15_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1D*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1D_DIS_16APSK_8_15_L_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS1E(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS1E)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_QPSK_11_20_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1E*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_QPSK_11_20_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_QPSK_11_20_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1E*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_QPSK_11_20_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8APSK_5_9_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1E*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8APSK_5_9_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8APSK_5_9_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1E*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8APSK_5_9_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8APSK_26_45_L_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1E*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8APSK_26_45_L_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8APSK_26_45_L_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1E*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8APSK_26_45_L_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8PSK_23_36_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1E*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8PSK_23_36_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8PSK_23_36_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1E*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1E_DIS_8PSK_23_36_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODLS1F(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODLS1F)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_R128_8PSK_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1F*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_R128_8PSK_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_VLSRN1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1F*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_VLSRN1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_R130_16APSK_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1F*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_R130_16APSK_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_VLSNR2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1F*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_VLSNR2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_QPSK_13_45_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1F*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_QPSK_13_45_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_QPSK_13_45_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1F*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_QPSK_13_45_PON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_QPSK_9_20_POFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1F*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_QPSK_9_20_POFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_QPSK_9_20_PON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODLS1F*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODLS1F_DIS_QPSK_9_20_PON__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODCH3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODCH3)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCH3_MODCOD_CHOOSEN3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCH3*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCH3_MODCOD_CHOOSEN3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODCH2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODCH2)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCH2_MODCOD_CHOOSEN2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCH2*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCH2_MODCOD_CHOOSEN2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODCH1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODCH1)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCH1_MODCOD_CHOOSEN1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCH1*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCH1_MODCOD_CHOOSEN1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MODCODCHM(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MODCODCHM)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCHM_MODCOD_INF1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCHM*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCHM_MODCOD_INF1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCHM_MODCOD_FENETRE23(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCHM*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCHM_MODCOD_FENETRE23__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCHM_MODCODLST_S2X(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCHM*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCHM_MODCODLST_S2X__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCHM_OLD_NCOCALC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCHM*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCHM_OLD_NCOCALC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCHM_ROTAPLS_OFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCHM*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCHM_ROTAPLS_OFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_MODCODCHM_NFIFO2_MANOFFSET(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MODCODCHM*(1<<16) + FC8CODEW_DVBSX_DEMOD_MODCODCHM_NFIFO2_MANOFFSET__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_AGC2MEM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_AGC2MEM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_NOSTORE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_NOSTORE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_NEWONLY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_NEWONLY__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_STRALL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_STRALL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_UNVALID(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_UNVALID__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_RST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESCFG_DMDRES_RST__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESADR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESADR)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESADR_DMDRES_RESNBR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESADR*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESADR_DMDRES_RESNBR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESADR_DMDRES_MEMFULL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESADR*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESADR_DMDRES_MEMFULL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESADR_DMDRES_VALIDCFR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESADR*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESADR_DMDRES_VALIDCFR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESADR_SUSP_PREDCANAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESADR*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESADR_SUSP_PREDCANAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA7)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA7_DMDRES_SFRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA7*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA7_DMDRES_SFRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA6)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA6_DMDRES_SFRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA6*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA6_DMDRES_SFRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA5)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA5_DMDRES_CFRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA5*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA5_DMDRES_CFRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA4)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA4_DMDRES_CFRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA4*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA4_DMDRES_CFRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA3)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA3_DMDRES_CNRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA3*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA3_DMDRES_CNRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA2)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA2_DMDRES_ROLLOFF2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA2_DMDRES_ROLLOFF2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA2_DMDRES_VALIDDATA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA2_DMDRES_VALIDDATA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA2_DMDRES_SPECINV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA2_DMDRES_SPECINV__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA2_DMDRES_CNRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA2*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA2_DMDRES_CNRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA1)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA1_RMODCOD5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA1_RMODCOD5__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA1_RANNEXE_M(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA1_RANNEXE_M__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA1_RLOCK_DEFINITIF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA1_RLOCK_DEFINITIF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA1_DMDRES_RESCPT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA1_DMDRES_RESCPT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA0)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_PUNCTVIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA0*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_PUNCTVIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_DSSVIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA0*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_DSSVIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_SYMIQVIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA0*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_SYMIQVIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_VALIDCHNL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA0*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_VALIDCHNL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_DVBS2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA0*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA0_DMDRES_DVBS2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA8(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA8)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA8_DMDRES_SFRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA8*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA8_DMDRES_SFRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDRESDATA9(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDRESDATA9)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDRESDATA9_DMDRES_CFRVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDRESDATA9*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDRESDATA9_DMDRES_CFRVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TNRCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TNRCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_MADDRESS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_MADDRESS__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_VCOSRCH(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_VCOSRCH__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_SECSTOP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_SECSTOP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_TYPE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_TYPE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_ACKFAIL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG_TUN_ACKFAIL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TNRCFG2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TNRCFG2)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG2_DIS_2BWAGC1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG2_DIS_2BWAGC1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG2_SHORT_WAITSTATES(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG2_SHORT_WAITSTATES__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG2_DIS_BWCALC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG2_DIS_BWCALC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG2_TUNER_OBSPAGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG2_TUNER_OBSPAGE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG2_TUNER_LBAND(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG2_TUNER_LBAND__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG2_STB6120_DBLI2C(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG2_STB6120_DBLI2C__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG2_STB6110_STEP2MHZ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG2_STB6110_STEP2MHZ__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TNRCFG2_TUN_IQSWAP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TNRCFG2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TNRCFG2_TUN_IQSWAP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ11(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ11)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ11_Q_WDFE11(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ11*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ11_Q_WDFE11__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN12(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN12)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN12_NUM_WDFE12(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN12*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN12_NUM_WDFE12__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI12(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI12)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI12_I_WDFE12(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI12*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI12_I_WDFE12__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ12(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ12)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ12_Q_WDFE12(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ12*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ12_Q_WDFE12__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN13(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN13)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN13_NUM_WDFE13(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN13*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN13_NUM_WDFE13__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI13(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI13)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI13_I_WDFE13(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI13*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI13_I_WDFE13__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ13(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ13)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ13_Q_WDFE13(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ13*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ13_Q_WDFE13__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN14(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN14)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN14_NUM_WDFE14(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN14*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN14_NUM_WDFE14__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI14(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI14)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI14_I_WDFE14(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI14*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI14_I_WDFE14__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ14(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ14)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ14_Q_WDFE14(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ14*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ14_Q_WDFE14__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN15(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN15)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN15_NUM_WDFE15(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN15*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN15_NUM_WDFE15__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI15(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI15)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI15_I_WDFE15(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI15*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI15_I_WDFE15__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ15(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ15)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ15_Q_WDFE15(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ15*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ15_Q_WDFE15__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEN16(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEN16)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEN16_NUM_WDFE16(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEN16*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEN16_NUM_WDFE16__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEI16(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEI16)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEI16_I_WDFE16(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEI16*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEI16_I_WDFE16__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_WDFEQ16(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_WDFEQ16)
#define FLD_FC8CODEW_DVBSX_DEMOD_WDFEQ16_Q_WDFE16(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_WDFEQ16*(1<<16) + FC8CODEW_DVBSX_DEMOD_WDFEQ16_Q_WDFE16__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEF7(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEF7)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF7_SMAPCOEF_IQMULT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF7*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF7_SMAPCOEF_IQMULT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF7_DIS_QSCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF7*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF7_DIS_QSCALE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEF6(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_DIS_AB8PSK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_DIS_AB8PSK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_LLRDIV_NOREM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_LLRDIV_NOREM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_ADJ_8PSKLLR1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_ADJ_8PSKLLR1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_ATTEN_AGC2DXX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_ATTEN_AGC2DXX__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_OLD_32APSK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_OLD_32APSK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_CORDIC_LSBMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_CORDIC_LSBMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_DIS_LLRATTEN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_DIS_LLRATTEN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_DIS_AGC2SCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF6*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF6_DIS_AGC2SCALE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEF5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEF5)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF5_SMAPCOEF_IQSINCOS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF5*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF5_SMAPCOEF_IQSINCOS__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF5_DIS_8SCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF5*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF5_DIS_8SCALE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEF4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEF4)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF4_SMAPCOEF_RAYONA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF4*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF4_SMAPCOEF_RAYONA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF4_DIS_16APSKRMP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF4*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF4_DIS_16APSKRMP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEF3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEF3)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF3_SMAPCOEF_RAYONB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF3*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF3_SMAPCOEF_RAYONB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF3_DIS_16APSKADJ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF3*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF3_DIS_16APSKADJ__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEF2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEF2)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF2_SMAPCOEF_IQDIFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF2_SMAPCOEF_IQDIFF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEF1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEF1)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF1_SMAPCOEF_SINCOSLLR1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF1_SMAPCOEF_SINCOSLLR1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF1_DIS_16SCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF1_DIS_16SCALE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEF0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEF0)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF0_SMAPCOEF_SINCOS30(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF0_SMAPCOEF_SINCOS30__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEF0_DIS_32SCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEF0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEF0_DIS_32SCALE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SDEMAP(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SDEMAP)
#define FLD_FC8CODEW_DVBSX_DEMOD_SDEMAP_LLRFACTOR_MANUAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SDEMAP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SDEMAP_LLRFACTOR_MANUAL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SDEMAP_SMAPDEL_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SDEMAP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SDEMAP_SMAPDEL_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SDEMAP_SMAPCOEF_TBLSELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SDEMAP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SDEMAP_SMAPCOEF_TBLSELECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SDEMAP_SDDSOF_MSKMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SDEMAP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SDEMAP_SDDSOF_MSKMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SDEMAP_HARDDEMAP_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SDEMAP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SDEMAP_HARDDEMAP_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SDEMAP_SDDATACK_DELAI(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SDEMAP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SDEMAP_SDDATACK_DELAI__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SDEMAP_SDDATAHIER_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SDEMAP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SDEMAP_SDDATAHIER_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SDEMAP_SDDSTOP_NOSIGNAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SDEMAP*(1<<16) + FC8CODEW_DVBSX_DEMOD_SDEMAP_SDDSTOP_NOSIGNAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEFM2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM2)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEFM2_SMAPCOEF_SINCOS22(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEFM2_SMAPCOEF_SINCOS22__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEFM2_DIS_64SCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM2*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEFM2_DIS_64SCALE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEFM1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM1)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEFM1_SMAPCOEF_SINCOS60(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEFM1_SMAPCOEF_SINCOS60__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEFM1_DIS_128SCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM1*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEFM1_DIS_128SCALE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_SMAPCOEFM0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM0)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEFM0_SMAPCOEF_RAYONC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEFM0_SMAPCOEF_RAYONC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_SMAPCOEFM0_DIS_256SCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_SMAPCOEFM0*(1<<16) + FC8CODEW_DVBSX_DEMOD_SMAPCOEFM0_DIS_256SCALE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LLROBS5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LLROBS5)
#define FLD_FC8CODEW_DVBSX_DEMOD_LLROBS5_LLRX_RESULT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LLROBS5*(1<<16) + FC8CODEW_DVBSX_DEMOD_LLROBS5_LLRX_RESULT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LLROBS4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LLROBS4)
#define FLD_FC8CODEW_DVBSX_DEMOD_LLROBS4_LLRX_RESULT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LLROBS4*(1<<16) + FC8CODEW_DVBSX_DEMOD_LLROBS4_LLRX_RESULT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LLROBS3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LLROBS3)
#define FLD_FC8CODEW_DVBSX_DEMOD_LLROBS3_LLRX_RESULT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LLROBS3*(1<<16) + FC8CODEW_DVBSX_DEMOD_LLROBS3_LLRX_RESULT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LLROBS2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LLROBS2)
#define FLD_FC8CODEW_DVBSX_DEMOD_LLROBS2_LLRX_RESULT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LLROBS2*(1<<16) + FC8CODEW_DVBSX_DEMOD_LLROBS2_LLRX_RESULT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LLROBS1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LLROBS1)
#define FLD_FC8CODEW_DVBSX_DEMOD_LLROBS1_LLRX_RESULT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LLROBS1*(1<<16) + FC8CODEW_DVBSX_DEMOD_LLROBS1_LLRX_RESULT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LLROBS0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LLROBS0)
#define FLD_FC8CODEW_DVBSX_DEMOD_LLROBS0_LLRX_RESULT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LLROBS0*(1<<16) + FC8CODEW_DVBSX_DEMOD_LLROBS0_LLRX_RESULT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LLROBSCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LLROBSCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_LLROBSCFG_LLROBS_CFG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LLROBSCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_LLROBSCFG_LLROBS_CFG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDPLHSTAT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDPLHSTAT)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDPLHSTAT_PLH_STATISTIC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDPLHSTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDPLHSTAT_PLH_STATISTIC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDSELOBS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDSELOBS)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSELOBS_CCILIST_INVALIDATE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSELOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSELOBS_CCILIST_INVALIDATE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NODVBS1_SEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSELOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NODVBS1_SEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NODVBS2_SEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSELOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NODVBS2_SEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NOVCM_SEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSELOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NOVCM_SEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NONCR_SEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSELOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NONCR_SEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NOS2X_SEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSELOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NOS2X_SEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NOSHDB_SEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDSELOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDSELOBS_NOSHDB_SEL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LOCKTIME3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LOCKTIME3)
#define FLD_FC8CODEW_DVBSX_DEMOD_LOCKTIME3_DEMOD_LOCKTIME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LOCKTIME3*(1<<16) + FC8CODEW_DVBSX_DEMOD_LOCKTIME3_DEMOD_LOCKTIME__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LOCKTIME2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LOCKTIME2)
#define FLD_FC8CODEW_DVBSX_DEMOD_LOCKTIME2_DEMOD_LOCKTIME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LOCKTIME2*(1<<16) + FC8CODEW_DVBSX_DEMOD_LOCKTIME2_DEMOD_LOCKTIME__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LOCKTIME1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LOCKTIME1)
#define FLD_FC8CODEW_DVBSX_DEMOD_LOCKTIME1_DEMOD_LOCKTIME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LOCKTIME1*(1<<16) + FC8CODEW_DVBSX_DEMOD_LOCKTIME1_DEMOD_LOCKTIME__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_LOCKTIME0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_LOCKTIME0)
#define FLD_FC8CODEW_DVBSX_DEMOD_LOCKTIME0_DEMOD_LOCKTIME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_LOCKTIME0*(1<<16) + FC8CODEW_DVBSX_DEMOD_LOCKTIME0_DEMOD_LOCKTIME__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALCFG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALCFG)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_I2CPAGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_I2CPAGE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_INCMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_INCMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_INCINIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_INCINIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_LTIMEOUT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_LTIMEOUT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_OBSMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_OBSMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_RUNENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALCFG*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALCFG_CAL_RUNENABLE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALADDR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALADDR)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALADDR_CAL_I2CADDR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALADDR*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALADDR_CAL_I2CADDR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALSTART(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALSTART)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALSTART_CAL_STARTVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALSTART*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALSTART_CAL_STARTVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALMASK(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALMASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALMASK_CAL_MASKVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALMASK*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALMASK_CAL_MASKVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALSTOP(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALSTOP)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALSTOP_CAL_STOPVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALSTOP*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALSTOP_CAL_STOPVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALOBS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALOBS)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALOBS_CAL_OBSERVATION(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALOBS*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALOBS_CAL_OBSERVATION__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALRESINC(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALRESINC)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRESINC_CAL_RESULTINC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRESINC*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRESINC_CAL_RESULTINC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALRESDEC(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALRESDEC)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRESDEC_CAL_RESULTDEC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRESDEC*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRESDEC_CAL_RESULTDEC__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CALRLIST(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CALRLIST)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_TIMING(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRLIST*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_TIMING__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_CARRIER1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRLIST*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_CARRIER1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_CARRIER2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRLIST*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_CARRIER2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_GAINLLRVIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRLIST*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_GAINLLRVIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_AGCXREF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRLIST*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_AGCXREF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_CAR1S2AB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRLIST*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_CAR1S2AB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRLIST_DISCAL_I2CIDLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRLIST*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRLIST_DISCAL_I2CIDLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_DOUBLERUN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CALRLIST*(1<<16) + FC8CODEW_DVBSX_DEMOD_CALRLIST_CAL_DOUBLERUN__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHCCMP1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHCCMP1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHCCMP1_CORREL_COMPARE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHCCMP1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHCCMP1_CORREL_COMPARE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHCCMP0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHCCMP0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHCCMP0_CORREL_COMPARE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHCCMP0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHCCMP0_CORREL_COMPARE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDTIMER(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDTIMER)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDTIMER_DEMOD_TIMER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDTIMER*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDTIMER_DEMOD_TIMER__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DMDATTEMPT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DMDATTEMPT)
#define FLD_FC8CODEW_DVBSX_DEMOD_DMDATTEMPT_DEMOD_ATTEMPTS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DMDATTEMPT*(1<<16) + FC8CODEW_DVBSX_DEMOD_DMDATTEMPT_DEMOD_ATTEMPTS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLFHEADER1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLFHEADER1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLFHEADER1_PLF_HEADER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLFHEADER1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLFHEADER1_PLF_HEADER__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLFHEADER0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLFHEADER0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLFHEADER0_PLF_HEADER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLFHEADER0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLFHEADER0_PLF_HEADER__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHSFRDIFF1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHSFRDIFF1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHSFRDIFF1_PLFRAME_DIFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHSFRDIFF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHSFRDIFF1_PLFRAME_DIFF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHSFRDIFF0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHSFRDIFF0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHSFRDIFF0_PLFRAME_DIFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHSFRDIFF0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHSFRDIFF0_PLFRAME_DIFF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHRCMP1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHRCMP1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHRCMP1_COMPARE_HEADER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHRCMP1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHRCMP1_COMPARE_HEADER__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHRCMP0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHRCMP0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHRCMP0_COMPARE_HEADER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHRCMP0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHRCMP0_COMPARE_HEADER__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHRECORD1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHRECORD1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHRECORD1_RECORD_HEADER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHRECORD1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHRECORD1_RECORD_HEADER__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHRECORD0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHRECORD0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHRECORD0_RECORD_HEADER(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHRECORD0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHRECORD0_RECORD_HEADER__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHRECNCO1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHRECNCO1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHRECNCO1_RECORD_HEADER_NCO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHRECNCO1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHRECNCO1_RECORD_HEADER_NCO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHRECNCO0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHRECNCO0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHRECNCO0_RECORD_HEADER_NCO(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHRECNCO0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHRECNCO0_RECORD_HEADER_NCO__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHDELTAF1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHDELTAF1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHDELTAF1_PLH_DELTAF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHDELTAF1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHDELTAF1_PLH_DELTAF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHDELTAF0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHDELTAF0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHDELTAF0_PLH_DELTAF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHDELTAF0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHDELTAF0_PLH_DELTAF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PHERRCMP5(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PHERRCMP5)
#define FLD_FC8CODEW_DVBSX_DEMOD_PHERRCMP5_DEMOD_DEBUGVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PHERRCMP5*(1<<16) + FC8CODEW_DVBSX_DEMOD_PHERRCMP5_DEMOD_DEBUGVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PHERRCMP4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PHERRCMP4)
#define FLD_FC8CODEW_DVBSX_DEMOD_PHERRCMP4_DEMOD_DEBUGVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PHERRCMP4*(1<<16) + FC8CODEW_DVBSX_DEMOD_PHERRCMP4_DEMOD_DEBUGVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PHERRCMP3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PHERRCMP3)
#define FLD_FC8CODEW_DVBSX_DEMOD_PHERRCMP3_DEMOD_DEBUGVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PHERRCMP3*(1<<16) + FC8CODEW_DVBSX_DEMOD_PHERRCMP3_DEMOD_DEBUGVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PHERRCMP2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PHERRCMP2)
#define FLD_FC8CODEW_DVBSX_DEMOD_PHERRCMP2_DEMOD_DEBUGVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PHERRCMP2*(1<<16) + FC8CODEW_DVBSX_DEMOD_PHERRCMP2_DEMOD_DEBUGVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PHERRCMP1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PHERRCMP1)
#define FLD_FC8CODEW_DVBSX_DEMOD_PHERRCMP1_DEMOD_DEBUGVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PHERRCMP1*(1<<16) + FC8CODEW_DVBSX_DEMOD_PHERRCMP1_DEMOD_DEBUGVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PHERRCMP0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PHERRCMP0)
#define FLD_FC8CODEW_DVBSX_DEMOD_PHERRCMP0_DEMOD_DEBUGVAL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PHERRCMP0*(1<<16) + FC8CODEW_DVBSX_DEMOD_PHERRCMP0_DEMOD_DEBUGVAL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_PLHDEBUG(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_PLHDEBUG)
#define FLD_FC8CODEW_DVBSX_DEMOD_PLHDEBUG_PLH_DEBUG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_PLHDEBUG*(1<<16) + FC8CODEW_DVBSX_DEMOD_PLHDEBUG_PLH_DEBUG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMCFGM(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMCFGM)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGM_ASYMAGC_COEF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGM_ASYMAGC_COEF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGM_TST_ANTISYMB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGM_TST_ANTISYMB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGM_DIS_ASYMQUAD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGM_DIS_ASYMQUAD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGM_DIS_ASYMAMM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGM_DIS_ASYMAMM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGM_ANTISYMBOLE_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGM_ANTISYMBOLE_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMCFGL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMCFGL)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_IQCONST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_IQCONST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_CORRFAST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_CORRFAST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_RNDMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_RNDMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_ALIASLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFGL_ASYM_ALIASLOCK__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMAGC1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMAGC1)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMAGC1_ASYMAGC2_MANT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMAGC1*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMAGC1_ASYMAGC2_MANT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMAGC0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMAGC0)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMAGC0_ASYMAGC2_EXP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMAGC0*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMAGC0_ASYMAGC2_EXP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMAGC0_ASYMAGC2_MANT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMAGC0*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMAGC0_ASYMAGC2_MANT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMOBSI(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMOBSI)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMOBSI_ASYM_IOBS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMOBSI*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMOBSI_ASYM_IOBS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMOBSQ(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMOBSQ)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMOBSQ_ASYM_QOBS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMOBSQ*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMOBSQ_ASYM_QOBS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMSTATUS(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMSTATUS)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_TGTETA_MULT4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_TGTETA_MULT4__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_AMM_MULT4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_AMM_MULT4__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_ASYMCTRL_ON(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_ASYMCTRL_ON__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_ASYMCTRL_QUAD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_ASYMCTRL_QUAD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_ASYMCTRL_AMM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMSTATUS*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMSTATUS_ASYMCTRL_AMM__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMWSAR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMWSAR)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMWSAR_ASYM_WSAR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMWSAR*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMWSAR_ASYM_WSAR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AFILTCFGM(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AFILTCFGM)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AFILTRE3_MANUEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AFILTRE3_MANUEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AFILTRE2_MANUEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AFILTRE2_MANUEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AFILTRE1_MANUEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AFILTRE1_MANUEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGM_ABYP_HDBFILTRE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGM_ABYP_HDBFILTRE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AFILTRES_BETA(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AFILTRES_BETA__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AHDBFILTRE_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGM*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGM_AHDBFILTRE_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AFILTCFGL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AFILTCFGL)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGL_AFILTRE3_AMPL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGL_AFILTRE3_AMPL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGL_AFILTRE2_AMPL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGL_AFILTRE2_AMPL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGL_AFILTRE1_AMPL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGL_AFILTRE1_AMPL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_AFILTCFGL_AFILTRE_DEBUG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AFILTCFGL*(1<<16) + FC8CODEW_DVBSX_DEMOD_AFILTCFGL_AFILTRE_DEBUG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AIQFILT0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AIQFILT0)
#define FLD_FC8CODEW_DVBSX_DEMOD_AIQFILT0_AIQPOWER_DEROT1G(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AIQFILT0*(1<<16) + FC8CODEW_DVBSX_DEMOD_AIQFILT0_AIQPOWER_DEROT1G__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AIQFILT1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AIQFILT1)
#define FLD_FC8CODEW_DVBSX_DEMOD_AIQFILT1_AIQPOWER_FILTRE1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AIQFILT1*(1<<16) + FC8CODEW_DVBSX_DEMOD_AIQFILT1_AIQPOWER_FILTRE1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AIQFILT2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AIQFILT2)
#define FLD_FC8CODEW_DVBSX_DEMOD_AIQFILT2_AIQPOWER_FILTRE2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AIQFILT2*(1<<16) + FC8CODEW_DVBSX_DEMOD_AIQFILT2_AIQPOWER_FILTRE2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_AIQFILT3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_AIQFILT3)
#define FLD_FC8CODEW_DVBSX_DEMOD_AIQFILT3_AIQPOWER_FILTRE3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_AIQFILT3*(1<<16) + FC8CODEW_DVBSX_DEMOD_AIQFILT3_AIQPOWER_FILTRE3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_ASYMCFG3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_ASYMCFG3)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYM_CORRSGN(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYM_CORRSGN__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYMQUAD_MULT4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYMQUAD_MULT4__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYMAMM_MULT4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYMAMM_MULT4__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYMQUAD_INV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYMQUAD_INV__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYMAMM_INV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYMAMM_INV__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFG3_DIS_ASYMWSAR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFG3_DIS_ASYMWSAR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYM_CPTMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYM_CPTMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYM_EGALINV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_ASYMCFG3*(1<<16) + FC8CODEW_DVBSX_DEMOD_ASYMCFG3_ASYM_EGALINV__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_GCTRL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_GCTRL)
#define FLD_FC8CODEW_DVBSX_DEMOD_GCTRL_UFBS_ENABLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GCTRL*(1<<16) + FC8CODEW_DVBSX_DEMOD_GCTRL_UFBS_ENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GCTRL_UFBS_RESTART(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GCTRL*(1<<16) + FC8CODEW_DVBSX_DEMOD_GCTRL_UFBS_RESTART__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GCTRL_INPUT_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GCTRL*(1<<16) + FC8CODEW_DVBSX_DEMOD_GCTRL_INPUT_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GCTRL_LOW_RATE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GCTRL*(1<<16) + FC8CODEW_DVBSX_DEMOD_GCTRL_LOW_RATE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFTCTRL(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFTCTRL)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFTCTRL_FFT_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFTCTRL*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFTCTRL_FFT_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFTCTRL_FFT_SHIFT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFTCTRL*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFTCTRL_FFT_SHIFT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFTCTRL_CTE_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFTCTRL*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFTCTRL_CTE_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFTCTRL_MODE_INTERSYMBOL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFTCTRL*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFTCTRL_MODE_INTERSYMBOL__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_FFTACC(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_FFTACC)
#define FLD_FC8CODEW_DVBSX_DEMOD_FFTACC_NB_ACC_FFT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_FFTACC*(1<<16) + FC8CODEW_DVBSX_DEMOD_FFTACC_NB_ACC_FFT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_THRESHOLD(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_THRESHOLD)
#define FLD_FC8CODEW_DVBSX_DEMOD_THRESHOLD_MAX_THRESHOLD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_THRESHOLD*(1<<16) + FC8CODEW_DVBSX_DEMOD_THRESHOLD_MAX_THRESHOLD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_THRESHOLD_NO_STOP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_THRESHOLD*(1<<16) + FC8CODEW_DVBSX_DEMOD_THRESHOLD_NO_STOP__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_GAINCONT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_GAINCONT)
#define FLD_FC8CODEW_DVBSX_DEMOD_GAINCONT_GAIN_CONTINUOUS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GAINCONT*(1<<16) + FC8CODEW_DVBSX_DEMOD_GAINCONT_GAIN_CONTINUOUS__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GAINCONT_MODE_CONTINUOUS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GAINCONT*(1<<16) + FC8CODEW_DVBSX_DEMOD_GAINCONT_MODE_CONTINUOUS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_UPDCONT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_UPDCONT)
#define FLD_FC8CODEW_DVBSX_DEMOD_UPDCONT_UPD_CONTINUOUS(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_UPDCONT*(1<<16) + FC8CODEW_DVBSX_DEMOD_UPDCONT_UPD_CONTINUOUS__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_GSTAT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_GSTAT)
#define FLD_FC8CODEW_DVBSX_DEMOD_GSTAT_PSD_DONE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GSTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_GSTAT_PSD_DONE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GSTAT_PEAK_FOUND(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GSTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_GSTAT_PEAK_FOUND__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GSTAT_STATUS_MAX3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GSTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_GSTAT_STATUS_MAX3__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GSTAT_STATUS_INPUT_SAT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GSTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_GSTAT_STATUS_INPUT_SAT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_GSTAT_CTE_FREQ_OK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_GSTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_GSTAT_CTE_FREQ_OK__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_EXPMAX(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_EXPMAX)
#define FLD_FC8CODEW_DVBSX_DEMOD_EXPMAX_EXP_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_EXPMAX*(1<<16) + FC8CODEW_DVBSX_DEMOD_EXPMAX_EXP_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BINMAX1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BINMAX1)
#define FLD_FC8CODEW_DVBSX_DEMOD_BINMAX1_BIN_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BINMAX1*(1<<16) + FC8CODEW_DVBSX_DEMOD_BINMAX1_BIN_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BINMAX0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BINMAX0)
#define FLD_FC8CODEW_DVBSX_DEMOD_BINMAX0_BIN_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BINMAX0*(1<<16) + FC8CODEW_DVBSX_DEMOD_BINMAX0_BIN_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX2)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX2_VAL_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX2*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX2_VAL_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX1)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX1_VAL_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX1*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX1_VAL_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX0)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX0_VAL_MAX(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX0*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX0_VAL_MAX__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BINMAX21(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BINMAX21)
#define FLD_FC8CODEW_DVBSX_DEMOD_BINMAX21_BIN_MAX2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BINMAX21*(1<<16) + FC8CODEW_DVBSX_DEMOD_BINMAX21_BIN_MAX2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BINMAX20(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BINMAX20)
#define FLD_FC8CODEW_DVBSX_DEMOD_BINMAX20_BIN_MAX2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BINMAX20*(1<<16) + FC8CODEW_DVBSX_DEMOD_BINMAX20_BIN_MAX2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX22(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX22)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX22_VAL_MAX2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX22*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX22_VAL_MAX2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX21(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX21)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX21_VAL_MAX2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX21*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX21_VAL_MAX2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX20(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX20)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX20_VAL_MAX2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX20*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX20_VAL_MAX2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BINMAX31(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BINMAX31)
#define FLD_FC8CODEW_DVBSX_DEMOD_BINMAX31_BIN_MAX3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BINMAX31*(1<<16) + FC8CODEW_DVBSX_DEMOD_BINMAX31_BIN_MAX3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_BINMAX30(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_BINMAX30)
#define FLD_FC8CODEW_DVBSX_DEMOD_BINMAX30_BIN_MAX3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_BINMAX30*(1<<16) + FC8CODEW_DVBSX_DEMOD_BINMAX30_BIN_MAX3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX32(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX32)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX32_VAL_MAX3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX32*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX32_VAL_MAX3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX31(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX31)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX31_VAL_MAX3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX31*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX31_VAL_MAX3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_VALMAX30(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_VALMAX30)
#define FLD_FC8CODEW_DVBSX_DEMOD_VALMAX30_VAL_MAX3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_VALMAX30*(1<<16) + FC8CODEW_DVBSX_DEMOD_VALMAX30_VAL_MAX3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CPTACC(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CPTACC)
#define FLD_FC8CODEW_DVBSX_DEMOD_CPTACC_CPT_ACC_FFT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CPTACC*(1<<16) + FC8CODEW_DVBSX_DEMOD_CPTACC_CPT_ACC_FFT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CTESTAT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CTESTAT)
#define FLD_FC8CODEW_DVBSX_DEMOD_CTESTAT_MODE_CTE_EFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CTESTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_CTESTAT_MODE_CTE_EFF__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFOEST1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFOEST1)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFOEST1_CFO_EST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFOEST1*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFOEST1_CFO_EST__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_CFOEST0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_CFOEST0)
#define FLD_FC8CODEW_DVBSX_DEMOD_CFOEST0_CFO_EST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_CFOEST0*(1<<16) + FC8CODEW_DVBSX_DEMOD_CFOEST0_CFO_EST__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DEBUG1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DEBUG1)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEBUG1_DISABLE_RESCALE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEBUG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEBUG1_DISABLE_RESCALE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEBUG1_DISABLE_AVERAGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEBUG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEBUG1_DISABLE_AVERAGE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEBUG1_DEBUG_INTERSYMBOL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEBUG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEBUG1_DEBUG_INTERSYMBOL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEBUG1_MODE_DB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEBUG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEBUG1_MODE_DB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEBUG1_SEL_MEM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEBUG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEBUG1_SEL_MEM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEBUG1_MODE_FULL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEBUG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEBUG1_MODE_FULL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEBUG1_CFO_FILT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEBUG1*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEBUG1_CFO_FILT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMADDR1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMADDR1)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMADDR1_MEM_ADDR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMADDR1*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMADDR1_MEM_ADDR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMADDR0(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMADDR0)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMADDR0_MEM_ADDR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMADDR0*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMADDR0_MEM_ADDR__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMSTAT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMSTAT)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMSTAT_MEM_STAT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMSTAT*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMSTAT_MEM_STAT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA01(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA01)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA01_MEM_VAL0(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA01*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA01_MEM_VAL0__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA00(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA00)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA00_MEM_VAL0(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA00*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA00_MEM_VAL0__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA11(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA11)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA11_MEM_VAL1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA11*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA11_MEM_VAL1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA10(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA10)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA10_MEM_VAL1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA10*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA10_MEM_VAL1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA21(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA21)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA21_MEM_VAL2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA21*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA21_MEM_VAL2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA20(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA20)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA20_MEM_VAL2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA20*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA20_MEM_VAL2__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA31(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA31)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA31_MEM_VAL3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA31*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA31_MEM_VAL3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA30(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA30)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA30_MEM_VAL3(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA30*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA30_MEM_VAL3__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA41(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA41)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA41_MEM_VAL4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA41*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA41_MEM_VAL4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA40(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA40)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA40_MEM_VAL4(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA40*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA40_MEM_VAL4__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA51(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA51)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA51_MEM_VAL5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA51*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA51_MEM_VAL5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA50(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA50)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA50_MEM_VAL5(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA50*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA50_MEM_VAL5__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA61(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA61)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA61_MEM_VAL6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA61*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA61_MEM_VAL6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA60(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA60)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA60_MEM_VAL6(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA60*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA60_MEM_VAL6__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA71(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA71)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA71_MEM_VAL7(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA71*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA71_MEM_VAL7__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_MEMVA70(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_MEMVA70)
#define FLD_FC8CODEW_DVBSX_DEMOD_MEMVA70_MEM_VAL7(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_MEMVA70*(1<<16) + FC8CODEW_DVBSX_DEMOD_MEMVA70_MEM_VAL7__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TSTDMD(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TSTDMD)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTDMD_TNRRESTART_OFF(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTDMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTDMD_TNRRESTART_OFF__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTDMD_STEP3_NOTMG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTDMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTDMD_STEP3_NOTMG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTDMD_STEP3_NOTCAR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTDMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTDMD_STEP3_NOTCAR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTDMD_OLDPEA0_LOOP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTDMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTDMD_OLDPEA0_LOOP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTDMD_DIS_RANDOMCFRI(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTDMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTDMD_DIS_RANDOMCFRI__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTDMD_DIS_CFRINCLARGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTDMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTDMD_DIS_CFRINCLARGE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTDMD_TSTDMD_NORELCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTDMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTDMD_TSTDMD_NORELCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTDMD_TSTDMD_RESET(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTDMD*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTDMD_TSTDMD_RESET__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TPOLY(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TPOLY)
#define FLD_FC8CODEW_DVBSX_DEMOD_TPOLY_SEL_IQTHEORI(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TPOLY*(1<<16) + FC8CODEW_DVBSX_DEMOD_TPOLY_SEL_IQTHEORI__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TPOLY_MSURLIGNED_PIBPSK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TPOLY*(1<<16) + FC8CODEW_DVBSX_DEMOD_TPOLY_MSURLIGNED_PIBPSK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TPOLY_TSTDMD_ISOLATION(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TPOLY*(1<<16) + FC8CODEW_DVBSX_DEMOD_TPOLY_TSTDMD_ISOLATION__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TPOLY_OBSFIELD_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TPOLY*(1<<16) + FC8CODEW_DVBSX_DEMOD_TPOLY_OBSFIELD_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TPOLY_DIS_STCNLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TPOLY*(1<<16) + FC8CODEW_DVBSX_DEMOD_TPOLY_DIS_STCNLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TPOLY_IQFORCE_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TPOLY*(1<<16) + FC8CODEW_DVBSX_DEMOD_TPOLY_IQFORCE_MODE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TSTR(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TSTR)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTR_STOPTMG_CRS_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTR*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTR_STOPTMG_CRS_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTR_DIS_TLOCKRST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTR*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTR_DIS_TLOCKRST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTR_EN_S1VERYLOW(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTR*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTR_EN_S1VERYLOW__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTR_DIS_TMGLOWRTSUB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTR*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTR_DIS_TMGLOWRTSUB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTR_DIS_TMGRSTSAT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTR*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTR_DIS_TMGRSTSAT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTR_TMGERR_INV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTR*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTR_TMGERR_INV__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTR_TMGRST_ETAPE9(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTR*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTR_TMGRST_ETAPE9__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TAGC2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TAGC2)
#define FLD_FC8CODEW_DVBSX_DEMOD_TAGC2_AGC2EXP_NOSFR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TAGC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TAGC2_AGC2EXP_NOSFR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TAGC2_SOFAGC1_TEST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TAGC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TAGC2_SOFAGC1_TEST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TAGC2_AGC2_NFASTOV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TAGC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TAGC2_AGC2_NFASTOV__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TAGC2_AGC2_NLKMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TAGC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TAGC2_AGC2_NLKMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TAGC2_NOCALC_KREFTMG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TAGC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TAGC2_NOCALC_KREFTMG__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TAGC2_DCADJ_TSTFAST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TAGC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TAGC2_DCADJ_TSTFAST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TAGC2_EN_SR1AGC2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TAGC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TAGC2_EN_SR1AGC2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TAGC2_AGC2_PLHONLY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TAGC2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TAGC2_AGC2_PLHONLY__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TCTL1(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TCTL1)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL1_TST_IQSYMBSEL(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL1*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL1_TST_IQSYMBSEL__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL1_TSTDMD_IQECH(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL1*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL1_TSTDMD_IQECH__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL1_TSTJETON_SELECT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL1*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL1_TSTJETON_SELECT__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TCTL2(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TCTL2)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL2_PLF1MEM_READ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL2_PLF1MEM_READ__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL2_USE_CFR2PLH(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL2_USE_CFR2PLH__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL2_DIS_DFFAIBLE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL2_DIS_DFFAIBLE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL2_CORDIC_OLDLOAD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL2_CORDIC_OLDLOAD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL2_DIS_DUMMYPLCFR2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL2_DIS_DUMMYPLCFR2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL2_DIS_KCCARSTEP36(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL2_DIS_KCCARSTEP36__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL2_EN_CCARADJ(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL2_EN_CCARADJ__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL2_DEMBYP_270MD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL2*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL2_DEMBYP_270MD__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TCTL3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TCTL3)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL3_DIS_COARSELOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL3_DIS_COARSELOCK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL3_CFRUPLOW_NRSTMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL3_CFRUPLOW_NRSTMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL3_DIS_CFR2SMOOTH(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL3_DIS_CFR2SMOOTH__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL3_DIS_SDFIFOOV(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL3_DIS_SDFIFOOV__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL3_LDPC_LLR_DLY(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL3_LDPC_LLR_DLY__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL3_ENDIS_INITFRAME(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL3_ENDIS_INITFRAME__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL3_SDEMAP_TSTBIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL3_SDEMAP_TSTBIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL3_SDEMAP_DEBUG(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL3_SDEMAP_DEBUG__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TCTL4(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TCTL4)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL4_CAR3_NOFORWARD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL4*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL4_CAR3_NOFORWARD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL4_CAR3_NOTRACEBACK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL4*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL4_CAR3_NOTRACEBACK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL4_DIS_FORCEBETA2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL4*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL4_DIS_FORCEBETA2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL4_TETA3L_RSTTETA3D(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL4*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL4_TETA3L_RSTTETA3D__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL4_EN_PLHCALC(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL4*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL4_EN_PLHCALC__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL4_TSTINV_PHERR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL4*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL4_TSTINV_PHERR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TCTL4_CFR2TOCFR1_DVBS1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TCTL4*(1<<16) + FC8CODEW_DVBSX_DEMOD_TCTL4_CFR2TOCFR1_DVBS1__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TSTCAR3(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TSTCAR3)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTCAR3_DIS_TRIPLECAR(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTCAR3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTCAR3_DIS_TRIPLECAR__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTCAR3_TETA3_OBSMODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTCAR3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTCAR3_TETA3_OBSMODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTCAR3_EN_OCTANTRST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTCAR3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTCAR3_EN_OCTANTRST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTCAR3_OLD_NCO2RST(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTCAR3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTCAR3_OLD_NCO2RST__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTCAR3_DFACT23DL_CSTE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTCAR3*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTCAR3_DFACT23DL_CSTE__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_TSTHDEBIT(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_EGAL_TSTBIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_EGAL_TSTBIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_FIFO2_ENWAIT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_FIFO2_ENWAIT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_DVBS1_NOJUMP(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_DVBS1_NOJUMP__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_NO_SDEMODBD(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_NO_SDEMODBD__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_FIFO2_ENDELSYMB(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_FIFO2_ENDELSYMB__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_EGALDFE0_MODE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_EGALDFE0_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_POLYPH_S1ASYM(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_POLYPH_S1ASYM__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_EN_AGC2AMPL1B(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_TSTHDEBIT*(1<<16) + FC8CODEW_DVBSX_DEMOD_TSTHDEBIT_EN_AGC2AMPL1B__MASK)

#define REG_RC8CODEW_DVBSX_DEMOD_DEMODEND(PATH) (DVBSX_DEMOD[PATH-1] + RC8CODEW_DVBSX_DEMOD_DEMODEND)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_CFRRANGE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMODEND*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_CFRRANGE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_NTHRES1(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMODEND*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_NTHRES1__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_NTHRES2(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMODEND*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_NTHRES2__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_RAINFADE(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMODEND*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_RAINFADE__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_DISLK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMODEND*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMODEND_DMDIRQ_DISLK__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMODEND_DMD_SGNLCUT(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMODEND*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMODEND_DMD_SGNLCUT__MASK)
#define FLD_FC8CODEW_DVBSX_DEMOD_DEMODEND_DEMOD_I2CLOCK(PATH) (DVBSX_DEMOD[PATH-1]*(1<<16) + RC8CODEW_DVBSX_DEMOD_DEMODEND*(1<<16) + FC8CODEW_DVBSX_DEMOD_DEMODEND_DEMOD_I2CLOCK__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_SIGPOWER(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_SIGPOWER)
#define FLD_FC8CODEW_DVBSX_VITERBI_SIGPOWER_SIG_POWER(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_SIGPOWER*(1<<16) + FC8CODEW_DVBSX_VITERBI_SIGPOWER_SIG_POWER__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_SIGPOWER_SIGPOWER_MANUAL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_SIGPOWER*(1<<16) + FC8CODEW_DVBSX_VITERBI_SIGPOWER_SIGPOWER_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_DEMAPVIT(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_DEMAPVIT)
#define FLD_FC8CODEW_DVBSX_VITERBI_DEMAPVIT_K_DIVIDER_VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_DEMAPVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_DEMAPVIT_K_DIVIDER_VIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_DEMAPVIT_VIT_VXINOBS(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_DEMAPVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_DEMAPVIT_VIT_VXINOBS__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VITSCALE(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VITSCALE)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITSCALE_VERROR_DBMODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITSCALE*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITSCALE_VERROR_DBMODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITSCALE_DIS_RSFLOCK(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITSCALE*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITSCALE_DIS_RSFLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITSCALE_DELOCK_PRFLOSS(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITSCALE*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITSCALE_DELOCK_PRFLOSS__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITSCALE_NSLOWSN_LOCKED(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITSCALE*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITSCALE_NSLOWSN_LOCKED__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITSCALE_NOSTBL_SELECT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITSCALE*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITSCALE_NOSTBL_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITSCALE_VERROR_MAXMODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITSCALE*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITSCALE_VERROR_MAXMODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITSCALE_NVTH_NOSRANGE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITSCALE*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITSCALE_NVTH_NOSRANGE__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_FECM(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_FECM)
#define FLD_FC8CODEW_DVBSX_VITERBI_FECM_IQINV(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_FECM*(1<<16) + FC8CODEW_DVBSX_VITERBI_FECM_IQINV__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_FECM_SYNCVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_FECM*(1<<16) + FC8CODEW_DVBSX_VITERBI_FECM_SYNCVIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_FECM_DIFF_MODEVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_FECM*(1<<16) + FC8CODEW_DVBSX_VITERBI_FECM_DIFF_MODEVIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_FECM_DSS_SRCH(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_FECM*(1<<16) + FC8CODEW_DVBSX_VITERBI_FECM_DSS_SRCH__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_FECM_CMP_SLOWMODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_FECM*(1<<16) + FC8CODEW_DVBSX_VITERBI_FECM_CMP_SLOWMODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_FECM_DEMOD_BYPASS(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_FECM*(1<<16) + FC8CODEW_DVBSX_VITERBI_FECM_DEMOD_BYPASS__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_FECM_DSS_DVB(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_FECM*(1<<16) + FC8CODEW_DVBSX_VITERBI_FECM_DSS_DVB__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VTH12(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VTH12)
#define FLD_FC8CODEW_DVBSX_VITERBI_VTH12_VTH12(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VTH12*(1<<16) + FC8CODEW_DVBSX_VITERBI_VTH12_VTH12__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VTH23(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VTH23)
#define FLD_FC8CODEW_DVBSX_VITERBI_VTH23_VTH23(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VTH23*(1<<16) + FC8CODEW_DVBSX_VITERBI_VTH23_VTH23__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VTH34(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VTH34)
#define FLD_FC8CODEW_DVBSX_VITERBI_VTH34_VTH34(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VTH34*(1<<16) + FC8CODEW_DVBSX_VITERBI_VTH34_VTH34__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VTH56(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VTH56)
#define FLD_FC8CODEW_DVBSX_VITERBI_VTH56_VTH56(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VTH56*(1<<16) + FC8CODEW_DVBSX_VITERBI_VTH56_VTH56__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VTH67(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VTH67)
#define FLD_FC8CODEW_DVBSX_VITERBI_VTH67_VTH67(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VTH67*(1<<16) + FC8CODEW_DVBSX_VITERBI_VTH67_VTH67__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VTH78(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VTH78)
#define FLD_FC8CODEW_DVBSX_VITERBI_VTH78_VTH78(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VTH78*(1<<16) + FC8CODEW_DVBSX_VITERBI_VTH78_VTH78__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_PRVIT(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_PRVIT)
#define FLD_FC8CODEW_DVBSX_VITERBI_PRVIT_E1_2VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_PRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_PRVIT_E1_2VIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_PRVIT_E2_3VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_PRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_PRVIT_E2_3VIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_PRVIT_E3_4VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_PRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_PRVIT_E3_4VIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_PRVIT_E5_6VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_PRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_PRVIT_E5_6VIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_PRVIT_E6_7VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_PRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_PRVIT_E6_7VIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_PRVIT_E7_8VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_PRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_PRVIT_E7_8VIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_PRVIT_DIS_VTHLOCK(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_PRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_PRVIT_DIS_VTHLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_PRVIT_VTHNOS_PLUS16(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_PRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_PRVIT_VTHNOS_PLUS16__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VAVSRVIT(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VAVSRVIT)
#define FLD_FC8CODEW_DVBSX_VITERBI_VAVSRVIT_HYPVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VAVSRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VAVSRVIT_HYPVIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VAVSRVIT_TOVVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VAVSRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VAVSRVIT_TOVVIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VAVSRVIT_SNVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VAVSRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VAVSRVIT_SNVIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VAVSRVIT_FROZENVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VAVSRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VAVSRVIT_FROZENVIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VAVSRVIT_AMVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VAVSRVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VAVSRVIT_AMVIT__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VITCURPUN(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VITCURPUN)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITCURPUN_VIT_CURPUN(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITCURPUN*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITCURPUN_VIT_CURPUN__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITCURPUN_VIT_ROTA90(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITCURPUN*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITCURPUN_VIT_ROTA90__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITCURPUN_VIT_ROTA180(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITCURPUN*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITCURPUN_VIT_ROTA180__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITCURPUN_CYCLESLIP_VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITCURPUN*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITCURPUN_CYCLESLIP_VIT__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VERROR(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VERROR)
#define FLD_FC8CODEW_DVBSX_VITERBI_VERROR_REGERR_VIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VERROR*(1<<16) + FC8CODEW_DVBSX_VITERBI_VERROR_REGERR_VIT__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VITCNR(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VITCNR)
#define FLD_FC8CODEW_DVBSX_VITERBI_VITCNR_REGERR_CNR(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VITCNR*(1<<16) + FC8CODEW_DVBSX_VITERBI_VITCNR_REGERR_CNR__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VTHINUSE(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VTHINUSE)
#define FLD_FC8CODEW_DVBSX_VITERBI_VTHINUSE_VIT_INUSE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VTHINUSE*(1<<16) + FC8CODEW_DVBSX_VITERBI_VTHINUSE_VIT_INUSE__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_VSTATUSVIT(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT)
#define FLD_FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VITERBI_COMPOUT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VITERBI_COMPOUT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VIT_DEMODSEL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VIT_DEMODSEL__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VITERBI_DELOCK(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VITERBI_DELOCK__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_LOCKEDVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_LOCKEDVIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_PRFVIT(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_PRFVIT__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VITERBI_DEPRF(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VITERBI_DEPRF__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VIT_OVFIFO(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VIT_OVFIFO__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VITERBI_ON(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_VSTATUSVIT*(1<<16) + FC8CODEW_DVBSX_VITERBI_VSTATUSVIT_VITERBI_ON__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_KDIV12(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_KDIV12)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV12_K_DIVIDER_12(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV12*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV12_K_DIVIDER_12__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV12_KDIV12_MANUAL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV12*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV12_KDIV12_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_KDIV23(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_KDIV23)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV23_K_DIVIDER_23(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV23*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV23_K_DIVIDER_23__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV23_KDIV23_MANUAL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV23*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV23_KDIV23_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_KDIV34(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_KDIV34)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV34_K_DIVIDER_34(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV34*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV34_K_DIVIDER_34__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV34_KDIV34_MANUAL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV34*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV34_KDIV34_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_KDIV56(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_KDIV56)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV56_K_DIVIDER_56(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV56*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV56_K_DIVIDER_56__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV56_KDIV56_MANUAL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV56*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV56_KDIV56_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_KDIV67(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_KDIV67)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV67_K_DIVIDER_67(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV67*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV67_K_DIVIDER_67__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV67_KDIV67_MANUAL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV67*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV67_KDIV67_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_KDIV78(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_KDIV78)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV78_K_DIVIDER_78(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV78*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV78_K_DIVIDER_78__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_KDIV78_KDIV78_MANUAL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_KDIV78*(1<<16) + FC8CODEW_DVBSX_VITERBI_KDIV78_KDIV78_MANUAL__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_SELOUT(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_SELOUT)
#define FLD_FC8CODEW_DVBSX_VITERBI_SELOUT_TSTSYNCHRO_MODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_SELOUT*(1<<16) + FC8CODEW_DVBSX_VITERBI_SELOUT_TSTSYNCHRO_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_SELOUT_CCPTDLY_MODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_SELOUT*(1<<16) + FC8CODEW_DVBSX_VITERBI_SELOUT_CCPTDLY_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_SELOUT_EN_TBUSDEMAP(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_SELOUT*(1<<16) + FC8CODEW_DVBSX_VITERBI_SELOUT_EN_TBUSDEMAP__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_SELOUT_EN_SYNC(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_SELOUT*(1<<16) + FC8CODEW_DVBSX_VITERBI_SELOUT_EN_SYNC__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_TSYNC(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_TSYNC)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSYNC_TST_BCHERROR(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSYNC*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSYNC_TST_BCHERROR__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSYNC_FROTA45_FIRST(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSYNC*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSYNC_FROTA45_FIRST__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSYNC_PXX_BYPALL(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSYNC*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSYNC_PXX_BYPALL__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSYNC_SLOWPHA_MODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSYNC*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSYNC_SLOWPHA_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSYNC_SHIFTSOF_MODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSYNC*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSYNC_SHIFTSOF_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSYNC_CERR_TSTMODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSYNC*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSYNC_CERR_TSTMODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSYNC_CURPUN_DECMODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSYNC*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSYNC_CURPUN_DECMODE__MASK)

#define REG_RC8CODEW_DVBSX_VITERBI_TSTERR(PATH) (DVBSX_VITERBI[PATH-1] + RC8CODEW_DVBSX_VITERBI_TSTERR)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSTERR_METRIQUE_MODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSTERR*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSTERR_METRIQUE_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSTERR_TRACEBACK_MODE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSTERR*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSTERR_TRACEBACK_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSTERR_TST_ERRGEN(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSTERR*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSTERR_TST_ERRGEN__MASK)
#define FLD_FC8CODEW_DVBSX_VITERBI_TSTERR_TST_ERASURE(PATH) (DVBSX_VITERBI[PATH-1]*(1<<16) + RC8CODEW_DVBSX_VITERBI_TSTERR*(1<<16) + FC8CODEW_DVBSX_VITERBI_TSTERR_TST_ERASURE__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFAVSR(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFAVSR)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFAVSR_SFERROR_DBMODE(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFAVSR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFAVSR_SFERROR_DBMODE__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFAVSR_NOSTBL_SELECT_SFEC(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFAVSR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFAVSR_NOSTBL_SELECT_SFEC__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFAVSR_SN_SFEC(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFAVSR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFAVSR_SN_SFEC__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFAVSR_SERROR_MAXMODE(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFAVSR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFAVSR_SERROR_MAXMODE__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFAVSR_SFEC_SUMERRORS(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFAVSR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFAVSR_SFEC_SUMERRORS__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFDEMAP(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFDEMAP)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFDEMAP_SFEC_K_DIVIDER_VIT(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFDEMAP*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFDEMAP_SFEC_K_DIVIDER_VIT__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFDEMAP_SFEC_VXINOBS(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFDEMAP*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFDEMAP_SFEC_VXINOBS__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFERROR(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFERROR)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFERROR_SFEC_REGERR_VIT(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFERROR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFERROR_SFEC_REGERR_VIT__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFECCNR(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFECCNR)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFECCNR_SFEC_REGERR_CNR(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFECCNR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFECCNR_SFEC_REGERR_CNR__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFKDIV12(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFKDIV12)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV12_SFEC_K_DIVIDER_12(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV12*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV12_SFEC_K_DIVIDER_12__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV12_SFECKDIV12_MAN(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV12*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV12_SFECKDIV12_MAN__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFKDIV23(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFKDIV23)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV23_SFEC_K_DIVIDER_23(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV23*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV23_SFEC_K_DIVIDER_23__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV23_SFECKDIV23_MAN(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV23*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV23_SFECKDIV23_MAN__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFKDIV34(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFKDIV34)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV34_SFEC_K_DIVIDER_34(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV34*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV34_SFEC_K_DIVIDER_34__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV34_SFECKDIV34_MAN(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV34*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV34_SFECKDIV34_MAN__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFKDIV56(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFKDIV56)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV56_SFEC_K_DIVIDER_56(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV56*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV56_SFEC_K_DIVIDER_56__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV56_SFECKDIV56_MAN(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV56*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV56_SFECKDIV56_MAN__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFKDIV67(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFKDIV67)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV67_SFEC_K_DIVIDER_67(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV67*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV67_SFEC_K_DIVIDER_67__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV67_SFECKDIV67_MAN(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV67*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV67_SFECKDIV67_MAN__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFKDIV78(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFKDIV78)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV78_SFEC_K_DIVIDER_78(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV78*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV78_SFEC_K_DIVIDER_78__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFKDIV78_SFECKDIV78_MAN(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFKDIV78*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFKDIV78_SFECKDIV78_MAN__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_SFECSTATUS(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_SFECSTATUS)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_OVFON(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFECSTATUS*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_OVFON__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_DEMODSEL(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFECSTATUS*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_DEMODSEL__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_DELOCK(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFECSTATUS*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_DELOCK__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_LOCKEDSFEC(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFECSTATUS*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_LOCKEDSFEC__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_OFF(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFECSTATUS*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_OFF__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_ON(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_SFECSTATUS*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_SFECSTATUS_SFEC_ON__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_TSTSFMET(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_TSTSFMET)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSTSFMET_TSTSFEC_METRIQUES(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSTSFMET*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSTSFMET_TSTSFEC_METRIQUES__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_TSFSYNC(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_TSFSYNC)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_SFECTSTSYNCHRO_MODE(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSFSYNC*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_SFECTSTSYNCHRO_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_SFECPXX_BYPALL(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSFSYNC*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_SFECPXX_BYPALL__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_SFCERR_TSTMODE(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSFSYNC*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_SFCERR_TSTMODE__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_EN_SFECDEMAP(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSFSYNC*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_EN_SFECDEMAP__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_EN_SFECSYNC(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSFSYNC*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSFSYNC_EN_SFECSYNC__MASK)

#define REG_RC8CODEW_DVBSX_SUPERFEC_TSTSFERR(PATH) (DVBSX_SUPERFEC[PATH-1] + RC8CODEW_DVBSX_SUPERFEC_TSTSFERR)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSTSFERR_SFECMETRIQUE_MODE(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSTSFERR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSTSFERR_SFECMETRIQUE_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSTSFERR_SFEC_NCONVPROG(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSTSFERR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSTSFERR_SFEC_NCONVPROG__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSTSFERR_SFECTRACEBACK_MODE(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSTSFERR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSTSFERR_SFECTRACEBACK_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_SUPERFEC_TSTSFERR_SFECTST_ERASURE(PATH) (DVBSX_SUPERFEC[PATH-1]*(1<<16) + RC8CODEW_DVBSX_SUPERFEC_TSTSFERR*(1<<16) + FC8CODEW_DVBSX_SUPERFEC_TSTSFERR_SFECTST_ERASURE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSSTATE1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSSTATE1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE1_TSOUT_NOSYNC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE1_TSOUT_NOSYNC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE1_TSACM_MODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE1_TSACM_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE1_TS_DISABLE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE1_TS_DISABLE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE1_TSFRAME_MODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE1_TSFRAME_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE1_TSDESCRAMB_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE1_TSDESCRAMB_ON__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE1_TSRS_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE1_TSRS_ON__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE1_TSSKIPRS_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE1_TSSKIPRS_ON__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE1_TSDIL_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE1_TSDIL_ON__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSSTATE0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSSTATE0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE0_TSDSS_PACKET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE0_TSDSS_PACKET__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE0_TSCRC8_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE0_TSCRC8_ON__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE0_TSNPD_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE0_TSNPD_ON__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE0_TSISSYI_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE0_TSISSYI_ON__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE0_TSDVBX2_MODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE0_TSDVBX2_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE0_TSSYNCOUTRS_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE0_TSSYNCOUTRS_ON__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE0_TSPARITY_ON(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE0_TSPARITY_ON__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATE0_TSNOSYNCBYTE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATE0_TSNOSYNCBYTE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSCFG2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSCFG2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG2_RST_HWARE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG2_RST_HWARE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_ERRMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_ERRMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_HSGNLOUT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_HSGNLOUT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_DUTY50(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_DUTY50__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_TEIUPDATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_TEIUPDATE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_SERIAL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_SERIAL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_DVBCI(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG2_TSFIFO_DVBCI__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSCFG1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSCFG1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_INVDATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_INVDATA__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_DPUNACTIVE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_DPUNACTIVE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_NONEWSGNL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_NONEWSGNL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_PERMDATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_PERMDATA__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_MANSPEED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG1_TSFIFO_MANSPEED__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSCFG0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSCFG0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG0_TSFIFO_BITSPEED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG0_TSFIFO_BITSPEED__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG0_TSFIFO_EMBINDVB(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG0_TSFIFO_EMBINDVB__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG0_TSFIFO_NSGNL2DATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG0_TSFIFO_NSGNL2DATA__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG0_BCHERROR_MODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG0_BCHERROR_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG0_TSFIFO_BCLKDEL1CK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG0_TSFIFO_BCLKDEL1CK__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSSYNC(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSSYNC)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSYNC_TSFIFO_2BITMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSYNC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSYNC_TSFIFO_2BITMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSYNC_TSFIFO_SYNCMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSYNC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSYNC_TSFIFO_SYNCMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSYNC_TSFIFO_FISCR3B(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSYNC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSYNC_TSFIFO_FISCR3B__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSYNC_TSFIFO_PERMUTE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSYNC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSYNC_TSFIFO_PERMUTE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDIVN(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDIVN)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDIVN_TSFIFO_RISEOK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDIVN*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDIVN_TSFIFO_RISEOK__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDIVN_BYTE_OVERSAMPLING(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDIVN*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDIVN_BYTE_OVERSAMPLING__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDIVN_TSFIFO_SPEEDMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDIVN*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDIVN_TSFIFO_SPEEDMODE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSCFG4(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSCFG4)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_DELSPEEDUP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_DELSPEEDUP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG4_EXT_FECSPYIN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG4_EXT_FECSPYIN__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_FRFORCEPKT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_FRFORCEPKT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_NWATCHDOG(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_NWATCHDOG__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_SPECTOKEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_SPECTOKEN__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_HIERSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_HIERSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_TSSPEEDMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG4_TSFIFO_TSSPEEDMODE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSHEMCFG(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSHEMCFG)
#define FLD_FC8CODEW_DVBSX_HWARE_TSHEMCFG_TSFIFO_GSEDECAP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSHEMCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSHEMCFG_TSFIFO_GSEDECAP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSHEMCFG_TSBITRATE_SLOW(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSHEMCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSHEMCFG_TSBITRATE_SLOW__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSHEMCFG_TSBITRATE_LSBSELECT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSHEMCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSHEMCFG_TSBITRATE_LSBSELECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSHEMCFG_DIS_ISCRRETARD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSHEMCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSHEMCFG_DIS_ISCRRETARD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSHEMCFG_ISCR_SURESTIMATION(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSHEMCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSHEMCFG_ISCR_SURESTIMATION__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSHEMCFG_EN_TTODELETE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSHEMCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSHEMCFG_EN_TTODELETE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSHEMCFG_ENDIS_TTOISCR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSHEMCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSHEMCFG_ENDIS_TTOISCR__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSCPLPCFG(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSCPLPCFG)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCPLPCFG_SEL_TTOLATENCE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCPLPCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCPLPCFG_SEL_TTOLATENCE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCPLPCFG_DIS_CPLPERASE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCPLPCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCPLPCFG_DIS_CPLPERASE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCPLPCFG_NSTOPCOMMON_TTOA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCPLPCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCPLPCFG_NSTOPCOMMON_TTOA__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCPLPCFG_PKTFRAME_BUGSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCPLPCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCPLPCFG_PKTFRAME_BUGSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCPLPCFG_TSFIFO_NPDSGNL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCPLPCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCPLPCFG_TSFIFO_NPDSGNL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCPLPCFG_TSFIFO_FSPYCPLP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCPLPCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCPLPCFG_TSFIFO_FSPYCPLP__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCRCFG(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCRCFG)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_27MHZ(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_27MHZ__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_RESET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_RESET__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_FASTTRK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_FASTTRK__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_PCROUT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_PCROUT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_NCRMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_NCRMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_PROTECT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_PROTECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_ENABLE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRCFG_PCRADJ_ENABLE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCRPID1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCRPID1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRPID1_TSFIFO_PCRPID(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRPID1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRPID1_TSFIFO_PCRPID__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRPID1_TSFIFO_AUTOPCR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRPID1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRPID1_TSFIFO_AUTOPCR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRPID1_MPEGSGNL_PID(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRPID1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRPID1_MPEGSGNL_PID__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRPID1_SOFFIFO_PCRADJ(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRPID1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRPID1_SOFFIFO_PCRADJ__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCRPID0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCRPID0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRPID0_TSFIFO_PCRPID(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRPID0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRPID0_TSFIFO_PCRPID__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSNCRCFG(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSNCRCFG)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRCFG_TSFIFO_NCRCKOUT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRCFG_TSFIFO_NCRCKOUT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_NCRBYTE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_NCRBYTE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_INTERLDLY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_INTERLDLY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_NVERIF(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_NVERIF__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRCFG_TSXCROBS_MODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRCFG_TSXCROBS_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_PROTECT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_PROTECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_ENABLE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRCFG_NCRADJ_ENABLE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSNCRPID1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSNCRPID1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRPID1_TSFIFO_NCRPID(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRPID1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRPID1_TSFIFO_NCRPID__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRPID1_NCRADJ_MANUEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRPID1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRPID1_NCRADJ_MANUEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRPID1_NCROUT_SEROFF(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRPID1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRPID1_NCROUT_SEROFF__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRPID1_NCRADJ_FINEMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRPID1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRPID1_NCRADJ_FINEMODE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSNCRPID0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSNCRPID0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRPID0_TSFIFO_NCRPID(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRPID0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRPID0_TSFIFO_NCRPID__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSNCRADJ2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSNCRADJ2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRADJ2_TSFIFO_NCRADJUST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRADJ2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRADJ2_TSFIFO_NCRADJUST__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRADJ2_NCRADJUST_MODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRADJ2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRADJ2_NCRADJUST_MODE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSNCRADJ1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSNCRADJ1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRADJ1_TSFIFO_NCRADJUST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRADJ1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRADJ1_TSFIFO_NCRADJUST__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSNCRADJ0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSNCRADJ0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNCRADJ0_TSFIFO_NCRADJUST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNCRADJ0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNCRADJ0_TSFIFO_NCRADJUST__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPIDFLTM(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPIDFLTM)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTM_PIDFLT_ADDR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTM_PIDFLT_ADDR__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPIDFLTL(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPIDFLTL)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTL_PIDFLT_DATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTL_PIDFLT_DATA__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPIDFLTC(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPIDFLTC)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_DELDEFAUT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_DELDEFAUT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_SAVEBRATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_SAVEBRATE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_DELMAC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_DELMAC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_DELGSE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_DELGSE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_LEAKPKT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_LEAKPKT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_ENABLE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTC*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTC_PIDFLT_ENABLE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDLYSET2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDLYSET2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLYSET2_SOFFIFO_SYMBOFFS(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLYSET2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLYSET2_SOFFIFO_SYMBOFFS__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLYSET2_HYSTERESIS_THRESHOLD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLYSET2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLYSET2_HYSTERESIS_THRESHOLD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLYSET2_SOFFIFO_OFFSET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLYSET2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLYSET2_SOFFIFO_OFFSET__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDLYSET1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDLYSET1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLYSET1_SOFFIFO_SYMBOFFS(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLYSET1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLYSET1_SOFFIFO_SYMBOFFS__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDLYSET0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDLYSET0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLYSET0_SOFFIFO_SYMBOFFS(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLYSET0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLYSET0_SOFFIFO_SYMBOFFS__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSINSDELH(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSINSDELH)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_CRC8(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELH*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_CRC8__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_RSPARITY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELH*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_RSPARITY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_NPD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELH*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_NPD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_ISCR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELH*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_ISCR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELH_TSDEL_DATAFIELD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELH*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELH_TSDEL_DATAFIELD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELH_TSDEL_BBHEADER(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELH*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELH_TSDEL_BBHEADER__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELH_TSDEL_XXHEADER(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELH*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELH_TSDEL_XXHEADER__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_SYNCBYTE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELH*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELH_TSINSDEL_SYNCBYTE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSINSDELM(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSINSDELM)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_UPL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_UPL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_MATYPE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_MATYPE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_XXXERR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_XXXERR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_TOKEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_TOKEN__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_EMODCOD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_EMODCOD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_MPEGSGNL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_MPEGSGNL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_BCHFEC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_BCHFEC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_BBPADDING(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELM*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELM_TSINS_BBPADDING__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSINSDELL(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSINSDELL)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_LATENCY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_LATENCY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_TSCONFIG(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_TSCONFIG__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_REALPACK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_REALPACK__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_FIFO(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_FIFO__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_SIGPCOUNT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_SIGPCOUNT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_BLOCLEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_BLOCLEN__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_SYNCD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_SYNCD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_DFL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSINSDELL*(1<<16) + FC8CODEW_DVBSX_HWARE_TSINSDELL_TSINS_DFL__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSCFG5(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSCFG5)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG5_TSPCR_OBSMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG5_TSPCR_OBSMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG5_DIS_SOFADJUST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG5_DIS_SOFADJUST__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG5_DIS_TSEXPMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG5_DIS_TSEXPMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG5_DIS_XCRCLOCKLSB(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG5_DIS_XCRCLOCKLSB__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG5_XCRCLK_NOVERIF(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG5_XCRCLK_NOVERIF__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG5_PCRADJ_MANUEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG5_PCRADJ_MANUEL__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSCFG6(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSCFG6)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG6_NOSLOW_ISCRUNIT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG6_NOSLOW_ISCRUNIT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_ISCRACCEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_ISCRACCEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG6_NCRADJ_PLFM0(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG6_NCRADJ_PLFM0__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_NCRBBFRAME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_NCRBBFRAME__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG6_DIL_NMAXSPEED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG6_DIL_NMAXSPEED__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_DMDPREDSKIP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_DMDPREDSKIP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_PREACCEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_PREACCEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_ISCRTEST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSCFG6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSCFG6_DIS_ISCRTEST__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPIDFLTD(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPIDFLTD)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTD_PIDFLT_CPTMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTD*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTD_PIDFLT_CPTMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTD_PIDFLT_ADAPTPROT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTD*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTD_PIDFLT_ADAPTPROT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTD_STFEPKT_CONTENT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTD*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTD_STFEPKT_CONTENT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPIDFLTD_PIDFLT_UNIVERSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPIDFLTD*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPIDFLTD_PIDFLT_UNIVERSEL__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSSAMPDLY(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSSAMPDLY)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSAMPDLY_TSFIFO_SAMPDELAYX2(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSAMPDLY*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSAMPDLY_TSFIFO_SAMPDELAYX2__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSMINSPEED(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSMINSPEED)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMINSPEED_TSFIFO_MINSPEED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMINSPEED*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMINSPEED_TSFIFO_MINSPEED__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSMAXSPEED(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSMAXSPEED)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMAXSPEED_TSFIFO_MAXSPEED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMAXSPEED*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMAXSPEED_TSFIFO_MAXSPEED__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSSPEED(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSSPEED)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSPEED_TSFIFO_OUTSPEED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSPEED*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSPEED_TSFIFO_OUTSPEED__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDILSTK1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDILSTK1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDILSTK1_TSFIFO_DILSTK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDILSTK1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDILSTK1_TSFIFO_DILSTK__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDILSTK0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDILSTK0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDILSTK0_TSFIFO_DILSTK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDILSTK0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDILSTK0_TSFIFO_DILSTK__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSSTATUS(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSSTATUS)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS_DIL_READY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS_DIL_READY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS_SOFFIFO_UNREGUL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS_SOFFIFO_UNREGUL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS_TSREGUL_ERROR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS_TSREGUL_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS_ISCR_INITIALIZED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS_ISCR_INITIALIZED__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS_TSFIFO_NOSYNC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS_TSFIFO_NOSYNC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS_TSFIFO_DATA7(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS_TSFIFO_DATA7__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS_TSFIFO_ERROR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS_TSFIFO_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS_TSFIFO_LINEOK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS_TSFIFO_LINEOK__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSSTATUS2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSSTATUS2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS2_ULDTV67_FALSELOCK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS2_ULDTV67_FALSELOCK__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS2_SCRAMBDETECT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS2_SCRAMBDETECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSFIFO_MUXSTREAM(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSFIFO_MUXSTREAM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSFIFO_LINENOK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSFIFO_LINENOK__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSSPEED_IMPOSSIBLE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSSPEED_IMPOSSIBLE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS2_DIL_NOSYNC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS2_DIL_NOSYNC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSFIFOSPEED_STORE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSFIFOSPEED_STORE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSFIFO_DEMODSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS2_TSFIFO_DEMODSEL__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSSTATUS3(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSSTATUS3)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS3_PCRCALC_NCRREADY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS3_PCRCALC_NCRREADY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS3_PCRCALC_PCRREADY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS3_PCRCALC_PCRREADY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS3_PCRCALC_ERROR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS3_PCRCALC_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSSTATUS3_TSFIFO_PKTDESC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSSTATUS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSSTATUS3_TSFIFO_PKTDESC__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSMODCOD1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSMODCOD1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMODCOD1_TSFIFO_CODINGMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMODCOD1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMODCOD1_TSFIFO_CODINGMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMODCOD1_TSFIFO_HEMMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMODCOD1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMODCOD1_TSFIFO_HEMMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMODCOD1_SFECRAM_DILUSE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMODCOD1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMODCOD1_SFECRAM_DILUSE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMODCOD1_SFECRAM_TOKUSE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMODCOD1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMODCOD1_SFECRAM_TOKUSE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMODCOD1_TSFIFO_SERIALLOCK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMODCOD1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMODCOD1_TSFIFO_SERIALLOCK__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSMODCOD0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSMODCOD0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMODCOD0_TSFIFO_TYPE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMODCOD0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMODCOD0_TSFIFO_TYPE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSMODCOD0_TSFIFO_MODCOD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSMODCOD0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSMODCOD0_TSFIFO_MODCOD__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSBITRATE1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSBITRATE1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBITRATE1_TSFIFO_BITRATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBITRATE1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBITRATE1_TSFIFO_BITRATE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSBITRATE0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSBITRATE0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBITRATE0_TSFIFO_BITRATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBITRATE0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBITRATE0_TSFIFO_BITRATE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPACKLEN1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPACKLEN1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPACKLEN1_TSFIFO_REALPKTLEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPACKLEN1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPACKLEN1_TSFIFO_REALPKTLEN__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPACKLEN1_TSFIFO_PACKCPT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPACKLEN1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPACKLEN1_TSFIFO_PACKCPT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPACKLEN0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPACKLEN0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPACKLEN0_TSFIFO_REALPKTLEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPACKLEN0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPACKLEN0_TSFIFO_REALPKTLEN__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSBLOCLEN1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSBLOCLEN1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBLOCLEN1_TSFIFO_PLFRAMELEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBLOCLEN1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBLOCLEN1_TSFIFO_PLFRAMELEN__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSBLOCLEN0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSBLOCLEN0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBLOCLEN0_TSFIFO_PLFRAMELEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBLOCLEN0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBLOCLEN0_TSFIFO_PLFRAMELEN__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDLY2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDLY2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_LATENCY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_LATENCY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_REGULATED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_REGULATED__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_STOP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_STOP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_SPEEDUP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_SPEEDUP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_TSTIMEV(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLY2_SOFFIFO_TSTIMEV__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDLY1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDLY1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLY1_SOFFIFO_LATENCY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLY1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLY1_SOFFIFO_LATENCY__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDLY0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDLY0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDLY0_SOFFIFO_LATENCY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDLY0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDLY0_SOFFIFO_LATENCY__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ISCRUNIT2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ISCRUNIT2)
#define FLD_FC8CODEW_DVBSX_HWARE_ISCRUNIT2_I2C_ISCRUNIT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ISCRUNIT2*(1<<16) + FC8CODEW_DVBSX_HWARE_ISCRUNIT2_I2C_ISCRUNIT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_ISCRUNIT2_I2C_ISCRFINE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ISCRUNIT2*(1<<16) + FC8CODEW_DVBSX_HWARE_ISCRUNIT2_I2C_ISCRFINE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_ISCRUNIT2_ISCRUNIT_WRMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ISCRUNIT2*(1<<16) + FC8CODEW_DVBSX_HWARE_ISCRUNIT2_ISCRUNIT_WRMODE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ISCRUNIT1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ISCRUNIT1)
#define FLD_FC8CODEW_DVBSX_HWARE_ISCRUNIT1_I2C_ISCRUNIT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ISCRUNIT1*(1<<16) + FC8CODEW_DVBSX_HWARE_ISCRUNIT1_I2C_ISCRUNIT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ISCRUNIT0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ISCRUNIT0)
#define FLD_FC8CODEW_DVBSX_HWARE_ISCRUNIT0_I2C_ISCRUNIT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ISCRUNIT0*(1<<16) + FC8CODEW_DVBSX_HWARE_ISCRUNIT0_I2C_ISCRUNIT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSNPDAV(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSNPDAV)
#define FLD_FC8CODEW_DVBSX_HWARE_TSNPDAV_TSNPD_AVERAGE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSNPDAV*(1<<16) + FC8CODEW_DVBSX_HWARE_TSNPDAV_TSNPD_AVERAGE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSBUFSTAT2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSBUFSTAT2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBUFSTAT2_TSISCR_BUFSTAT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBUFSTAT2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBUFSTAT2_TSISCR_BUFSTAT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBUFSTAT2_TSISCR_NEWDATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBUFSTAT2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBUFSTAT2_TSISCR_NEWDATA__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBUFSTAT2_TSISCR_3BYTES(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBUFSTAT2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBUFSTAT2_TSISCR_3BYTES__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSBUFSTAT1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSBUFSTAT1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBUFSTAT1_TSISCR_BUFSTAT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBUFSTAT1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBUFSTAT1_TSISCR_BUFSTAT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSBUFSTAT0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSBUFSTAT0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSBUFSTAT0_TSISCR_BUFSTAT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSBUFSTAT0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSBUFSTAT0_TSISCR_BUFSTAT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSXCROBS1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSXCROBS1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSXCROBS1_NCRTIME_DERIVE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSXCROBS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSXCROBS1_NCRTIME_DERIVE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSXCROBS0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSXCROBS0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSXCROBS0_NCRTIME_DERIVE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSXCROBS0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSXCROBS0_NCRTIME_DERIVE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCR272(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCR272)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCR272_TSFIFO_PCRCLOCK_MANT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCR272*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCR272_TSFIFO_PCRCLOCK_MANT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCR272_TSFIFO_PCRCLOCK_4EXP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCR272*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCR272_TSFIFO_PCRCLOCK_4EXP__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCR271(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCR271)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCR271_TSFIFO_PCRCLOCK_MANT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCR271*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCR271_TSFIFO_PCRCLOCK_MANT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCR270(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCR270)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCR270_TSFIFO_PCRCLOCK_MANT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCR270*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCR270_TSFIFO_PCRCLOCK_MANT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCRADJ2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCRADJ2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRADJ2_TSFIFO_PCRADJUST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRADJ2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRADJ2_TSFIFO_PCRADJUST__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCRADJ1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCRADJ1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRADJ1_TSFIFO_PCRADJUST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRADJ1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRADJ1_TSFIFO_PCRADJUST__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSPCRADJ0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSPCRADJ0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSPCRADJ0_TSFIFO_PCRADJUST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSPCRADJ0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSPCRADJ0_TSFIFO_PCRADJUST__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDEBUG1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDEBUG1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG1_SOFFIFO_SPEEDUPM(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG1_SOFFIFO_SPEEDUPM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG1_SOFFIFO_STOPM(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG1_SOFFIFO_STOPM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG1_TIMING_OVERFLOW(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG1_TIMING_OVERFLOW__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG1_TSFIFO_EMPTYPKT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG1_TSFIFO_EMPTYPKT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG1_DILOUT_BSYNCB(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG1_DILOUT_BSYNCB__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG1_DIL_LONGISSYI(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG1_DIL_LONGISSYI__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG1_DVBDIL_RDRESET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG1_DVBDIL_RDRESET__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG1_TSFIFO_ILLPACKET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG1_TSFIFO_ILLPACKET__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSDEBUG0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSDEBUG0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_OVERFLOWM(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_OVERFLOWM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSSPEED_OVERFLOW(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSSPEED_OVERFLOW__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_ERROR_EVNT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_ERROR_EVNT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_BOOSTDELM(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_BOOSTDELM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_BOOSTSPDM(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_BOOSTSPDM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_VITLIBRE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_VITLIBRE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_SYNCBFAIL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_SYNCBFAIL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_PCKLENFAIL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSDEBUG0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSDEBUG0_TSFIFO_PCKLENFAIL__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSOBSCFG(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSOBSCFG)
#define FLD_FC8CODEW_DVBSX_HWARE_TSOBSCFG_TSFIFO_OBSCFG(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSOBSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSOBSCFG_TSFIFO_OBSCFG__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSOBS1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSOBS1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSOBS1_TSFIFO_OBSDATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSOBS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSOBS1_TSFIFO_OBSDATA__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSOBS0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSOBS0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSOBS0_TSFIFO_OBSDATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSOBS0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSOBS0_TSFIFO_OBSDATA__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ERRCTRL1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ERRCTRL1)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCTRL1_NUM_EVENT1(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCTRL1*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCTRL1_NUM_EVENT1__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCTRL1_ERRPAGE2_SOURCE1(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCTRL1*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCTRL1_ERRPAGE2_SOURCE1__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCTRL1_ERR_SOURCE1(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCTRL1*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCTRL1_ERR_SOURCE1__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ERRCNT12(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ERRCNT12)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCNT12_ERR_CNT1(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCNT12*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCNT12_ERR_CNT1__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCNT12_ERRCNT1_OLDVALUE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCNT12*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCNT12_ERRCNT1_OLDVALUE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ERRCNT11(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ERRCNT11)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCNT11_ERR_CNT1(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCNT11*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCNT11_ERR_CNT1__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ERRCNT10(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ERRCNT10)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCNT10_ERR_CNT1(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCNT10*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCNT10_ERR_CNT1__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ERRCTRL2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ERRCTRL2)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCTRL2_NUM_EVENT2(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCTRL2*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCTRL2_NUM_EVENT2__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCTRL2_ERRPAGE2_SOURCE2(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCTRL2*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCTRL2_ERRPAGE2_SOURCE2__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCTRL2_ERR_SOURCE2(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCTRL2*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCTRL2_ERR_SOURCE2__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ERRCNT22(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ERRCNT22)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCNT22_ERR_CNT2(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCNT22*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCNT22_ERR_CNT2__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCNT22_ERRCNT2_OLDVALUE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCNT22*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCNT22_ERRCNT2_OLDVALUE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ERRCNT21(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ERRCNT21)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCNT21_ERR_CNT2(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCNT21*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCNT21_ERR_CNT2__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_ERRCNT20(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_ERRCNT20)
#define FLD_FC8CODEW_DVBSX_HWARE_ERRCNT20_ERR_CNT2(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_ERRCNT20*(1<<16) + FC8CODEW_DVBSX_HWARE_ERRCNT20_ERR_CNT2__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTS1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTS1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS1_TSTTSEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS1_TSTTSEN__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS1_DESCR_NOTAUTO(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS1_DESCR_NOTAUTO__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS1_TTO_GENMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS1_TTO_GENMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS1_TSTTS_NOFTHRESHOLD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS1_TSTTS_NOFTHRESHOLD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS1_TSTTS_EMBINDVB(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS1_TSTTS_EMBINDVB__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS1_TSTTS_FSPYBEFRS(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS1_TSTTS_FSPYBEFRS__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS1_TSFIFO_DSSSYNCB(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS1_TSFIFO_DSSSYNCB__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS1_DIS_SOFFIFOOV(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS1_DIS_SOFFIFOOV__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTS2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTS2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS2_TSTTS_SELECT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS2_TSTTS_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS2_SOFFIFO_DECIMDIS(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS2_SOFFIFO_DECIMDIS__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS2_TSTTS_NOBADXXX(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS2_TSTTS_NOBADXXX__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS2_DIL_DBBHEADER(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS2_DIL_DBBHEADER__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTS3(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTS3)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS3_TSTTS_STACKSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS3_TSTTS_STACKSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS3_TSTTS_NOBADSTART(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS3_TSTTS_NOBADSTART__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS3_TSTTS_DISBUG(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS3_TSTTS_DISBUG__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS3_TSTTS_ISOLATION(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS3_TSTTS_ISOLATION__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS3_DIS_ISCRRYTHME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS3_DIS_ISCRRYTHME__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS3_RESET_SOFFIFO(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS3_RESET_SOFFIFO__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTS4(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTS4)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS4_TSTTS_NODIV3(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS4_TSTTS_NODIV3__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS4_TSTTS_NODPZERO(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS4_TSTTS_NODPZERO__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS4_DIS_PLOADFAST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS4_DIS_PLOADFAST__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS4_TSTTS_FASTNOSYNC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS4_TSTTS_FASTNOSYNC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS4_EN_EFFEXP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS4_EN_EFFEXP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS4_DIS_TOKFILTER(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS4_DIS_TOKFILTER__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS4_TSTTS_INPUTOFF(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS4_TSTTS_INPUTOFF__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS4_DIS_RSTRDCNT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS4_DIS_RSTRDCNT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTS5(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTS5)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS5_TSTDMD_XXMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS5_TSTDMD_XXMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS5_TSTDMD_HWARE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS5_TSTDMD_HWARE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS5_DIS_ABANDHSGNL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS5_DIS_ABANDHSGNL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS5_NOGEN_SPECIALTOKEN2(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS5_NOGEN_SPECIALTOKEN2__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS5_DIS_SUMDELDFL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS5_DIS_SUMDELDFL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS5_DIS_DELACCEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS5_DIS_DELACCEL__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTS6(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTS6)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS6_TSFIFO_SYNCSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS6_TSFIFO_SYNCSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS6_TSSLICE_SELECT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS6_TSSLICE_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS6_DMDTIME_DIV(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS6_DMDTIME_DIV__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS6_SFECRAM_NOREUSE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS6_SFECRAM_NOREUSE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS6_DISHWARE_CLKENABL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS6_DISHWARE_CLKENABL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS6_DIS_SYNCDLIM(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS6*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS6_DIS_SYNCDLIM__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTS7(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTS7)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS7_DIS_TOKSAVEDEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS7*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS7_DIS_TOKSAVEDEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS7_DIS_SYNCDMAX(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS7*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS7_DIS_SYNCDMAX__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS7_DIS_DIRECTCRC8(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS7*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS7_DIS_DIRECTCRC8__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS7_DIS_HWAREOFF(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS7*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS7_DIS_HWAREOFF__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS7_SFECRAM_INVSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS7*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS7_SFECRAM_INVSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS7_NCRADJ_NOFINE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS7*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS7_NCRADJ_NOFINE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS7_NCRADJ_CALCERR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS7*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS7_NCRADJ_CALCERR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTS7_NCRADJ_XSOFWAIT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTS7*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTS7_NCRADJ_XSOFWAIT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTCPLP(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTCPLP)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTCPLP_DIS_ISCRVERIF(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTCPLP*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTCPLP_DIS_ISCRVERIF__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTCPLP_DIS_PKT2XSPEED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTCPLP*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTCPLP_DIS_PKT2XSPEED__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTCPLP_ENDIS_TOKSELECT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTCPLP*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTCPLP_ENDIS_TOKSELECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTCPLP_CPLP_SYNCBYTE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTCPLP*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTCPLP_CPLP_SYNCBYTE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTCPLP_TTO_OVERMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTCPLP*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTCPLP_TTO_OVERMODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTCPLP_DIS_INBANDTTO(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTCPLP*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTCPLP_DIS_INBANDTTO__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTCPLP_NORST_ADJOV(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTCPLP*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTCPLP_NORST_ADJOV__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSCFG(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSCFG)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_MODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_NCROUT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_NCROUT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_INVGATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_INVGATE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSCFG_NCROUT_CLKLEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSCFG_NCROUT_CLKLEN__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_CONTCLK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_CONTCLK__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_EXTGATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSCFG_TSRCS_EXTGATE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSSTAT(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSSTAT)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_DONE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTAT*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_DONE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_FAIL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTAT*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_FAIL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_READY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTAT*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_READY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_SGNVAL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTAT*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_SGNVAL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_SELCMP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTAT*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_SELCMP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTAT_NCROUT_SLOW(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTAT*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTAT_NCROUT_SLOW__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSFIFO_DSSPKT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTAT*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSFIFO_DSSPKT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_GATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTAT*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTAT_TSRCS_GATE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSSTART5(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSSTART5)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART5_TSRCSMSB_START(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART5_TSRCSMSB_START__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSSTART4(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSSTART4)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART4_TSRCSMSB_START(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART4_TSRCSMSB_START__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSSTART3(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSSTART3)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART3_TSRCSMSB_START(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART3_TSRCSMSB_START__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSSTART2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSSTART2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART2_TSRCSMSB_START(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART2_TSRCSMSB_START__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSSTART1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSSTART1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS300_START(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS300_START__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS_STARTLOCK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS_STARTLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS_STARTLOAD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS_STARTLOAD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS_PERMUTE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS_PERMUTE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS_MESGATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCS_MESGATE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCSMSB_START(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART1_TSRCSMSB_START__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSSTART0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSSTART0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSSTART0_TSRCS300_START(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSSTART0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSSTART0_TSRCS300_START__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSEND5(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSEND5)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND5_TSRCSMSB_END(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND5_TSRCSMSB_END__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSEND4(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSEND4)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND4_TSRCSMSB_END(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND4_TSRCSMSB_END__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSEND3(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSEND3)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND3_TSRCSMSB_END(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND3_TSRCSMSB_END__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSEND2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSEND2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND2_TSRCSMSB_END(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND2_TSRCSMSB_END__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSEND1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSEND1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCS300_END(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCS300_END__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCS_ENDLOCK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCS_ENDLOCK__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCS_ENDLOAD(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCS_ENDLOAD__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCS_DEBUG(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCS_DEBUG__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND1_NCRADJ_FORCE27(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND1_NCRADJ_FORCE27__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCSMSB_END(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND1_TSRCSMSB_END__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSEND0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSEND0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSEND0_TSRCS300_END(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSEND0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSEND0_TSRCS300_END__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSPRE(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSPRE)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSPRE_TSRCSPRE_LEN(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSPRE*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSPRE_TSRCSPRE_LEN__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSPRE_TSRCSPRE_MODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSPRE*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSPRE_TSRCSPRE_MODE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSTIME5(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSTIME5)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME5_TSRCSMSB_TIME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME5*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME5_TSRCSMSB_TIME__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSTIME4(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSTIME4)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME4_TSRCSMSB_TIME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME4*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME4_TSRCSMSB_TIME__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSTIME3(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSTIME3)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME3_TSRCSMSB_TIME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME3_TSRCSMSB_TIME__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSTIME2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSTIME2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME2_TSRCSMSB_TIME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME2_TSRCSMSB_TIME__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSTIME1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSTIME1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME1_TSRCS300_TIME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME1_TSRCS300_TIME__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME1_TSRCS_ANAGATE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME1_TSRCS_ANAGATE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME1_TSRCS_CAPTURE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME1_TSRCS_CAPTURE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME1_TSRCSMSB_TIME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME1_TSRCSMSB_TIME__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSRCSTIME0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSRCSTIME0)
#define FLD_FC8CODEW_DVBSX_HWARE_TSRCSTIME0_TSRCS300_TIME(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSRCSTIME0*(1<<16) + FC8CODEW_DVBSX_HWARE_TSRCSTIME0_TSRCS300_TIME__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFDILSTK1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFDILSTK1)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDILSTK1_SFEC_DILSTK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDILSTK1*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDILSTK1_SFEC_DILSTK__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFDILSTK0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFDILSTK0)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDILSTK0_SFEC_DILSTK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDILSTK0*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDILSTK0_SFEC_DILSTK__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFSTATUS(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFSTATUS)
#define FLD_FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_READY(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_READY__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_UNREGULA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_UNREGULA__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_NOSYNC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_NOSYNC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFSTATUS_TSSFEC_DEMODSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_SFSTATUS_TSSFEC_DEMODSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_OVERFLOW(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_OVERFLOW__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_DATA7(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_DATA7__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_ERROR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_LINEOK(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFSTATUS*(1<<16) + FC8CODEW_DVBSX_HWARE_SFSTATUS_SFEC_LINEOK__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFDLY2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFDLY2)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_REALSYMBOFFSET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_REALSYMBOFFSET__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_REGULATED(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_REGULATED__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_STOP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_STOP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_SPEEDUP(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_SPEEDUP__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_TSTIMEVALID(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLY2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLY2_SFEC_TSTIMEVALID__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFDLY1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFDLY1)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLY1_SFEC_REALSYMBOFFSET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLY1*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLY1_SFEC_REALSYMBOFFSET__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFDLY0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFDLY0)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLY0_SFEC_REALSYMBOFFSET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLY0*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLY0_SFEC_REALSYMBOFFSET__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFDLYSET2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFDLYSET2)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLYSET2_SFEC_UNREGUL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLYSET2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLYSET2_SFEC_UNREGUL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLYSET2_SFEC_DISABLE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLYSET2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLYSET2_SFEC_DISABLE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLYSET2_DILDLINE_ERROR(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLYSET2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLYSET2_DILDLINE_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLYSET2_RST_SFEC(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLYSET2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLYSET2_RST_SFEC__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLYSET2_SFEC_OFFSET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLYSET2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLYSET2_SFEC_OFFSET__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFDLYSET1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFDLYSET1)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLYSET1_SFEC_SYMBOFFSET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLYSET1*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLYSET1_SFEC_SYMBOFFSET__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFDLYSET0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFDLYSET0)
#define FLD_FC8CODEW_DVBSX_HWARE_SFDLYSET0_SFEC_SYMBOFFSET(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFDLYSET0*(1<<16) + FC8CODEW_DVBSX_HWARE_SFDLYSET0_SFEC_SYMBOFFSET__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFOBSCFG(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFOBSCFG)
#define FLD_FC8CODEW_DVBSX_HWARE_SFOBSCFG_SFEC_OBSCFG(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFOBSCFG*(1<<16) + FC8CODEW_DVBSX_HWARE_SFOBSCFG_SFEC_OBSCFG__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFOBS1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFOBS1)
#define FLD_FC8CODEW_DVBSX_HWARE_SFOBS1_SFEC_OBSDATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFOBS1*(1<<16) + FC8CODEW_DVBSX_HWARE_SFOBS1_SFEC_OBSDATA__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFOBS0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFOBS0)
#define FLD_FC8CODEW_DVBSX_HWARE_SFOBS0_SFEC_OBSDATA(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFOBS0*(1<<16) + FC8CODEW_DVBSX_HWARE_SFOBS0_SFEC_OBSDATA__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFECINFO(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFECINFO)
#define FLD_FC8CODEW_DVBSX_HWARE_SFECINFO_SFCE_S1CPHASE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFECINFO*(1<<16) + FC8CODEW_DVBSX_HWARE_SFECINFO_SFCE_S1CPHASE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFECINFO_SFEC_SYNCDLSB(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFECINFO*(1<<16) + FC8CODEW_DVBSX_HWARE_SFECINFO_SFEC_SYNCDLSB__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFERRCTRL(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFERRCTRL)
#define FLD_FC8CODEW_DVBSX_HWARE_SFERRCTRL_SFEC_NUM_EVENT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFERRCTRL*(1<<16) + FC8CODEW_DVBSX_HWARE_SFERRCTRL_SFEC_NUM_EVENT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFERRCTRL_SFEC_ERR_SOURCE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFERRCTRL*(1<<16) + FC8CODEW_DVBSX_HWARE_SFERRCTRL_SFEC_ERR_SOURCE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFERRCNT2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFERRCNT2)
#define FLD_FC8CODEW_DVBSX_HWARE_SFERRCNT2_SFEC_ERR_CNT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFERRCNT2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFERRCNT2_SFEC_ERR_CNT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_SFERRCNT2_SFERRC_OLDVALUE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFERRCNT2*(1<<16) + FC8CODEW_DVBSX_HWARE_SFERRCNT2_SFERRC_OLDVALUE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFERRCNT1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFERRCNT1)
#define FLD_FC8CODEW_DVBSX_HWARE_SFERRCNT1_SFEC_ERR_CNT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFERRCNT1*(1<<16) + FC8CODEW_DVBSX_HWARE_SFERRCNT1_SFEC_ERR_CNT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_SFERRCNT0(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_SFERRCNT0)
#define FLD_FC8CODEW_DVBSX_HWARE_SFERRCNT0_SFEC_ERR_CNT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_SFERRCNT0*(1<<16) + FC8CODEW_DVBSX_HWARE_SFERRCNT0_SFEC_ERR_CNT__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTSSF1(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTSSF1)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF1_TSTTSSF_STACKSEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF1_TSTTSSF_STACKSEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF1_DIS_SFECAUTOADJ(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF1_DIS_SFECAUTOADJ__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF1_SFEC_OUTMODE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF1*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF1_SFEC_OUTMODE__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTSSF2(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTSSF2)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF2_TSTTSSF_SELECT(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF2_TSTTSSF_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF2_TSTTSSF_NOBADSTART(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF2_TSTTSSF_NOBADSTART__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF2_TSTTSSF_DISBUG(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF2*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF2_TSTTSSF_DISBUG__MASK)

#define REG_RC8CODEW_DVBSX_HWARE_TSTTSSF3(PATH) (DVBSX_HWARE[PATH-1] + RC8CODEW_DVBSX_HWARE_TSTTSSF3)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF3_DISSF_CLKENABLE(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF3_DISSF_CLKENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF3_DISSF_ERRMEM(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF3_DISSF_ERRMEM__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF3_EN_SOFFIFODEL(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF3_EN_SOFFIFODEL__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF3_SFEC_BFIFORST(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF3_SFEC_BFIFORST__MASK)
#define FLD_FC8CODEW_DVBSX_HWARE_TSTTSSF3_SFEC_NRSTPKTOV(PATH) (DVBSX_HWARE[PATH-1]*(1<<16) + RC8CODEW_DVBSX_HWARE_TSTTSSF3*(1<<16) + FC8CODEW_DVBSX_HWARE_TSTTSSF3_SFEC_NRSTPKTOV__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELCTRL0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_HEMMODE_SELECT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_HEMMODE_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_PDELDIS_BITWISE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_PDELDIS_BITWISE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_INBAND_CANCEL(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_INBAND_CANCEL__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_ISIOBS_MODE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_ISIOBS_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_ENDIS_COMMONPLP(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_ENDIS_COMMONPLP__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_USER_COMMONPLP(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL0_USER_COMMONPLP__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_ALGOSWRST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_ALGOSWRST__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_EN_MIS00(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_EN_MIS00__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_PKTDELIN_SYNCRST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_PKTDELIN_SYNCRST__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_HYSTEN(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_HYSTEN__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_FORCE_PKTDELINUSE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_FORCE_PKTDELINUSE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_FILTER_EN(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_FILTER_EN__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_FORCE_ACCEPTED(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_FORCE_ACCEPTED__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_INV_MISMASK(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL1_INV_MISMASK__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_OLD_PKTFRAME(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_OLD_PKTFRAME__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_FRAME_MODE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_FRAME_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_FORCE_LONGPKT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_FORCE_LONGPKT__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_DATA_UNBBSCRAMBLED(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_DATA_UNBBSCRAMBLED__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_SPECIAL_DATA_0XFF(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_SPECIAL_DATA_0XFF__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_RESET_UPKO_COUNT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_RESET_UPKO_COUNT__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_FORCE_CONTINUOUS(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL2_FORCE_CONTINUOUS__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_ETHERNET_DISFCS(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_ETHERNET_DISFCS__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDEL_BCHERRCONT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDEL_BCHERRCONT__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_SATURATE_BBPKTKO(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_SATURATE_BBPKTKO__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDEL_NOPKTCHK(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDEL_NOPKTCHK__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDELIN_DELACMERR(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDELIN_DELACMERR__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_NOFIFO_BCHERR(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_NOFIFO_BCHERR__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDEL_ENLONGPKT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDEL_ENLONGPKT__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDEL_CONTFAIL(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL3_PKTDEL_CONTFAIL__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELCTRL4(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL4)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL4_USER_PKTDELIN_NB(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL4*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL4_USER_PKTDELIN_NB__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL4_PKTDELGSE_CRC32(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL4*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL4_PKTDELGSE_CRC32__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL4_PKTDEL_CHBONDING(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL4*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL4_PKTDEL_CHBONDING__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELCTRL4_EN_CHBONDING(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELCTRL4*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELCTRL4_EN_CHBONDING__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_SYNCD_STREAM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_SYNCD_STREAM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_SYNC_STREAM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_SYNC_STREAM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_DFL_STREAM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_DFL_STREAM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_UPL_STREAM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_UPL_STREAM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_MATYPE_STREAM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_MATYPE_STREAM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_BCHERRFLG_USE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_BCHERRFLG_USE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_OUT_ENBYPASS(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL1_OUT_ENBYPASS__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_SYNCD_I2C(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_SYNCD_I2C__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_SYNC_I2C(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_SYNC_I2C__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_DFL_I2C(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_DFL_I2C__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_UPL_I2C(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_UPL_I2C__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_MATYPE_I2C(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_MATYPE_I2C__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_FORCE_MATYPEMSB(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_FORCE_MATYPEMSB__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_TSGS_UPL_DELOCK(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_TSGS_UPL_DELOCK__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_IPFRAME_FCSINVERT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBHCTRL2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBHCTRL2_IPFRAME_FCSINVERT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_HYSTTHRESH(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_HYSTTHRESH)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_HYSTTHRESH_DELIN_UNLOCKTHRES(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_HYSTTHRESH*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_HYSTTHRESH_DELIN_UNLOCKTHRES__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_HYSTTHRESH_DELIN_LOCKTHRES(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_HYSTTHRESH*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_HYSTTHRESH_DELIN_LOCKTHRES__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_ISIENTRY(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_ISIENTRY)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_ISIENTRY_ISI_ENTRY(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_ISIENTRY*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_ISIENTRY_ISI_ENTRY__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_ISIBITENA(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_ISIBITENA)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_ISIBITENA_ISI_BIT_EN(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_ISIBITENA*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_ISIBITENA_ISI_BIT_EN__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELDBGM(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_T2INBAND_NPLPRST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_T2INBAND_NPLPRST__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_DBGWISE_LGNOFF(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_DBGWISE_LGNOFF__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_UPLISCR_CRC8SEL(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_UPLISCR_CRC8SEL__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDELIN_GSEFILTRE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDELIN_GSEFILTRE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDELIN_NDLYOV(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDELIN_NDLYOV__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDEL_NMAXSPEED(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDEL_NMAXSPEED__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDEL_NOENDBLOC(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDEL_NOENDBLOC__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDEL_ISIDEFRAG(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGM*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGM_PKTDEL_ISIDEFRAG__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELDBGL(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_DISNPADDNG(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_DISNPADDNG__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_DISSTATIC(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_DISSTATIC__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_DISPLOAD(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_DISPLOAD__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_FORCE1ER(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_FORCE1ER__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_NOTTOAECH(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_NOTTOAECH__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_NO1ERFRAME(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_NO1ERFRAME__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_NOVALID(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_NOVALID__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_DELFRAME(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELDBGL*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELDBGL_T2INBAND_DELFRAME__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_MATCST1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_MATCST1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_ROLLOFF(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_ROLLOFF__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_NPD(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_NPD__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_ISSYI(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_ISSYI__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_CCMACM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_CCMACM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_SISMIS(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_SISMIS__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_TSGS(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATCST1_MATYPECST_TSGS__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_MATCST0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_MATCST0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATCST0_MATYPECST_ISI(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATCST0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATCST0_MATYPECST_ISI__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_UPLCST1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_UPLCST1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_UPLCST1_UPL_CST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_UPLCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_UPLCST1_UPL_CST__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_UPLCST0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_UPLCST0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_UPLCST0_UPL_MODE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_UPLCST0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_UPLCST0_UPL_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_UPLCST0_UPL_CST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_UPLCST0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_UPLCST0_UPL_CST__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_DFLCST1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_DFLCST1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_DFLCST1_DFL_CST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_DFLCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_DFLCST1_DFL_CST__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_DFLCST0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_DFLCST0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_DFLCST0_DFL_CST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_DFLCST0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_DFLCST0_DFL_CST__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_SYNCCST(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_SYNCCST)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_SYNCCST_SYNC_CST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_SYNCCST*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_SYNCCST_SYNC_CST__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_SYNCDCST1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_SYNCDCST1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_SYNCDCST1_SYNCD_CST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_SYNCDCST1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_SYNCDCST1_SYNCD_CST__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_SYNCDCST0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_SYNCDCST0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_SYNCDCST0_SYNCD_CST(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_SYNCDCST0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_SYNCDCST0_SYNCD_CST__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_MATSTR1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_MATSTR1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_ROLLOFF(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_ROLLOFF__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_NPD(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_NPD__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_ISSYI(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_ISSYI__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_CCMACM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_CCMACM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_SISMIS(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_SISMIS__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_TSGS(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATSTR1_MATYPE_TSGS__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_MATSTR0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_MATSTR0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_MATSTR0_MATYPEISI_CURRENT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_MATSTR0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_MATSTR0_MATYPEISI_CURRENT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_UPLSTR1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_UPLSTR1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_UPLSTR1_UPL_CURRENT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_UPLSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_UPLSTR1_UPL_CURRENT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_UPLSTR0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_UPLSTR0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_UPLSTR0_UPL_CURRENT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_UPLSTR0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_UPLSTR0_UPL_CURRENT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_DFLSTR1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_DFLSTR1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_DFLSTR1_DFL_CURRENT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_DFLSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_DFLSTR1_DFL_CURRENT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_DFLSTR0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_DFLSTR0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_DFLSTR0_DFL_CURRENT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_DFLSTR0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_DFLSTR0_DFL_CURRENT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_SYNCSTR(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_SYNCSTR)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_SYNCSTR_SYNC_CURRENT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_SYNCSTR*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_SYNCSTR_SYNC_CURRENT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_SYNCDSTR1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_SYNCDSTR1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_SYNCDSTR1_SYNCD_CURRENT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_SYNCDSTR1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_SYNCDSTR1_SYNCD_CURRENT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_SYNCDSTR0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_SYNCDSTR0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_SYNCDSTR0_SYNCD_CURRENT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_SYNCDSTR0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_SYNCDSTR0_SYNCD_CURRENT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_ISIMAXSTR(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_ISIMAXSTR)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_ISIMAXSTR_MATYPE_ISIMAX(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_ISIMAXSTR*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_ISIMAXSTR_MATYPE_ISIMAX__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_ISIMINSTR(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_ISIMINSTR)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_ISIMINSTR_MATYPE_ISIMIN(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_ISIMINSTR*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_ISIMINSTR_MATYPE_ISIMIN__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_FIRST_LOCK(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_FIRST_LOCK__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_PKTDELIN_LOCK(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_PKTDELIN_LOCK__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_BBHCRCKO(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_BBHCRCKO__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_BCH_ERROR_FLAG(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_BCH_ERROR_FLAG__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_UNACCEPTED_STREAM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_UNACCEPTED_STREAM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_CONTINUOUS_STREAM(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_CONTINUOUS_STREAM__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_SYNCDUPDFL_BADDFL(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_SYNCDUPDFL_BADDFL__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_PKTDELIN_DELOCK(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS1_PKTDELIN_DELOCK__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS2(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS2)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS2_FRAME_TYPE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS2_FRAME_TYPE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS2_FRAME_MODCOD(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS2*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS2_FRAME_MODCOD__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_PKTDELIN_GSETYPE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_PKTDELIN_GSETYPE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_TS_NOCRC8BYTE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_TS_NOCRC8BYTE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_PKTDEL_DEMODSEL(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_PKTDEL_DEMODSEL__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_GSELITE_DETECT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_GSELITE_DETECT__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_XXXCRCKO_LOCK(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_PDELSTATUS3_XXXCRCKO_LOCK__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_BBFCRCKO1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_BBFCRCKO1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBFCRCKO1_BBHCRC_KOCNT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBFCRCKO1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBFCRCKO1_BBHCRC_KOCNT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_BBFCRCKO0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_BBFCRCKO0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_BBFCRCKO0_BBHCRC_KOCNT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_BBFCRCKO0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_BBFCRCKO0_BBHCRC_KOCNT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_UPCRCKO1(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_UPCRCKO1)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_UPCRCKO1_PKTCRC_KOCNT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_UPCRCKO1*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_UPCRCKO1_PKTCRC_KOCNT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_UPCRCKO0(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_UPCRCKO0)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_UPCRCKO0_PKTCRC_KOCNT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_UPCRCKO0*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_UPCRCKO0_PKTCRC_KOCNT__MASK)

#define REG_RC8CODEW_DVBSX_PKTDELIN_TPKTDELIN(PATH) (DVBSX_PKTDELIN[PATH-1] + RC8CODEW_DVBSX_PKTDELIN_TPKTDELIN)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_TESTBUS_SELECT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_TPKTDELIN*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_TESTBUS_SELECT__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_DISPDEL_CLKENABLE(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_TPKTDELIN*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_DISPDEL_CLKENABLE__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_PKTDEL_NOMISCONT(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_TPKTDELIN*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_PKTDEL_NOMISCONT__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_DIS_BBHCHECK(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_TPKTDELIN*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_DIS_BBHCHECK__MASK)
#define FLD_FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_DIS_SLICEINC(PATH) (DVBSX_PKTDELIN[PATH-1]*(1<<16) + RC8CODEW_DVBSX_PKTDELIN_TPKTDELIN*(1<<16) + FC8CODEW_DVBSX_PKTDELIN_TPKTDELIN_DIS_SLICEINC__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FECSPY(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FECSPY)
#define FLD_FC8CODEW_DVBSX_FECSPY_FECSPY_BERMETER_RESET(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FECSPY*(1<<16) + FC8CODEW_DVBSX_FECSPY_FECSPY_BERMETER_RESET__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FECSPY_BERMETER_LMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FECSPY*(1<<16) + FC8CODEW_DVBSX_FECSPY_FECSPY_BERMETER_LMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FECSPY_BERMETER_DATAMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FECSPY*(1<<16) + FC8CODEW_DVBSX_FECSPY_FECSPY_BERMETER_DATAMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FECSPY_UNUSUAL_PACKET(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FECSPY*(1<<16) + FC8CODEW_DVBSX_FECSPY_FECSPY_UNUSUAL_PACKET__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FECSPY_SERIAL_MODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FECSPY*(1<<16) + FC8CODEW_DVBSX_FECSPY_FECSPY_SERIAL_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FECSPY_NO_SYNCBYTE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FECSPY*(1<<16) + FC8CODEW_DVBSX_FECSPY_FECSPY_NO_SYNCBYTE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FECSPY_SPY_ENABLE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FECSPY*(1<<16) + FC8CODEW_DVBSX_FECSPY_FECSPY_SPY_ENABLE__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYCFG(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYCFG)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYCFG_SPY_HYSTERESIS(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYCFG_SPY_HYSTERESIS__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYCFG_I2C_MODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYCFG_I2C_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYCFG_ONE_SHOT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYCFG_ONE_SHOT__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYCFG_RST_ON_ERROR(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYCFG_RST_ON_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYCFG_FECSPY_INPUT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYCFG_FECSPY_INPUT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYDATA(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYDATA)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYDATA_SPY_OUTDATA_MODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYDATA*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYDATA_SPY_OUTDATA_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYDATA_SPY_CNULLPKT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYDATA*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYDATA_SPY_CNULLPKT__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYDATA_NOERROR_PKTJITTER(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYDATA*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYDATA_NOERROR_PKTJITTER__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYDATA_SPY_STUFFING(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYDATA*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYDATA_SPY_STUFFING__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOUT(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOUT)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOUT_STUFF_MODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOUT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOUT_STUFF_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOUT_SPY_OUTDATA_BUS(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOUT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOUT_SPY_OUTDATA_BUS__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOUT_FSPY_AUTODETECT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOUT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOUT_FSPY_AUTODETECT__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOUT_FSPY_DIRECT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOUT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOUT_FSPY_DIRECT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYBER(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYBER)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_CTIME(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYBER*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_CTIME__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_UNSYNC(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYBER*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_UNSYNC__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_SYNCBYTE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYBER*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_SYNCBYTE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_OBSMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYBER*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_OBSMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_DISTMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYBER*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPYBER_DISTMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPY_NOBLANKPKT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYBER*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYBER_FSPY_NOBLANKPKT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOPT(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOPT)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOPT_FSPYOPT_GSENCR(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOPT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOPT_FSPYOPT_GSENCR__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOPT_FSPYOPT_PUSIPAD(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOPT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOPT_FSPYOPT_PUSIPAD__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOPT_FSPYOPT_HFSGNL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOPT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOPT_FSPYOPT_HFSGNL__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOPT_FSPYOPT_CHBOND(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOPT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOPT_FSPYOPT_CHBOND__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSTATUS(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSTATUS)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATUS_RESULT_STATE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATUS*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATUS_RESULT_STATE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATUS_DSS_SYNCBYTE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATUS*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATUS_DSS_SYNCBYTE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATUS_FOUND_SIGNAL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATUS*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATUS_FOUND_SIGNAL__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATUS_VALID_SIM(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATUS*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATUS_VALID_SIM__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATUS_SPY_ENDSIM(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATUS*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATUS_SPY_ENDSIM__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FGOODPACK(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FGOODPACK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FGOODPACK_FGOOD_PACKET(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FGOODPACK*(1<<16) + FC8CODEW_DVBSX_FECSPY_FGOODPACK_FGOOD_PACKET__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FPACKCNT(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FPACKCNT)
#define FLD_FC8CODEW_DVBSX_FECSPY_FPACKCNT_FPACKET_COUNTER(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FPACKCNT*(1<<16) + FC8CODEW_DVBSX_FECSPY_FPACKCNT_FPACKET_COUNTER__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYMISC(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYMISC)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYMISC_FLABEL_COUNTER(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYMISC*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYMISC_FLABEL_COUNTER__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSTATES1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSTATES1)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_8(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_8__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_9(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_9__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_A(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_A__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_B(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_B__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_C(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_C__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_D(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_D__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_E(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_E__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_F(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES1_RSTATE_F__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSTATES0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSTATES0)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_0(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_0__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_1(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_1__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_2(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_2__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_3(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_3__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_4(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_4__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_5(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_5__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_7(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSTATES0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSTATES0_RSTATE_7__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FBERCPT4(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FBERCPT4)
#define FLD_FC8CODEW_DVBSX_FECSPY_FBERCPT4_FBERMETER_CPT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FBERCPT4*(1<<16) + FC8CODEW_DVBSX_FECSPY_FBERCPT4_FBERMETER_CPT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FBERCPT3(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FBERCPT3)
#define FLD_FC8CODEW_DVBSX_FECSPY_FBERCPT3_FBERMETER_CPT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FBERCPT3*(1<<16) + FC8CODEW_DVBSX_FECSPY_FBERCPT3_FBERMETER_CPT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FBERCPT2(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FBERCPT2)
#define FLD_FC8CODEW_DVBSX_FECSPY_FBERCPT2_FBERMETER_CPT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FBERCPT2*(1<<16) + FC8CODEW_DVBSX_FECSPY_FBERCPT2_FBERMETER_CPT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FBERCPT1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FBERCPT1)
#define FLD_FC8CODEW_DVBSX_FECSPY_FBERCPT1_FBERMETER_CPT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FBERCPT1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FBERCPT1_FBERMETER_CPT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FBERCPT0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FBERCPT0)
#define FLD_FC8CODEW_DVBSX_FECSPY_FBERCPT0_FBERMETER_CPT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FBERCPT0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FBERCPT0_FBERMETER_CPT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FBERERR2(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FBERERR2)
#define FLD_FC8CODEW_DVBSX_FECSPY_FBERERR2_FBERMETER_ERR(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FBERERR2*(1<<16) + FC8CODEW_DVBSX_FECSPY_FBERERR2_FBERMETER_ERR__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FBERERR1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FBERERR1)
#define FLD_FC8CODEW_DVBSX_FECSPY_FBERERR1_FBERMETER_ERR(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FBERERR1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FBERERR1_FBERMETER_ERR__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FBERERR0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FBERERR0)
#define FLD_FC8CODEW_DVBSX_FECSPY_FBERERR0_FBERMETER_ERR(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FBERERR0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FBERERR0_FBERMETER_ERR__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYDIST1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYDIST1)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYDIST1_PKTTIME_DISTANCE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYDIST1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYDIST1_PKTTIME_DISTANCE__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYDIST0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYDIST0)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYDIST0_PKTTIME_DISTANCE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYDIST0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYDIST0_PKTTIME_DISTANCE__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYPCR1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYPCR1)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYPCR1_PCRTIME_DISTANCE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYPCR1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYPCR1_PCRTIME_DISTANCE__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYPCR0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYPCR0)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYPCR0_PCRTIME_DISTANCE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYPCR0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYPCR0_PCRTIME_DISTANCE__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYNCR1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYNCR1)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYNCR1_NCRTIME_DISTANCE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYNCR1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYNCR1_NCRTIME_DISTANCE__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYNCR0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYNCR0)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYNCR0_NCRTIME_DISTANCE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYNCR0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYNCR0_NCRTIME_DISTANCE__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOBS7(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOBS7)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS7_FSPY_RES_STATE1(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS7*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS7_FSPY_RES_STATE1__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS7_FSPYOBS_STROUT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS7*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS7_FSPYOBS_STROUT__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS7_FSPYOBS_ERROR(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS7*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS7_FSPYOBS_ERROR__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS7_FSPYOBS_SPYFAIL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS7*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS7_FSPYOBS_SPYFAIL__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOBS6(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOBS6)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS6_FSPY_RES_STATEM1(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS6*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS6_FSPY_RES_STATEM1__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS6_FSPY_RES_STATE0(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS6*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS6_FSPY_RES_STATE0__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOBS5(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOBS5)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS5_FSPY_BYTEOFPKT1(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS5*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS5_FSPY_BYTEOFPKT1__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOBS4(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOBS4)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS4_FSPY_BYTEVAL1(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS4*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS4_FSPY_BYTEVAL1__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOBS3(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOBS3)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS3_FSPYOBS_DATA1(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS3*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS3_FSPYOBS_DATA1__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOBS2(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOBS2)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS2_FSPYOBS_DATA0(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS2*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS2_FSPYOBS_DATA0__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOBS1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOBS1)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS1_FSPYOBS_DATAM1(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS1*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS1_FSPYOBS_DATAM1__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_FSPYOBS0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_FSPYOBS0)
#define FLD_FC8CODEW_DVBSX_FECSPY_FSPYOBS0_FSPYOBS_DATAM2(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_FSPYOBS0*(1<<16) + FC8CODEW_DVBSX_FECSPY_FSPYOBS0_FSPYOBS_DATAM2__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVDESCM(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVDESCM)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_INVDATA(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCM*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_INVDATA__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_PERMDATA(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCM*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_PERMDATA__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_INVCLK(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCM*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_INVCLK__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_NCRBYTE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCM*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_NCRBYTE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_I2CDESC(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCM*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_I2CDESC__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_LINEOK(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCM*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCM_NCRV_LINEOK__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVDESCL(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVDESCL)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCL_NCRV_FSPYMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCL*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCL_NCRV_FSPYMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCL_NCRV_2BITMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCL*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCL_NCRV_2BITMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVDESCL_NCRV_SERIAL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVDESCL*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVDESCL_NCRV_SERIAL__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVOBS3(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVOBS3)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVOBS3_NCRVERIF_OBSVAL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVOBS3*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVOBS3_NCRVERIF_OBSVAL__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVOBS3_NCRVERIF_DSSMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVOBS3*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVOBS3_NCRVERIF_DSSMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVOBS3_NCRCPT_INITIALIZED(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVOBS3*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVOBS3_NCRCPT_INITIALIZED__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVOBS2(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVOBS2)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVOBS2_NCRVERIF_OBSVAL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVOBS2*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVOBS2_NCRVERIF_OBSVAL__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVOBS1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVOBS1)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVOBS1_NCRVERIF_OBSVAL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVOBS1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVOBS1_NCRVERIF_OBSVAL__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVOBS0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVOBS0)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVOBS0_NCRVERIF_OBSVAL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVOBS0*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVOBS0_NCRVERIF_OBSVAL__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVCFG(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVCFG)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRV_OBSMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRV_OBSMODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRV_HWARECPT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRV_HWARECPT__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRVABS_MODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRVABS_MODE__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRV_AUTORST(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRV_AUTORST__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRV_RESET(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCFG*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCFG_NCRV_RESET__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVPID1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVPID1)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVPID1_NCRV_NCRPID(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVPID1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVPID1_NCRV_NCRPID__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVPID1_NCRV_ALLPID(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVPID1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVPID1_NCRV_ALLPID__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVPID1_NCRV_DEBUG(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVPID1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVPID1_NCRV_DEBUG__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVPID1_NCRV_PIDMODE(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVPID1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVPID1_NCRV_PIDMODE__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVPID0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVPID0)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVPID0_NCRV_NCRPID(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVPID0*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVPID0_NCRV_NCRPID__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVCFG2(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVCFG2)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCFG2_NCRVERIF_NOPRED(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCFG2*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCFG2_NCRVERIF_NOPRED__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCFG2_NCRVERIF_PROTECT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCFG2*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCFG2_NCRVERIF_PROTECT__MASK)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCFG2_NCRV_BIT9FAIL(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCFG2*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCFG2_NCRV_BIT9FAIL__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVMAX1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVMAX1)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVMAX1_NCRVERIF_NCRMAX(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVMAX1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVMAX1_NCRVERIF_NCRMAX__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVMAX0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVMAX0)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVMAX0_NCRVERIF_NCRMAX(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVMAX0*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVMAX0_NCRVERIF_NCRMAX__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVMIN1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVMIN1)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVMIN1_NCRVERIF_NCRMIN(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVMIN1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVMIN1_NCRVERIF_NCRMIN__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVMIN0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVMIN0)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVMIN0_NCRVERIF_NCRMIN(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVMIN0*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVMIN0_NCRVERIF_NCRMIN__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVABS1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVABS1)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVABS1_NCRVERIF_NCRABS(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVABS1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVABS1_NCRVERIF_NCRABS__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVABS0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVABS0)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVABS0_NCRVERIF_NCRABS(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVABS0*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVABS0_NCRVERIF_NCRABS__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVCPT1(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVCPT1)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCPT1_NCRVERIF_NCRCPT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCPT1*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCPT1_NCRVERIF_NCRCPT__MASK)

#define REG_RC8CODEW_DVBSX_FECSPY_NCRVCPT0(PATH) (DVBSX_FECSPY[PATH-1] + RC8CODEW_DVBSX_FECSPY_NCRVCPT0)
#define FLD_FC8CODEW_DVBSX_FECSPY_NCRVCPT0_NCRVERIF_NCRCPT(PATH) (DVBSX_FECSPY[PATH-1]*(1<<16) + RC8CODEW_DVBSX_FECSPY_NCRVCPT0*(1<<16) + FC8CODEW_DVBSX_FECSPY_NCRVCPT0_NCRVERIF_NCRCPT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF1_P1_NBITER_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF1_P1_NBITER_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF2_P1_NBITER_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF2_P1_NBITER_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF3_P1_NBITER_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF3_P1_NBITER_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF4_P1_NBITER_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF4_P1_NBITER_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF5_P1_NBITER_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF5_P1_NBITER_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF6_P1_NBITER_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF6_P1_NBITER_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF7_P1_NBITER_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF7_P1_NBITER_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF8_P1_NBITER_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF8_P1_NBITER_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF9_P1_NBITER_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF9_P1_NBITER_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF10_P1_NBITER_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF10_P1_NBITER_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF11_P1_NBITER_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF11_P1_NBITER_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF12_P1_NBITER_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF12_P1_NBITER_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF13_P1_NBITER_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF13_P1_NBITER_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF14_P1_NBITER_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF14_P1_NBITER_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF15_P1_NBITER_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF15_P1_NBITER_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF16_P1_NBITER_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF16_P1_NBITER_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF17_P1_NBITER_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF17_P1_NBITER_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF18_P1_NBITER_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF18_P1_NBITER_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF19_P1_NBITER_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF19_P1_NBITER_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF20_P1_NBITER_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF20_P1_NBITER_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF21_P1_NBITER_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF21_P1_NBITER_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF22_P1_NBITER_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF22_P1_NBITER_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF23_P1_NBITER_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF23_P1_NBITER_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF24_P1_NBITER_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF24_P1_NBITER_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF25_P1_NBITER_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF25_P1_NBITER_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF26_P1_NBITER_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF26_P1_NBITER_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF27_P1_NBITER_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF27_P1_NBITER_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF28_P1_NBITER_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF28_P1_NBITER_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF1_P1_NBITER_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF1_P1_NBITER_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF2_P1_NBITER_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF2_P1_NBITER_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF3_P1_NBITER_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF3_P1_NBITER_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF4_P1_NBITER_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF4_P1_NBITER_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF5_P1_NBITER_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF5_P1_NBITER_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF6_P1_NBITER_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF6_P1_NBITER_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF7_P1_NBITER_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF7_P1_NBITER_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF8_P1_NBITER_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF8_P1_NBITER_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF9_P1_NBITER_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF9_P1_NBITER_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF10_P1_NBITER_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF10_P1_NBITER_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF12_P1_NBITER_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF12_P1_NBITER_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF13_P1_NBITER_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF13_P1_NBITER_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF14_P1_NBITER_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF14_P1_NBITER_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF15_P1_NBITER_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF15_P1_NBITER_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF16_P1_NBITER_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF16_P1_NBITER_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF18_P1_NBITER_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF18_P1_NBITER_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF19_P1_NBITER_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF19_P1_NBITER_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF20_P1_NBITER_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF20_P1_NBITER_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF21_P1_NBITER_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF21_P1_NBITER_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF22_P1_NBITER_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF22_P1_NBITER_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF24_P1_NBITER_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF24_P1_NBITER_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF25_P1_NBITER_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF25_P1_NBITER_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF26_P1_NBITER_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF26_P1_NBITER_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF27_P1_NBITER_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF27_P1_NBITER_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR6_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR6_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR5_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR5_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR4_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR4_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR3_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR3_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR2_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR2_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR1_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR1_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR0_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR0_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_DIFFDIV (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_DIFFDIV)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_DIFFDIV_DIFFERENCE_DIV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_DIFFDIV*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_DIFFDIV_DIFFERENCE_DIV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV_THRESHOLD_DIV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV_THRESHOLD_DIV__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV_MASK_DIV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV_MASK_DIV__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV_ENABLE_DIV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERDIV_ENABLE_DIV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERNOERR (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERNOERR)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERNOERR_NBITER_STOP_CRITERION (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERNOERR*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITERNOERR_NBITER_STOP_CRITERION__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF1_GAINLLR_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF1_GAINLLR_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF2_GAINLLR_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF2_GAINLLR_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF3_GAINLLR_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF3_GAINLLR_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF4_GAINLLR_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF4_GAINLLR_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF5_GAINLLR_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF5_GAINLLR_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF6_GAINLLR_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF6_GAINLLR_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF7_GAINLLR_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF7_GAINLLR_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF8_GAINLLR_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF8_GAINLLR_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF9_GAINLLR_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF9_GAINLLR_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF10_GAINLLR_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF10_GAINLLR_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF11_GAINLLR_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF11_GAINLLR_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF12_GAINLLR_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF12_GAINLLR_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF13_GAINLLR_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF13_GAINLLR_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF14_GAINLLR_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF14_GAINLLR_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF15_GAINLLR_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF15_GAINLLR_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF16_GAINLLR_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF16_GAINLLR_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF17_GAINLLR_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF17_GAINLLR_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF18_GAINLLR_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF18_GAINLLR_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF19_GAINLLR_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF19_GAINLLR_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF20_GAINLLR_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF20_GAINLLR_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF21_GAINLLR_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF21_GAINLLR_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF22_GAINLLR_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF22_GAINLLR_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF23_GAINLLR_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF23_GAINLLR_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF24_GAINLLR_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF24_GAINLLR_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF25_GAINLLR_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF25_GAINLLR_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF26_GAINLLR_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF26_GAINLLR_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF27_GAINLLR_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF27_GAINLLR_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF28_GAINLLR_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF28_GAINLLR_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF1_GAINLLR_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF1_GAINLLR_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF2_GAINLLR_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF2_GAINLLR_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF3_GAINLLR_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF3_GAINLLR_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF4_GAINLLR_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF4_GAINLLR_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF5_GAINLLR_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF5_GAINLLR_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF6_GAINLLR_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF6_GAINLLR_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF7_GAINLLR_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF7_GAINLLR_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF8_GAINLLR_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF8_GAINLLR_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF9_GAINLLR_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF9_GAINLLR_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF10_GAINLLR_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF10_GAINLLR_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF12_GAINLLR_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF12_GAINLLR_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF13_GAINLLR_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF13_GAINLLR_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF14_GAINLLR_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF14_GAINLLR_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF15_GAINLLR_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF15_GAINLLR_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF16_GAINLLR_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF16_GAINLLR_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF18_GAINLLR_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF18_GAINLLR_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF19_GAINLLR_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF19_GAINLLR_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF20_GAINLLR_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF20_GAINLLR_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF21_GAINLLR_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF21_GAINLLR_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF22_GAINLLR_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF22_GAINLLR_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF24_GAINLLR_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF24_GAINLLR_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF25_GAINLLR_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF25_GAINLLR_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF26_GAINLLR_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF26_GAINLLR_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF27_GAINLLR_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF27_GAINLLR_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER1_NBCYCLETRANSFERLF (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER1_NBCYCLETRANSFERLF__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER2_NBCYCLETRANSFERLF (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER2_NBCYCLETRANSFERLF__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER3_NBCYCLETRANSFERSF (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER3_NBCYCLETRANSFERSF__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER4_NBCYCLETRANSFERSF (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_NBCYCLETRANSFER4_NBCYCLETRANSFERSF__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_FIFOBCHRESTART (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_FIFOBCHRESTART__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_SHORTMULT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_SHORTMULT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_INVLLRSIGN (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_INVLLRSIGN__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_FIFOBCHMODE (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_FIFOBCHMODE__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_BYPLDPC (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_BYPLDPC__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_BYPBCH (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_BYPBCH__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_FIFOBCHLEG (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_CFGEXT*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_CFGEXT_FIFOBCHLEG__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_ADDCYCLES (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_ADDCYCLES)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_ADDCYCLES_CONF_ADD_CYCLES (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_ADDCYCLES*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_ADDCYCLES_CONF_ADD_CYCLES__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_MODCOD (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_MODCOD)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_MODCOD_MODCOD (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_MODCOD*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_MODCOD_MODCOD__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_MODCOD_TYPESPCFG (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_MODCOD*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_MODCOD_TYPESPCFG__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_MODCOD_MODCODSPCFG (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_MODCOD*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_MODCOD_MODCODSPCFG__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GENCFG (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GENCFG)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GENCFG_LEG_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GENCFG*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GENCFG_LEG_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER6_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER6_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER5_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER5_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER4_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER4_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER3_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER3_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER2_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER2_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER1_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER1_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER0_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER0_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_NOSTREAM (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_NOSTREAM)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_NOSTREAM_NO_STREAM (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_NOSTREAM*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_NOSTREAM_NO_STREAM__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_NOSHFR (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_NOSHFR)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_NOSHFR_NO_SHORT_FRAME (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_NOSHFR*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_NOSHFR_NO_SHORT_FRAME__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF1_NB_CYCLES_TEMPO_LF (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF1_NB_CYCLES_TEMPO_LF__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF2_NB_CYCLES_TEMPO_LF (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_TEMPOLF2_NB_CYCLES_TEMPO_LF__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF1_NB_CYCLES_TEMPO_SF (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF1_NB_CYCLES_TEMPO_SF__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF2_NB_CYCLES_TEMPO_SF (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_TEMPOSF2_NB_CYCLES_TEMPO_SF__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELPATH (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELPATH)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELPATH_TEST_SEL_PATH (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELPATH*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELPATH_TEST_SEL_PATH__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELPATH_NO_SEL_PATH (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELPATH*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELPATH_NO_SEL_PATH__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_LDPCERR1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_LDPCERR1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_LDPCERR1_LDPC_ERRORS_COUNTER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_LDPCERR1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_LDPCERR1_LDPC_ERRORS_COUNTER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_LDPCERR0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_LDPCERR0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_LDPCERR0_LDPC_ERRORS_COUNTER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_LDPCERR0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_LDPCERR0_LDPC_ERRORS_COUNTER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_BCHERR (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_BCHERR)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_BCHERR_BCH_ERRORS_COUNTER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_BCHERR*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_BCHERR_BCH_ERRORS_COUNTER__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_BCHERR_ERRORFLAG (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_BCHERR*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_BCHERR_ERRORFLAG__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_BCHERR_FIFO_BCH_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_BCHERR*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_BCHERR_FIFO_BCH_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERFULL (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERFULL)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERFULL_STATUS_NB_BUFFER_FULL (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERFULL*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERFULL_STATUS_NB_BUFFER_FULL__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERUSED (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERUSED)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERUSED_STATUS_NB_BUFFER_USED (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERUSED*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_NBBUFFERUSED_STATUS_NB_BUFFER_USED__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INITMAXITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INITMAXITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INITMAXITER_INIT_MAX_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INITMAXITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INITMAXITER_INIT_MAX_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_STATUSITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_STATUSITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_STATUSITER_STATUS_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_STATUSITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_STATUSITER_STATUS_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_STATUSMAXITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_STATUSMAXITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_STATUSMAXITER_STATUS_MAX_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_STATUSMAXITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_STATUSMAXITER_STATUS_MAX_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBFROVERFLOW (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBFROVERFLOW)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBFROVERFLOW_P1_NB_FR_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBFROVERFLOW*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBFROVERFLOW_P1_NB_FR_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBFROVERFLOW (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBFROVERFLOW)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBFROVERFLOW_P2_NB_FR_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBFROVERFLOW*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBFROVERFLOW_P2_NB_FR_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBFROVERFLOW (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBFROVERFLOW)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBFROVERFLOW_P3_NB_FR_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBFROVERFLOW*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBFROVERFLOW_P3_NB_FR_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBFROVERFLOW (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBFROVERFLOW)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBFROVERFLOW_P4_NB_FR_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBFROVERFLOW*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBFROVERFLOW_P4_NB_FR_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBFROVERFLOW (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBFROVERFLOW)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBFROVERFLOW_P5_NB_FR_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBFROVERFLOW*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBFROVERFLOW_P5_NB_FR_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBFROVERFLOW (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBFROVERFLOW)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBFROVERFLOW_P6_NB_FR_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBFROVERFLOW*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBFROVERFLOW_P6_NB_FR_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBFROVERFLOW (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBFROVERFLOW)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBFROVERFLOW_P7_NB_FR_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBFROVERFLOW*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBFROVERFLOW_P7_NB_FR_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBFROVERFLOW (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBFROVERFLOW)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBFROVERFLOW_P8_NB_FR_OVERFLOW (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBFROVERFLOW*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBFROVERFLOW_P8_NB_FR_OVERFLOW__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBFR_CHECK (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBFR_CHECK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBFR_CHECK_P1_NB_FR_CHECK (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBFR_CHECK*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBFR_CHECK_P1_NB_FR_CHECK__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBFR_CHECK (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBFR_CHECK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBFR_CHECK_P2_NB_FR_CHECK (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBFR_CHECK*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBFR_CHECK_P2_NB_FR_CHECK__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBFR_CHECK (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBFR_CHECK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBFR_CHECK_P3_NB_FR_CHECK (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBFR_CHECK*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBFR_CHECK_P3_NB_FR_CHECK__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBFR_CHECK (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBFR_CHECK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBFR_CHECK_P4_NB_FR_CHECK (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBFR_CHECK*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBFR_CHECK_P4_NB_FR_CHECK__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBFR_CHECK (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBFR_CHECK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBFR_CHECK_P5_NB_FR_CHECK (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBFR_CHECK*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBFR_CHECK_P5_NB_FR_CHECK__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBFR_CHECK (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBFR_CHECK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBFR_CHECK_P6_NB_FR_CHECK (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBFR_CHECK*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBFR_CHECK_P6_NB_FR_CHECK__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBFR_CHECK (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBFR_CHECK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBFR_CHECK_P7_NB_FR_CHECK (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBFR_CHECK*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBFR_CHECK_P7_NB_FR_CHECK__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBFR_CHECK (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBFR_CHECK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBFR_CHECK_P8_NB_FR_CHECK (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBFR_CHECK*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBFR_CHECK_P8_NB_FR_CHECK__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_CONTROLLDPC (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_CONTROLLDPC)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_CONTROLLDPC_MODE_EXTRA_ITER_COMM (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_CONTROLLDPC*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_CONTROLLDPC_MODE_EXTRA_ITER_COMM__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_MODEEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_MODEEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_MODEEXTRAITER_MODE_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_MODEEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_MODEEXTRAITER_MODE_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_MODEFRACT (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_MODEFRACT)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_MODEFRACT_MODE_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_MODEFRACT*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_MODEFRACT_MODE_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELLAYER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELLAYER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELLAYER_SEL_LAYER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELLAYER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELLAYER_SEL_LAYER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_MAXEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_MAXEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_MAXEXTRAITER_P1_MAX_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_MAXEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_MAXEXTRAITER_P1_MAX_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_LGTHSTOPITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_LGTHSTOPITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_LGTHSTOPITER_P1_LENGTH_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_LGTHSTOPITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_LGTHSTOPITER_P1_LENGTH_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBLAYERSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBLAYERSTOP)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBLAYERSTOP_P1_NB_LAYER_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBLAYERSTOP*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBLAYERSTOP_P1_NB_LAYER_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_THSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_THSTOP)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_FRACTSET (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_FRACTSET)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_FRACTSET_P1_NB_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_FRACTSET_P1_NB_ITER_FRACT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_FRACTSET_P1_MAX_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_FRACTSET_P1_MAX_ITER_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_MAXEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_MAXEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_MAXEXTRAITER_P2_MAX_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_MAXEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_MAXEXTRAITER_P2_MAX_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_LGTHSTOPITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_LGTHSTOPITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_LGTHSTOPITER_P2_LENGTH_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_LGTHSTOPITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_LGTHSTOPITER_P2_LENGTH_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBLAYERSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBLAYERSTOP)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBLAYERSTOP_P2_NB_LAYER_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBLAYERSTOP*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBLAYERSTOP_P2_NB_LAYER_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_THSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_THSTOP)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_FRACTSET (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_FRACTSET)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_FRACTSET_P2_NB_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_FRACTSET_P2_NB_ITER_FRACT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_FRACTSET_P2_MAX_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_FRACTSET_P2_MAX_ITER_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_MAXEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_MAXEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_MAXEXTRAITER_P3_MAX_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_MAXEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_MAXEXTRAITER_P3_MAX_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_LGTHSTOPITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_LGTHSTOPITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_LGTHSTOPITER_P3_LENGTH_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_LGTHSTOPITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_LGTHSTOPITER_P3_LENGTH_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBLAYERSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBLAYERSTOP)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBLAYERSTOP_P3_NB_LAYER_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBLAYERSTOP*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBLAYERSTOP_P3_NB_LAYER_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_THSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_THSTOP)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_FRACTSET (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_FRACTSET)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_FRACTSET_P3_NB_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_FRACTSET_P3_NB_ITER_FRACT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_FRACTSET_P3_MAX_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_FRACTSET_P3_MAX_ITER_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_MAXEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_MAXEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_MAXEXTRAITER_P4_MAX_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_MAXEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_MAXEXTRAITER_P4_MAX_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_LGTHSTOPITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_LGTHSTOPITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_LGTHSTOPITER_P4_LENGTH_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_LGTHSTOPITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_LGTHSTOPITER_P4_LENGTH_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBLAYERSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBLAYERSTOP)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBLAYERSTOP_P4_NB_LAYER_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBLAYERSTOP*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBLAYERSTOP_P4_NB_LAYER_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_THSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_THSTOP)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_FRACTSET (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_FRACTSET)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_FRACTSET_P4_NB_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_FRACTSET_P4_NB_ITER_FRACT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_FRACTSET_P4_MAX_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_FRACTSET_P4_MAX_ITER_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_MAXEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_MAXEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_MAXEXTRAITER_P5_MAX_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_MAXEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_MAXEXTRAITER_P5_MAX_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_LGTHSTOPITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_LGTHSTOPITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_LGTHSTOPITER_P5_LENGTH_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_LGTHSTOPITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_LGTHSTOPITER_P5_LENGTH_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBLAYERSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBLAYERSTOP)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBLAYERSTOP_P5_NB_LAYER_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBLAYERSTOP*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBLAYERSTOP_P5_NB_LAYER_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_THSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_THSTOP)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_FRACTSET (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_FRACTSET)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_FRACTSET_P5_NB_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_FRACTSET_P5_NB_ITER_FRACT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_FRACTSET_P5_MAX_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_FRACTSET_P5_MAX_ITER_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_MAXEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_MAXEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_MAXEXTRAITER_P6_MAX_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_MAXEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_MAXEXTRAITER_P6_MAX_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_LGTHSTOPITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_LGTHSTOPITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_LGTHSTOPITER_P6_LENGTH_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_LGTHSTOPITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_LGTHSTOPITER_P6_LENGTH_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBLAYERSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBLAYERSTOP)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBLAYERSTOP_P6_NB_LAYER_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBLAYERSTOP*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBLAYERSTOP_P6_NB_LAYER_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_THSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_THSTOP)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_FRACTSET (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_FRACTSET)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_FRACTSET_P6_NB_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_FRACTSET_P6_NB_ITER_FRACT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_FRACTSET_P6_MAX_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_FRACTSET_P6_MAX_ITER_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_MAXEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_MAXEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_MAXEXTRAITER_P7_MAX_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_MAXEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_MAXEXTRAITER_P7_MAX_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_LGTHSTOPITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_LGTHSTOPITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_LGTHSTOPITER_P7_LENGTH_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_LGTHSTOPITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_LGTHSTOPITER_P7_LENGTH_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBLAYERSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBLAYERSTOP)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBLAYERSTOP_P7_NB_LAYER_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBLAYERSTOP*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBLAYERSTOP_P7_NB_LAYER_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_THSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_THSTOP)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_FRACTSET (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_FRACTSET)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_FRACTSET_P7_NB_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_FRACTSET_P7_NB_ITER_FRACT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_FRACTSET_P7_MAX_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_FRACTSET_P7_MAX_ITER_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_MAXEXTRAITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_MAXEXTRAITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_MAXEXTRAITER_P8_MAX_EXTRA_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_MAXEXTRAITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_MAXEXTRAITER_P8_MAX_EXTRA_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_LGTHSTOPITER (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_LGTHSTOPITER)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_LGTHSTOPITER_P8_LENGTH_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_LGTHSTOPITER*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_LGTHSTOPITER_P8_LENGTH_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBLAYERSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBLAYERSTOP)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBLAYERSTOP_P8_NB_LAYER_STOP_ITER (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBLAYERSTOP*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBLAYERSTOP_P8_NB_LAYER_STOP_ITER__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_THSTOP (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_THSTOP)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_FRACTSET (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_FRACTSET)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_FRACTSET_P8_NB_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_FRACTSET_P8_NB_ITER_FRACT__MASK)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_FRACTSET_P8_MAX_ITER_FRACT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_FRACTSET*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_FRACTSET_P8_MAX_ITER_FRACT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF1_P2_NBITER_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF1_P2_NBITER_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF2_P2_NBITER_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF2_P2_NBITER_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF3_P2_NBITER_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF3_P2_NBITER_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF4_P2_NBITER_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF4_P2_NBITER_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF5_P2_NBITER_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF5_P2_NBITER_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF6_P2_NBITER_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF6_P2_NBITER_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF7_P2_NBITER_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF7_P2_NBITER_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF8_P2_NBITER_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF8_P2_NBITER_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF9_P2_NBITER_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF9_P2_NBITER_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF10_P2_NBITER_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF10_P2_NBITER_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF11_P2_NBITER_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF11_P2_NBITER_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF12_P2_NBITER_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF12_P2_NBITER_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF13_P2_NBITER_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF13_P2_NBITER_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF14_P2_NBITER_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF14_P2_NBITER_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF15_P2_NBITER_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF15_P2_NBITER_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF16_P2_NBITER_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF16_P2_NBITER_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF17_P2_NBITER_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF17_P2_NBITER_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF18_P2_NBITER_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF18_P2_NBITER_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF19_P2_NBITER_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF19_P2_NBITER_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF20_P2_NBITER_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF20_P2_NBITER_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF21_P2_NBITER_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF21_P2_NBITER_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF22_P2_NBITER_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF22_P2_NBITER_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF23_P2_NBITER_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF23_P2_NBITER_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF24_P2_NBITER_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF24_P2_NBITER_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF25_P2_NBITER_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF25_P2_NBITER_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF26_P2_NBITER_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF26_P2_NBITER_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF27_P2_NBITER_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF27_P2_NBITER_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF28_P2_NBITER_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF28_P2_NBITER_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF1_P2_NBITER_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF1_P2_NBITER_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF2_P2_NBITER_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF2_P2_NBITER_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF3_P2_NBITER_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF3_P2_NBITER_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF4_P2_NBITER_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF4_P2_NBITER_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF5_P2_NBITER_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF5_P2_NBITER_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF6_P2_NBITER_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF6_P2_NBITER_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF7_P2_NBITER_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF7_P2_NBITER_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF8_P2_NBITER_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF8_P2_NBITER_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF9_P2_NBITER_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF9_P2_NBITER_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF10_P2_NBITER_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF10_P2_NBITER_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF12_P2_NBITER_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF12_P2_NBITER_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF13_P2_NBITER_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF13_P2_NBITER_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF14_P2_NBITER_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF14_P2_NBITER_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF15_P2_NBITER_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF15_P2_NBITER_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF16_P2_NBITER_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF16_P2_NBITER_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF18_P2_NBITER_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF18_P2_NBITER_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF19_P2_NBITER_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF19_P2_NBITER_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF20_P2_NBITER_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF20_P2_NBITER_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF21_P2_NBITER_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF21_P2_NBITER_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF22_P2_NBITER_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF22_P2_NBITER_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF24_P2_NBITER_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF24_P2_NBITER_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF25_P2_NBITER_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF25_P2_NBITER_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF26_P2_NBITER_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF26_P2_NBITER_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF27_P2_NBITER_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF27_P2_NBITER_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF1_P3_NBITER_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF1_P3_NBITER_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF2_P3_NBITER_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF2_P3_NBITER_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF3_P3_NBITER_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF3_P3_NBITER_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF4_P3_NBITER_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF4_P3_NBITER_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF5_P3_NBITER_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF5_P3_NBITER_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF6_P3_NBITER_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF6_P3_NBITER_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF7_P3_NBITER_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF7_P3_NBITER_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF8_P3_NBITER_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF8_P3_NBITER_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF9_P3_NBITER_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF9_P3_NBITER_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF10_P3_NBITER_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF10_P3_NBITER_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF11_P3_NBITER_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF11_P3_NBITER_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF12_P3_NBITER_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF12_P3_NBITER_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF13_P3_NBITER_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF13_P3_NBITER_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF14_P3_NBITER_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF14_P3_NBITER_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF15_P3_NBITER_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF15_P3_NBITER_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF16_P3_NBITER_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF16_P3_NBITER_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF17_P3_NBITER_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF17_P3_NBITER_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF18_P3_NBITER_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF18_P3_NBITER_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF19_P3_NBITER_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF19_P3_NBITER_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF20_P3_NBITER_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF20_P3_NBITER_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF21_P3_NBITER_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF21_P3_NBITER_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF22_P3_NBITER_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF22_P3_NBITER_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF23_P3_NBITER_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF23_P3_NBITER_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF24_P3_NBITER_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF24_P3_NBITER_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF25_P3_NBITER_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF25_P3_NBITER_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF26_P3_NBITER_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF26_P3_NBITER_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF27_P3_NBITER_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF27_P3_NBITER_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF28_P3_NBITER_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF28_P3_NBITER_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF1_P3_NBITER_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF1_P3_NBITER_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF2_P3_NBITER_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF2_P3_NBITER_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF3_P3_NBITER_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF3_P3_NBITER_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF4_P3_NBITER_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF4_P3_NBITER_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF5_P3_NBITER_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF5_P3_NBITER_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF6_P3_NBITER_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF6_P3_NBITER_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF7_P3_NBITER_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF7_P3_NBITER_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF8_P3_NBITER_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF8_P3_NBITER_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF9_P3_NBITER_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF9_P3_NBITER_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF10_P3_NBITER_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF10_P3_NBITER_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF12_P3_NBITER_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF12_P3_NBITER_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF13_P3_NBITER_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF13_P3_NBITER_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF14_P3_NBITER_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF14_P3_NBITER_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF15_P3_NBITER_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF15_P3_NBITER_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF16_P3_NBITER_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF16_P3_NBITER_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF18_P3_NBITER_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF18_P3_NBITER_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF19_P3_NBITER_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF19_P3_NBITER_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF20_P3_NBITER_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF20_P3_NBITER_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF21_P3_NBITER_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF21_P3_NBITER_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF22_P3_NBITER_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF22_P3_NBITER_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF24_P3_NBITER_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF24_P3_NBITER_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF25_P3_NBITER_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF25_P3_NBITER_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF26_P3_NBITER_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF26_P3_NBITER_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF27_P3_NBITER_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF27_P3_NBITER_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF1_P4_NBITER_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF1_P4_NBITER_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF2_P4_NBITER_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF2_P4_NBITER_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF3_P4_NBITER_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF3_P4_NBITER_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF4_P4_NBITER_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF4_P4_NBITER_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF5_P4_NBITER_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF5_P4_NBITER_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF6_P4_NBITER_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF6_P4_NBITER_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF7_P4_NBITER_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF7_P4_NBITER_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF8_P4_NBITER_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF8_P4_NBITER_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF9_P4_NBITER_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF9_P4_NBITER_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF10_P4_NBITER_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF10_P4_NBITER_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF11_P4_NBITER_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF11_P4_NBITER_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF12_P4_NBITER_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF12_P4_NBITER_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF13_P4_NBITER_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF13_P4_NBITER_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF14_P4_NBITER_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF14_P4_NBITER_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF15_P4_NBITER_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF15_P4_NBITER_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF16_P4_NBITER_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF16_P4_NBITER_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF17_P4_NBITER_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF17_P4_NBITER_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF18_P4_NBITER_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF18_P4_NBITER_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF19_P4_NBITER_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF19_P4_NBITER_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF20_P4_NBITER_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF20_P4_NBITER_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF21_P4_NBITER_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF21_P4_NBITER_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF22_P4_NBITER_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF22_P4_NBITER_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF23_P4_NBITER_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF23_P4_NBITER_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF24_P4_NBITER_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF24_P4_NBITER_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF25_P4_NBITER_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF25_P4_NBITER_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF26_P4_NBITER_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF26_P4_NBITER_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF27_P4_NBITER_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF27_P4_NBITER_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF28_P4_NBITER_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF28_P4_NBITER_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF1_P4_NBITER_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF1_P4_NBITER_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF2_P4_NBITER_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF2_P4_NBITER_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF3_P4_NBITER_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF3_P4_NBITER_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF4_P4_NBITER_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF4_P4_NBITER_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF5_P4_NBITER_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF5_P4_NBITER_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF6_P4_NBITER_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF6_P4_NBITER_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF7_P4_NBITER_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF7_P4_NBITER_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF8_P4_NBITER_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF8_P4_NBITER_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF9_P4_NBITER_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF9_P4_NBITER_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF10_P4_NBITER_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF10_P4_NBITER_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF12_P4_NBITER_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF12_P4_NBITER_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF13_P4_NBITER_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF13_P4_NBITER_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF14_P4_NBITER_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF14_P4_NBITER_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF15_P4_NBITER_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF15_P4_NBITER_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF16_P4_NBITER_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF16_P4_NBITER_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF18_P4_NBITER_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF18_P4_NBITER_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF19_P4_NBITER_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF19_P4_NBITER_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF20_P4_NBITER_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF20_P4_NBITER_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF21_P4_NBITER_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF21_P4_NBITER_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF22_P4_NBITER_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF22_P4_NBITER_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF24_P4_NBITER_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF24_P4_NBITER_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF25_P4_NBITER_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF25_P4_NBITER_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF26_P4_NBITER_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF26_P4_NBITER_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF27_P4_NBITER_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF27_P4_NBITER_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF1_P5_NBITER_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF1_P5_NBITER_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF2_P5_NBITER_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF2_P5_NBITER_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF3_P5_NBITER_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF3_P5_NBITER_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF4_P5_NBITER_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF4_P5_NBITER_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF5_P5_NBITER_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF5_P5_NBITER_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF6_P5_NBITER_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF6_P5_NBITER_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF7_P5_NBITER_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF7_P5_NBITER_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF8_P5_NBITER_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF8_P5_NBITER_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF9_P5_NBITER_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF9_P5_NBITER_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF10_P5_NBITER_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF10_P5_NBITER_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF11_P5_NBITER_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF11_P5_NBITER_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF12_P5_NBITER_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF12_P5_NBITER_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF13_P5_NBITER_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF13_P5_NBITER_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF14_P5_NBITER_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF14_P5_NBITER_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF15_P5_NBITER_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF15_P5_NBITER_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF16_P5_NBITER_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF16_P5_NBITER_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF17_P5_NBITER_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF17_P5_NBITER_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF18_P5_NBITER_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF18_P5_NBITER_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF19_P5_NBITER_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF19_P5_NBITER_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF20_P5_NBITER_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF20_P5_NBITER_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF21_P5_NBITER_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF21_P5_NBITER_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF22_P5_NBITER_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF22_P5_NBITER_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF23_P5_NBITER_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF23_P5_NBITER_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF24_P5_NBITER_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF24_P5_NBITER_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF25_P5_NBITER_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF25_P5_NBITER_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF26_P5_NBITER_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF26_P5_NBITER_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF27_P5_NBITER_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF27_P5_NBITER_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF28_P5_NBITER_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF28_P5_NBITER_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF1_P5_NBITER_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF1_P5_NBITER_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF2_P5_NBITER_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF2_P5_NBITER_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF3_P5_NBITER_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF3_P5_NBITER_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF4_P5_NBITER_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF4_P5_NBITER_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF5_P5_NBITER_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF5_P5_NBITER_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF6_P5_NBITER_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF6_P5_NBITER_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF7_P5_NBITER_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF7_P5_NBITER_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF8_P5_NBITER_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF8_P5_NBITER_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF9_P5_NBITER_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF9_P5_NBITER_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF10_P5_NBITER_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF10_P5_NBITER_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF12_P5_NBITER_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF12_P5_NBITER_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF13_P5_NBITER_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF13_P5_NBITER_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF14_P5_NBITER_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF14_P5_NBITER_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF15_P5_NBITER_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF15_P5_NBITER_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF16_P5_NBITER_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF16_P5_NBITER_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF18_P5_NBITER_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF18_P5_NBITER_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF19_P5_NBITER_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF19_P5_NBITER_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF20_P5_NBITER_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF20_P5_NBITER_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF21_P5_NBITER_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF21_P5_NBITER_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF22_P5_NBITER_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF22_P5_NBITER_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF24_P5_NBITER_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF24_P5_NBITER_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF25_P5_NBITER_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF25_P5_NBITER_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF26_P5_NBITER_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF26_P5_NBITER_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF27_P5_NBITER_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF27_P5_NBITER_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF1_P6_NBITER_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF1_P6_NBITER_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF2_P6_NBITER_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF2_P6_NBITER_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF3_P6_NBITER_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF3_P6_NBITER_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF4_P6_NBITER_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF4_P6_NBITER_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF5_P6_NBITER_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF5_P6_NBITER_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF6_P6_NBITER_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF6_P6_NBITER_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF7_P6_NBITER_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF7_P6_NBITER_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF8_P6_NBITER_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF8_P6_NBITER_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF9_P6_NBITER_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF9_P6_NBITER_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF10_P6_NBITER_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF10_P6_NBITER_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF11_P6_NBITER_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF11_P6_NBITER_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF12_P6_NBITER_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF12_P6_NBITER_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF13_P6_NBITER_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF13_P6_NBITER_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF14_P6_NBITER_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF14_P6_NBITER_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF15_P6_NBITER_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF15_P6_NBITER_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF16_P6_NBITER_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF16_P6_NBITER_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF17_P6_NBITER_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF17_P6_NBITER_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF18_P6_NBITER_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF18_P6_NBITER_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF19_P6_NBITER_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF19_P6_NBITER_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF20_P6_NBITER_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF20_P6_NBITER_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF21_P6_NBITER_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF21_P6_NBITER_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF22_P6_NBITER_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF22_P6_NBITER_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF23_P6_NBITER_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF23_P6_NBITER_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF24_P6_NBITER_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF24_P6_NBITER_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF25_P6_NBITER_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF25_P6_NBITER_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF26_P6_NBITER_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF26_P6_NBITER_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF27_P6_NBITER_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF27_P6_NBITER_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF28_P6_NBITER_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF28_P6_NBITER_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF1_P6_NBITER_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF1_P6_NBITER_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF2_P6_NBITER_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF2_P6_NBITER_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF3_P6_NBITER_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF3_P6_NBITER_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF4_P6_NBITER_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF4_P6_NBITER_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF5_P6_NBITER_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF5_P6_NBITER_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF6_P6_NBITER_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF6_P6_NBITER_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF7_P6_NBITER_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF7_P6_NBITER_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF8_P6_NBITER_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF8_P6_NBITER_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF9_P6_NBITER_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF9_P6_NBITER_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF10_P6_NBITER_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF10_P6_NBITER_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF12_P6_NBITER_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF12_P6_NBITER_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF13_P6_NBITER_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF13_P6_NBITER_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF14_P6_NBITER_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF14_P6_NBITER_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF15_P6_NBITER_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF15_P6_NBITER_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF16_P6_NBITER_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF16_P6_NBITER_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF18_P6_NBITER_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF18_P6_NBITER_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF19_P6_NBITER_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF19_P6_NBITER_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF20_P6_NBITER_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF20_P6_NBITER_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF21_P6_NBITER_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF21_P6_NBITER_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF22_P6_NBITER_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF22_P6_NBITER_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF24_P6_NBITER_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF24_P6_NBITER_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF25_P6_NBITER_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF25_P6_NBITER_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF26_P6_NBITER_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF26_P6_NBITER_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF27_P6_NBITER_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF27_P6_NBITER_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF1_P7_NBITER_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF1_P7_NBITER_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF2_P7_NBITER_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF2_P7_NBITER_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF3_P7_NBITER_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF3_P7_NBITER_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF4_P7_NBITER_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF4_P7_NBITER_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF5_P7_NBITER_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF5_P7_NBITER_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF6_P7_NBITER_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF6_P7_NBITER_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF7_P7_NBITER_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF7_P7_NBITER_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF8_P7_NBITER_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF8_P7_NBITER_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF9_P7_NBITER_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF9_P7_NBITER_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF10_P7_NBITER_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF10_P7_NBITER_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF11_P7_NBITER_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF11_P7_NBITER_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF12_P7_NBITER_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF12_P7_NBITER_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF13_P7_NBITER_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF13_P7_NBITER_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF14_P7_NBITER_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF14_P7_NBITER_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF15_P7_NBITER_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF15_P7_NBITER_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF16_P7_NBITER_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF16_P7_NBITER_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF17_P7_NBITER_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF17_P7_NBITER_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF18_P7_NBITER_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF18_P7_NBITER_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF19_P7_NBITER_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF19_P7_NBITER_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF20_P7_NBITER_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF20_P7_NBITER_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF21_P7_NBITER_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF21_P7_NBITER_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF22_P7_NBITER_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF22_P7_NBITER_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF23_P7_NBITER_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF23_P7_NBITER_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF24_P7_NBITER_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF24_P7_NBITER_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF25_P7_NBITER_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF25_P7_NBITER_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF26_P7_NBITER_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF26_P7_NBITER_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF27_P7_NBITER_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF27_P7_NBITER_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF28_P7_NBITER_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF28_P7_NBITER_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF1_P7_NBITER_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF1_P7_NBITER_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF2_P7_NBITER_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF2_P7_NBITER_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF3_P7_NBITER_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF3_P7_NBITER_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF4_P7_NBITER_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF4_P7_NBITER_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF5_P7_NBITER_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF5_P7_NBITER_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF6_P7_NBITER_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF6_P7_NBITER_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF7_P7_NBITER_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF7_P7_NBITER_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF8_P7_NBITER_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF8_P7_NBITER_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF9_P7_NBITER_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF9_P7_NBITER_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF10_P7_NBITER_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF10_P7_NBITER_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF12_P7_NBITER_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF12_P7_NBITER_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF13_P7_NBITER_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF13_P7_NBITER_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF14_P7_NBITER_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF14_P7_NBITER_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF15_P7_NBITER_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF15_P7_NBITER_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF16_P7_NBITER_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF16_P7_NBITER_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF18_P7_NBITER_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF18_P7_NBITER_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF19_P7_NBITER_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF19_P7_NBITER_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF20_P7_NBITER_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF20_P7_NBITER_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF21_P7_NBITER_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF21_P7_NBITER_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF22_P7_NBITER_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF22_P7_NBITER_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF24_P7_NBITER_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF24_P7_NBITER_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF25_P7_NBITER_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF25_P7_NBITER_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF26_P7_NBITER_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF26_P7_NBITER_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF27_P7_NBITER_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF27_P7_NBITER_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF1_P8_NBITER_NF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF1_P8_NBITER_NF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF2_P8_NBITER_NF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF2_P8_NBITER_NF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF3_P8_NBITER_NF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF3_P8_NBITER_NF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF4_P8_NBITER_NF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF4_P8_NBITER_NF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF5_P8_NBITER_NF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF5_P8_NBITER_NF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF6_P8_NBITER_NF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF6_P8_NBITER_NF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF7_P8_NBITER_NF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF7_P8_NBITER_NF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF8_P8_NBITER_NF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF8_P8_NBITER_NF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF9_P8_NBITER_NF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF9_P8_NBITER_NF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF10_P8_NBITER_NF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF10_P8_NBITER_NF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF11_P8_NBITER_NF_QPSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF11_P8_NBITER_NF_QPSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF12_P8_NBITER_NF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF12_P8_NBITER_NF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF13_P8_NBITER_NF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF13_P8_NBITER_NF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF14_P8_NBITER_NF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF14_P8_NBITER_NF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF15_P8_NBITER_NF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF15_P8_NBITER_NF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF16_P8_NBITER_NF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF16_P8_NBITER_NF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF17 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF17)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF17_P8_NBITER_NF_8PSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF17*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF17_P8_NBITER_NF_8PSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF18_P8_NBITER_NF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF18_P8_NBITER_NF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF19_P8_NBITER_NF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF19_P8_NBITER_NF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF20_P8_NBITER_NF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF20_P8_NBITER_NF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF21_P8_NBITER_NF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF21_P8_NBITER_NF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF22_P8_NBITER_NF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF22_P8_NBITER_NF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF23 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF23)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF23_P8_NBITER_NF_16APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF23*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF23_P8_NBITER_NF_16APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF24_P8_NBITER_NF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF24_P8_NBITER_NF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF25_P8_NBITER_NF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF25_P8_NBITER_NF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF26_P8_NBITER_NF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF26_P8_NBITER_NF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF27_P8_NBITER_NF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF27_P8_NBITER_NF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF28 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF28)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF28_P8_NBITER_NF_32APSK_9_10 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF28*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF28_P8_NBITER_NF_32APSK_9_10__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF1_P8_NBITER_SF_QPSK_1_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF1_P8_NBITER_SF_QPSK_1_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF2 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF2)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF2_P8_NBITER_SF_QPSK_1_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF2*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF2_P8_NBITER_SF_QPSK_1_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF3 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF3)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF3_P8_NBITER_SF_QPSK_2_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF3*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF3_P8_NBITER_SF_QPSK_2_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF4 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF4)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF4_P8_NBITER_SF_QPSK_1_2 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF4*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF4_P8_NBITER_SF_QPSK_1_2__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF5 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF5)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF5_P8_NBITER_SF_QPSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF5*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF5_P8_NBITER_SF_QPSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF6 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF6)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF6_P8_NBITER_SF_QPSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF6*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF6_P8_NBITER_SF_QPSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF7_P8_NBITER_SF_QPSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF7_P8_NBITER_SF_QPSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF8_P8_NBITER_SF_QPSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF8_P8_NBITER_SF_QPSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF9_P8_NBITER_SF_QPSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF9_P8_NBITER_SF_QPSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF10_P8_NBITER_SF_QPSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF10_P8_NBITER_SF_QPSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF12_P8_NBITER_SF_8PSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF12_P8_NBITER_SF_8PSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF13_P8_NBITER_SF_8PSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF13_P8_NBITER_SF_8PSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF14 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF14)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF14_P8_NBITER_SF_8PSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF14*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF14_P8_NBITER_SF_8PSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF15 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF15)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF15_P8_NBITER_SF_8PSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF15*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF15_P8_NBITER_SF_8PSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF16 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF16)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF16_P8_NBITER_SF_8PSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF16*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF16_P8_NBITER_SF_8PSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF18 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF18)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF18_P8_NBITER_SF_16APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF18*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF18_P8_NBITER_SF_16APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF19 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF19)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF19_P8_NBITER_SF_16APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF19*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF19_P8_NBITER_SF_16APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF20 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF20)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF20_P8_NBITER_SF_16APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF20*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF20_P8_NBITER_SF_16APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF21 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF21)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF21_P8_NBITER_SF_16APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF21*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF21_P8_NBITER_SF_16APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF22 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF22)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF22_P8_NBITER_SF_16APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF22*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF22_P8_NBITER_SF_16APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF24 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF24)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF24_P8_NBITER_SF_32APSK_3_4 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF24*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF24_P8_NBITER_SF_32APSK_3_4__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF25 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF25)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF25_P8_NBITER_SF_32APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF25*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF25_P8_NBITER_SF_32APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF26 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF26)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF26_P8_NBITER_SF_32APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF26*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF26_P8_NBITER_SF_32APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF27 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF27)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF27_P8_NBITER_SF_32APSK_8_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF27*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF27_P8_NBITER_SF_32APSK_8_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_0_P1_NBITER_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_0_P1_NBITER_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_1_P1_NBITER_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF33_1_P1_NBITER_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_0_P1_NBITER_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_0_P1_NBITER_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_1_P1_NBITER_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF34_1_P1_NBITER_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_0_P1_NBITER_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_0_P1_NBITER_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_1_P1_NBITER_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF35_1_P1_NBITER_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_0_P1_NBITER_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_0_P1_NBITER_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_1_P1_NBITER_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF36_1_P1_NBITER_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_0_P1_NBITER_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_0_P1_NBITER_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_1_P1_NBITER_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF37_1_P1_NBITER_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_0_P1_NBITER_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_0_P1_NBITER_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_1_P1_NBITER_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF38_1_P1_NBITER_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_0_P1_NBITER_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_0_P1_NBITER_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_1_P1_NBITER_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF39_1_P1_NBITER_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_0_P1_NBITER_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_0_P1_NBITER_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_1_P1_NBITER_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF40_1_P1_NBITER_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_0_P1_NBITER_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_0_P1_NBITER_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_1_P1_NBITER_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF41_1_P1_NBITER_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_0_P1_NBITER_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_0_P1_NBITER_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_1_P1_NBITER_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF42_1_P1_NBITER_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_0_P1_NBITER_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_0_P1_NBITER_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_1_P1_NBITER_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF43_1_P1_NBITER_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF44_1_P1_NBITER_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF44_1_P1_NBITER_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_0_P1_NBITER_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_0_P1_NBITER_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_1_P1_NBITER_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF45_1_P1_NBITER_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_0_P1_NBITER_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_0_P1_NBITER_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_1_P1_NBITER_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF46_1_P1_NBITER_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF47_1_P1_NBITER_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF47_1_P1_NBITER_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF48_1_P1_NBITER_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF48_1_P1_NBITER_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF49_1_P1_NBITER_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF49_1_P1_NBITER_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_0_P1_NBITER_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_0_P1_NBITER_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_1_P1_NBITER_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF50_1_P1_NBITER_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_0_P1_NBITER_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_0_P1_NBITER_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_1_P1_NBITER_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF51_1_P1_NBITER_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_0_P1_NBITER_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_0_P1_NBITER_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_1_P1_NBITER_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF52_1_P1_NBITER_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_0_P1_NBITER_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_0_P1_NBITER_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_1_P1_NBITER_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_NF53_1_P1_NBITER_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_0_P1_NBITER_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_0_P1_NBITER_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_1_P1_NBITER_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF54_1_P1_NBITER_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_0_P1_NBITER_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_0_P1_NBITER_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_1_P1_NBITER_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF55_1_P1_NBITER_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_0_P1_NBITER_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_0_P1_NBITER_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_1_P1_NBITER_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF56_1_P1_NBITER_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_0_P1_NBITER_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_0_P1_NBITER_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_1_P1_NBITER_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF57_1_P1_NBITER_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_0_P1_NBITER_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_0_P1_NBITER_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_1_P1_NBITER_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF58_1_P1_NBITER_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_0_P1_NBITER_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_0_P1_NBITER_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_1_P1_NBITER_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF59_1_P1_NBITER_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_0_P1_NBITER_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_0_P1_NBITER_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_1_P1_NBITER_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF60_1_P1_NBITER_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_0_P1_NBITER_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_0_P1_NBITER_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_1_P1_NBITER_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF61_1_P1_NBITER_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF62_0_P1_NBITER_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P1_NBITER_SF62_0_P1_NBITER_SF_32APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR13_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR13_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR12_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR12_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR11_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR11_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR10_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR10_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR9_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR9_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR8_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR8_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR7_SELSAT (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_SELSATUR7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_SELSATUR7_SELSAT__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_0_GAINLLR_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_0_GAINLLR_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_1_GAINLLR_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF33_1_GAINLLR_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_0_GAINLLR_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_0_GAINLLR_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_1_GAINLLR_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF34_1_GAINLLR_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_0_GAINLLR_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_0_GAINLLR_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_1_GAINLLR_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF35_1_GAINLLR_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_0_GAINLLR_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_0_GAINLLR_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_1_GAINLLR_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF36_1_GAINLLR_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_0_GAINLLR_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_0_GAINLLR_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_1_GAINLLR_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF37_1_GAINLLR_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_0_GAINLLR_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_0_GAINLLR_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_1_GAINLLR_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF38_1_GAINLLR_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_0_GAINLLR_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_0_GAINLLR_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_1_GAINLLR_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF39_1_GAINLLR_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_0_GAINLLR_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_0_GAINLLR_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_1_GAINLLR_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF40_1_GAINLLR_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_0_GAINLLR_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_0_GAINLLR_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_1_GAINLLR_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF41_1_GAINLLR_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_0_GAINLLR_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_0_GAINLLR_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_1_GAINLLR_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF42_1_GAINLLR_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_0_GAINLLR_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_0_GAINLLR_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_1_GAINLLR_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF43_1_GAINLLR_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF44_1_GAINLLR_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF44_1_GAINLLR_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_0_GAINLLR_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_0_GAINLLR_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_1_GAINLLR_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF45_1_GAINLLR_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_0_GAINLLR_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_0_GAINLLR_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_1_GAINLLR_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF46_1_GAINLLR_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF47_1_GAINLLR_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF47_1_GAINLLR_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF48_1_GAINLLR_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF48_1_GAINLLR_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF49_1_GAINLLR_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF49_1_GAINLLR_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_0_GAINLLR_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_0_GAINLLR_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_1_GAINLLR_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF50_1_GAINLLR_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_0_GAINLLR_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_0_GAINLLR_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_1_GAINLLR_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF51_1_GAINLLR_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_0_GAINLLR_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_0_GAINLLR_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_1_GAINLLR_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF52_1_GAINLLR_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_0_GAINLLR_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_0_GAINLLR_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_1_GAINLLR_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_NF53_1_GAINLLR_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_0_GAINLLR_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_0_GAINLLR_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_1_GAINLLR_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF54_1_GAINLLR_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_0_GAINLLR_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_0_GAINLLR_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_1_GAINLLR_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF55_1_GAINLLR_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_0_GAINLLR_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_0_GAINLLR_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_1_GAINLLR_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF56_1_GAINLLR_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_0_GAINLLR_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_0_GAINLLR_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_1_GAINLLR_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF57_1_GAINLLR_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_0_GAINLLR_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_0_GAINLLR_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_1_GAINLLR_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF58_1_GAINLLR_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_0_GAINLLR_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_0_GAINLLR_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_1_GAINLLR_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF59_1_GAINLLR_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_0_GAINLLR_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_0_GAINLLR_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_1_GAINLLR_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF60_1_GAINLLR_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_0_GAINLLR_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_0_GAINLLR_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_1_GAINLLR_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF61_1_GAINLLR_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF62_0_GAINLLR_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_GAINLLR_SF62_0_GAINLLR_SF_32APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER13 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER13)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER13_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER13*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER13_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER12 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER12)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER12_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER12*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER12_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER11 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER11)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER11_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER11*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER11_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER10 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER10)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER10_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER10*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER10_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER9 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER9)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER9_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER9*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER9_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER8 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER8)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER8_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER8*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER8_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER7 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER7)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER7_INV (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_INVDINTER7*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_INVDINTER7_INV__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_0_P2_NBITER_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_0_P2_NBITER_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_1_P2_NBITER_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF33_1_P2_NBITER_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_0_P2_NBITER_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_0_P2_NBITER_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_1_P2_NBITER_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF34_1_P2_NBITER_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_0_P2_NBITER_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_0_P2_NBITER_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_1_P2_NBITER_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF35_1_P2_NBITER_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_0_P2_NBITER_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_0_P2_NBITER_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_1_P2_NBITER_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF36_1_P2_NBITER_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_0_P2_NBITER_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_0_P2_NBITER_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_1_P2_NBITER_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF37_1_P2_NBITER_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_0_P2_NBITER_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_0_P2_NBITER_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_1_P2_NBITER_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF38_1_P2_NBITER_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_0_P2_NBITER_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_0_P2_NBITER_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_1_P2_NBITER_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF39_1_P2_NBITER_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_0_P2_NBITER_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_0_P2_NBITER_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_1_P2_NBITER_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF40_1_P2_NBITER_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_0_P2_NBITER_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_0_P2_NBITER_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_1_P2_NBITER_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF41_1_P2_NBITER_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_0_P2_NBITER_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_0_P2_NBITER_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_1_P2_NBITER_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF42_1_P2_NBITER_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_0_P2_NBITER_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_0_P2_NBITER_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_1_P2_NBITER_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF43_1_P2_NBITER_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF44_1_P2_NBITER_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF44_1_P2_NBITER_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_0_P2_NBITER_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_0_P2_NBITER_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_1_P2_NBITER_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF45_1_P2_NBITER_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_0_P2_NBITER_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_0_P2_NBITER_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_1_P2_NBITER_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF46_1_P2_NBITER_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF47_1_P2_NBITER_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF47_1_P2_NBITER_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF48_1_P2_NBITER_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF48_1_P2_NBITER_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF49_1_P2_NBITER_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF49_1_P2_NBITER_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_0_P2_NBITER_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_0_P2_NBITER_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_1_P2_NBITER_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF50_1_P2_NBITER_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_0_P2_NBITER_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_0_P2_NBITER_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_1_P2_NBITER_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF51_1_P2_NBITER_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_0_P2_NBITER_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_0_P2_NBITER_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_1_P2_NBITER_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF52_1_P2_NBITER_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_0_P2_NBITER_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_0_P2_NBITER_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_1_P2_NBITER_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_NF53_1_P2_NBITER_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_0_P2_NBITER_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_0_P2_NBITER_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_1_P2_NBITER_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF54_1_P2_NBITER_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_0_P2_NBITER_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_0_P2_NBITER_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_1_P2_NBITER_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF55_1_P2_NBITER_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_0_P2_NBITER_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_0_P2_NBITER_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_1_P2_NBITER_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF56_1_P2_NBITER_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_0_P2_NBITER_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_0_P2_NBITER_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_1_P2_NBITER_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF57_1_P2_NBITER_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_0_P2_NBITER_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_0_P2_NBITER_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_1_P2_NBITER_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF58_1_P2_NBITER_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_0_P2_NBITER_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_0_P2_NBITER_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_1_P2_NBITER_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF59_1_P2_NBITER_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_0_P2_NBITER_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_0_P2_NBITER_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_1_P2_NBITER_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF60_1_P2_NBITER_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_0_P2_NBITER_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_0_P2_NBITER_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_1_P2_NBITER_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF61_1_P2_NBITER_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF62_0_P2_NBITER_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P2_NBITER_SF62_0_P2_NBITER_SF_32APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_0_P3_NBITER_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_0_P3_NBITER_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_1_P3_NBITER_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF33_1_P3_NBITER_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_0_P3_NBITER_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_0_P3_NBITER_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_1_P3_NBITER_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF34_1_P3_NBITER_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_0_P3_NBITER_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_0_P3_NBITER_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_1_P3_NBITER_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF35_1_P3_NBITER_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_0_P3_NBITER_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_0_P3_NBITER_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_1_P3_NBITER_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF36_1_P3_NBITER_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_0_P3_NBITER_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_0_P3_NBITER_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_1_P3_NBITER_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF37_1_P3_NBITER_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_0_P3_NBITER_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_0_P3_NBITER_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_1_P3_NBITER_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF38_1_P3_NBITER_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_0_P3_NBITER_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_0_P3_NBITER_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_1_P3_NBITER_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF39_1_P3_NBITER_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_0_P3_NBITER_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_0_P3_NBITER_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_1_P3_NBITER_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF40_1_P3_NBITER_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_0_P3_NBITER_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_0_P3_NBITER_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_1_P3_NBITER_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF41_1_P3_NBITER_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_0_P3_NBITER_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_0_P3_NBITER_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_1_P3_NBITER_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF42_1_P3_NBITER_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_0_P3_NBITER_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_0_P3_NBITER_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_1_P3_NBITER_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF43_1_P3_NBITER_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF44_1_P3_NBITER_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF44_1_P3_NBITER_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_0_P3_NBITER_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_0_P3_NBITER_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_1_P3_NBITER_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF45_1_P3_NBITER_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_0_P3_NBITER_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_0_P3_NBITER_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_1_P3_NBITER_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF46_1_P3_NBITER_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF47_1_P3_NBITER_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF47_1_P3_NBITER_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF48_1_P3_NBITER_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF48_1_P3_NBITER_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF49_1_P3_NBITER_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF49_1_P3_NBITER_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_0_P3_NBITER_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_0_P3_NBITER_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_1_P3_NBITER_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF50_1_P3_NBITER_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_0_P3_NBITER_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_0_P3_NBITER_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_1_P3_NBITER_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF51_1_P3_NBITER_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_0_P3_NBITER_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_0_P3_NBITER_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_1_P3_NBITER_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF52_1_P3_NBITER_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_0_P3_NBITER_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_0_P3_NBITER_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_1_P3_NBITER_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_NF53_1_P3_NBITER_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_0_P3_NBITER_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_0_P3_NBITER_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_1_P3_NBITER_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF54_1_P3_NBITER_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_0_P3_NBITER_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_0_P3_NBITER_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_1_P3_NBITER_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF55_1_P3_NBITER_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_0_P3_NBITER_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_0_P3_NBITER_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_1_P3_NBITER_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF56_1_P3_NBITER_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_0_P3_NBITER_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_0_P3_NBITER_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_1_P3_NBITER_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF57_1_P3_NBITER_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_0_P3_NBITER_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_0_P3_NBITER_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_1_P3_NBITER_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF58_1_P3_NBITER_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_0_P3_NBITER_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_0_P3_NBITER_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_1_P3_NBITER_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF59_1_P3_NBITER_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_0_P3_NBITER_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_0_P3_NBITER_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_1_P3_NBITER_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF60_1_P3_NBITER_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_0_P3_NBITER_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_0_P3_NBITER_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_1_P3_NBITER_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF61_1_P3_NBITER_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF62_0_P3_NBITER_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P3_NBITER_SF62_0_P3_NBITER_SF_32APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_0_P4_NBITER_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_0_P4_NBITER_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_1_P4_NBITER_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF33_1_P4_NBITER_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_0_P4_NBITER_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_0_P4_NBITER_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_1_P4_NBITER_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF34_1_P4_NBITER_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_0_P4_NBITER_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_0_P4_NBITER_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_1_P4_NBITER_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF35_1_P4_NBITER_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_0_P4_NBITER_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_0_P4_NBITER_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_1_P4_NBITER_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF36_1_P4_NBITER_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_0_P4_NBITER_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_0_P4_NBITER_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_1_P4_NBITER_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF37_1_P4_NBITER_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_0_P4_NBITER_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_0_P4_NBITER_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_1_P4_NBITER_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF38_1_P4_NBITER_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_0_P4_NBITER_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_0_P4_NBITER_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_1_P4_NBITER_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF39_1_P4_NBITER_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_0_P4_NBITER_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_0_P4_NBITER_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_1_P4_NBITER_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF40_1_P4_NBITER_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_0_P4_NBITER_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_0_P4_NBITER_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_1_P4_NBITER_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF41_1_P4_NBITER_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_0_P4_NBITER_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_0_P4_NBITER_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_1_P4_NBITER_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF42_1_P4_NBITER_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_0_P4_NBITER_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_0_P4_NBITER_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_1_P4_NBITER_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF43_1_P4_NBITER_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF44_1_P4_NBITER_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF44_1_P4_NBITER_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_0_P4_NBITER_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_0_P4_NBITER_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_1_P4_NBITER_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF45_1_P4_NBITER_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_0_P4_NBITER_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_0_P4_NBITER_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_1_P4_NBITER_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF46_1_P4_NBITER_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF47_1_P4_NBITER_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF47_1_P4_NBITER_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF48_1_P4_NBITER_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF48_1_P4_NBITER_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF49_1_P4_NBITER_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF49_1_P4_NBITER_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_0_P4_NBITER_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_0_P4_NBITER_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_1_P4_NBITER_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF50_1_P4_NBITER_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_0_P4_NBITER_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_0_P4_NBITER_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_1_P4_NBITER_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF51_1_P4_NBITER_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_0_P4_NBITER_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_0_P4_NBITER_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_1_P4_NBITER_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF52_1_P4_NBITER_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_0_P4_NBITER_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_0_P4_NBITER_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_1_P4_NBITER_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_NF53_1_P4_NBITER_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_0_P4_NBITER_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_0_P4_NBITER_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_1_P4_NBITER_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF54_1_P4_NBITER_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_0_P4_NBITER_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_0_P4_NBITER_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_1_P4_NBITER_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF55_1_P4_NBITER_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_0_P4_NBITER_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_0_P4_NBITER_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_1_P4_NBITER_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF56_1_P4_NBITER_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_0_P4_NBITER_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_0_P4_NBITER_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_1_P4_NBITER_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF57_1_P4_NBITER_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_0_P4_NBITER_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_0_P4_NBITER_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_1_P4_NBITER_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF58_1_P4_NBITER_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_0_P4_NBITER_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_0_P4_NBITER_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_1_P4_NBITER_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF59_1_P4_NBITER_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_0_P4_NBITER_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_0_P4_NBITER_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_1_P4_NBITER_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF60_1_P4_NBITER_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_0_P4_NBITER_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_0_P4_NBITER_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_1_P4_NBITER_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF61_1_P4_NBITER_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF62_0_P4_NBITER_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P4_NBITER_SF62_0_P4_NBITER_SF_32APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_0_P5_NBITER_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_0_P5_NBITER_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_1_P5_NBITER_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF33_1_P5_NBITER_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_0_P5_NBITER_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_0_P5_NBITER_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_1_P5_NBITER_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF34_1_P5_NBITER_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_0_P5_NBITER_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_0_P5_NBITER_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_1_P5_NBITER_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF35_1_P5_NBITER_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_0_P5_NBITER_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_0_P5_NBITER_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_1_P5_NBITER_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF36_1_P5_NBITER_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_0_P5_NBITER_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_0_P5_NBITER_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_1_P5_NBITER_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF37_1_P5_NBITER_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_0_P5_NBITER_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_0_P5_NBITER_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_1_P5_NBITER_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF38_1_P5_NBITER_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_0_P5_NBITER_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_0_P5_NBITER_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_1_P5_NBITER_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF39_1_P5_NBITER_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_0_P5_NBITER_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_0_P5_NBITER_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_1_P5_NBITER_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF40_1_P5_NBITER_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_0_P5_NBITER_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_0_P5_NBITER_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_1_P5_NBITER_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF41_1_P5_NBITER_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_0_P5_NBITER_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_0_P5_NBITER_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_1_P5_NBITER_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF42_1_P5_NBITER_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_0_P5_NBITER_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_0_P5_NBITER_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_1_P5_NBITER_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF43_1_P5_NBITER_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF44_1_P5_NBITER_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF44_1_P5_NBITER_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_0_P5_NBITER_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_0_P5_NBITER_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_1_P5_NBITER_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF45_1_P5_NBITER_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_0_P5_NBITER_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_0_P5_NBITER_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_1_P5_NBITER_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF46_1_P5_NBITER_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF47_1_P5_NBITER_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF47_1_P5_NBITER_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF48_1_P5_NBITER_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF48_1_P5_NBITER_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF49_1_P5_NBITER_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF49_1_P5_NBITER_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_0_P5_NBITER_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_0_P5_NBITER_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_1_P5_NBITER_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF50_1_P5_NBITER_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_0_P5_NBITER_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_0_P5_NBITER_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_1_P5_NBITER_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF51_1_P5_NBITER_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_0_P5_NBITER_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_0_P5_NBITER_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_1_P5_NBITER_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF52_1_P5_NBITER_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_0_P5_NBITER_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_0_P5_NBITER_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_1_P5_NBITER_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_NF53_1_P5_NBITER_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_0_P5_NBITER_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_0_P5_NBITER_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_1_P5_NBITER_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF54_1_P5_NBITER_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_0_P5_NBITER_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_0_P5_NBITER_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_1_P5_NBITER_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF55_1_P5_NBITER_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_0_P5_NBITER_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_0_P5_NBITER_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_1_P5_NBITER_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF56_1_P5_NBITER_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_0_P5_NBITER_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_0_P5_NBITER_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_1_P5_NBITER_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF57_1_P5_NBITER_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_0_P5_NBITER_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_0_P5_NBITER_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_1_P5_NBITER_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF58_1_P5_NBITER_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_0_P5_NBITER_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_0_P5_NBITER_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_1_P5_NBITER_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF59_1_P5_NBITER_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_0_P5_NBITER_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_0_P5_NBITER_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_1_P5_NBITER_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF60_1_P5_NBITER_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_0_P5_NBITER_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_0_P5_NBITER_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_1_P5_NBITER_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF61_1_P5_NBITER_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF62_0_P5_NBITER_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P5_NBITER_SF62_0_P5_NBITER_SF_32APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_0_P6_NBITER_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_0_P6_NBITER_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_1_P6_NBITER_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF33_1_P6_NBITER_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_0_P6_NBITER_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_0_P6_NBITER_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_1_P6_NBITER_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF34_1_P6_NBITER_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_0_P6_NBITER_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_0_P6_NBITER_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_1_P6_NBITER_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF35_1_P6_NBITER_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_0_P6_NBITER_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_0_P6_NBITER_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_1_P6_NBITER_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF36_1_P6_NBITER_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_0_P6_NBITER_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_0_P6_NBITER_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_1_P6_NBITER_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF37_1_P6_NBITER_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_0_P6_NBITER_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_0_P6_NBITER_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_1_P6_NBITER_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF38_1_P6_NBITER_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_0_P6_NBITER_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_0_P6_NBITER_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_1_P6_NBITER_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF39_1_P6_NBITER_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_0_P6_NBITER_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_0_P6_NBITER_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_1_P6_NBITER_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF40_1_P6_NBITER_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_0_P6_NBITER_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_0_P6_NBITER_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_1_P6_NBITER_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF41_1_P6_NBITER_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_0_P6_NBITER_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_0_P6_NBITER_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_1_P6_NBITER_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF42_1_P6_NBITER_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_0_P6_NBITER_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_0_P6_NBITER_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_1_P6_NBITER_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF43_1_P6_NBITER_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF44_1_P6_NBITER_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF44_1_P6_NBITER_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_0_P6_NBITER_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_0_P6_NBITER_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_1_P6_NBITER_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF45_1_P6_NBITER_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_0_P6_NBITER_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_0_P6_NBITER_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_1_P6_NBITER_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF46_1_P6_NBITER_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF47_1_P6_NBITER_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF47_1_P6_NBITER_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF48_1_P6_NBITER_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF48_1_P6_NBITER_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF49_1_P6_NBITER_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF49_1_P6_NBITER_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_0_P6_NBITER_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_0_P6_NBITER_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_1_P6_NBITER_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF50_1_P6_NBITER_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_0_P6_NBITER_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_0_P6_NBITER_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_1_P6_NBITER_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF51_1_P6_NBITER_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_0_P6_NBITER_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_0_P6_NBITER_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_1_P6_NBITER_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF52_1_P6_NBITER_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_0_P6_NBITER_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_0_P6_NBITER_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_1_P6_NBITER_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_NF53_1_P6_NBITER_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_0_P6_NBITER_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_0_P6_NBITER_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_1_P6_NBITER_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF54_1_P6_NBITER_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_0_P6_NBITER_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_0_P6_NBITER_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_1_P6_NBITER_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF55_1_P6_NBITER_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_0_P6_NBITER_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_0_P6_NBITER_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_1_P6_NBITER_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF56_1_P6_NBITER_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_0_P6_NBITER_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_0_P6_NBITER_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_1_P6_NBITER_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF57_1_P6_NBITER_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_0_P6_NBITER_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_0_P6_NBITER_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_1_P6_NBITER_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF58_1_P6_NBITER_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_0_P6_NBITER_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_0_P6_NBITER_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_1_P6_NBITER_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF59_1_P6_NBITER_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_0_P6_NBITER_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_0_P6_NBITER_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_1_P6_NBITER_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF60_1_P6_NBITER_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_0_P6_NBITER_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_0_P6_NBITER_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_1_P6_NBITER_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF61_1_P6_NBITER_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF62_0_P6_NBITER_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P6_NBITER_SF62_0_P6_NBITER_SF_32APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_0_P7_NBITER_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_0_P7_NBITER_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_1_P7_NBITER_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF33_1_P7_NBITER_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_0_P7_NBITER_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_0_P7_NBITER_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_1_P7_NBITER_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF34_1_P7_NBITER_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_0_P7_NBITER_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_0_P7_NBITER_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_1_P7_NBITER_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF35_1_P7_NBITER_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_0_P7_NBITER_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_0_P7_NBITER_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_1_P7_NBITER_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF36_1_P7_NBITER_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_0_P7_NBITER_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_0_P7_NBITER_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_1_P7_NBITER_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF37_1_P7_NBITER_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_0_P7_NBITER_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_0_P7_NBITER_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_1_P7_NBITER_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF38_1_P7_NBITER_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_0_P7_NBITER_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_0_P7_NBITER_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_1_P7_NBITER_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF39_1_P7_NBITER_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_0_P7_NBITER_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_0_P7_NBITER_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_1_P7_NBITER_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF40_1_P7_NBITER_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_0_P7_NBITER_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_0_P7_NBITER_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_1_P7_NBITER_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF41_1_P7_NBITER_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_0_P7_NBITER_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_0_P7_NBITER_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_1_P7_NBITER_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF42_1_P7_NBITER_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_0_P7_NBITER_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_0_P7_NBITER_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_1_P7_NBITER_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF43_1_P7_NBITER_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF44_1_P7_NBITER_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF44_1_P7_NBITER_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_0_P7_NBITER_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_0_P7_NBITER_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_1_P7_NBITER_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF45_1_P7_NBITER_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_0_P7_NBITER_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_0_P7_NBITER_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_1_P7_NBITER_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF46_1_P7_NBITER_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF47_1_P7_NBITER_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF47_1_P7_NBITER_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF48_1_P7_NBITER_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF48_1_P7_NBITER_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF49_1_P7_NBITER_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF49_1_P7_NBITER_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_0_P7_NBITER_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_0_P7_NBITER_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_1_P7_NBITER_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF50_1_P7_NBITER_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_0_P7_NBITER_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_0_P7_NBITER_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_1_P7_NBITER_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF51_1_P7_NBITER_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_0_P7_NBITER_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_0_P7_NBITER_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_1_P7_NBITER_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF52_1_P7_NBITER_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_0_P7_NBITER_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_0_P7_NBITER_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_1_P7_NBITER_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_NF53_1_P7_NBITER_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_0_P7_NBITER_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_0_P7_NBITER_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_1_P7_NBITER_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF54_1_P7_NBITER_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_0_P7_NBITER_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_0_P7_NBITER_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_1_P7_NBITER_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF55_1_P7_NBITER_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_0_P7_NBITER_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_0_P7_NBITER_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_1_P7_NBITER_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF56_1_P7_NBITER_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_0_P7_NBITER_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_0_P7_NBITER_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_1_P7_NBITER_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF57_1_P7_NBITER_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_0_P7_NBITER_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_0_P7_NBITER_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_1_P7_NBITER_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF58_1_P7_NBITER_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_0_P7_NBITER_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_0_P7_NBITER_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_1_P7_NBITER_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF59_1_P7_NBITER_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_0_P7_NBITER_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_0_P7_NBITER_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_1_P7_NBITER_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF60_1_P7_NBITER_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_0_P7_NBITER_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_0_P7_NBITER_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_1_P7_NBITER_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF61_1_P7_NBITER_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF62_0_P7_NBITER_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P7_NBITER_SF62_0_P7_NBITER_SF_32APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_0_P8_NBITER_NF_QPSK_13_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_0_P8_NBITER_NF_QPSK_13_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_1_P8_NBITER_NF_QPSK_9_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF33_1_P8_NBITER_NF_QPSK_9_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_0_P8_NBITER_NF_QPSK_11_20 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_0_P8_NBITER_NF_QPSK_11_20__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_1_P8_NBITER_NF_8PSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF34_1_P8_NBITER_NF_8PSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_0_P8_NBITER_NF_8PSK_104_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_0_P8_NBITER_NF_8PSK_104_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_1_P8_NBITER_NF_8PSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF35_1_P8_NBITER_NF_8PSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_0_P8_NBITER_NF_8PSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_0_P8_NBITER_NF_8PSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_1_P8_NBITER_NF_8PSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF36_1_P8_NBITER_NF_8PSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_0_P8_NBITER_NF_16APSK_90_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_0_P8_NBITER_NF_16APSK_90_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_1_P8_NBITER_NF_16APSK_96_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF37_1_P8_NBITER_NF_16APSK_96_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_0_P8_NBITER_NF_16APSK_100_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_0_P8_NBITER_NF_16APSK_100_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_1_P8_NBITER_NF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF38_1_P8_NBITER_NF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_0_P8_NBITER_NF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_0_P8_NBITER_NF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_1_P8_NBITER_NF_16APSK_18_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF39_1_P8_NBITER_NF_16APSK_18_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_0_P8_NBITER_NF_16APSK_28_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_0_P8_NBITER_NF_16APSK_28_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_1_P8_NBITER_NF_16APSK_23_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF40_1_P8_NBITER_NF_16APSK_23_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_0_P8_NBITER_NF_16APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_0_P8_NBITER_NF_16APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_1_P8_NBITER_NF_16APSK_25_36 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF41_1_P8_NBITER_NF_16APSK_25_36__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_0_P8_NBITER_NF_16APSK_13_18 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_0_P8_NBITER_NF_16APSK_13_18__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_1_P8_NBITER_NF_16APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF42_1_P8_NBITER_NF_16APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_0_P8_NBITER_NF_16APSK_154_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_0_P8_NBITER_NF_16APSK_154_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_1_P8_NBITER_NF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF43_1_P8_NBITER_NF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF44_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF44_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF44_1_P8_NBITER_NF_32APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF44_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF44_1_P8_NBITER_NF_32APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_0_P8_NBITER_NF_32APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_0_P8_NBITER_NF_32APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_1_P8_NBITER_NF_32APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF45_1_P8_NBITER_NF_32APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_0_P8_NBITER_NF_64APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_0_P8_NBITER_NF_64APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_1_P8_NBITER_NF_64APSK_132_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF46_1_P8_NBITER_NF_64APSK_132_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF47_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF47_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF47_1_P8_NBITER_NF_64APSK_7_9 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF47_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF47_1_P8_NBITER_NF_64APSK_7_9__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF48_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF48_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF48_1_P8_NBITER_NF_64APSK_4_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF48_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF48_1_P8_NBITER_NF_64APSK_4_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF49_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF49_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF49_1_P8_NBITER_NF_64APSK_5_6 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF49_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF49_1_P8_NBITER_NF_64APSK_5_6__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_0_P8_NBITER_NF_128APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_0_P8_NBITER_NF_128APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_1_P8_NBITER_NF_128APSK_140_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF50_1_P8_NBITER_NF_128APSK_140_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_0_P8_NBITER_NF_256APSK_116_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_0_P8_NBITER_NF_256APSK_116_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_1_P8_NBITER_NF_256APSK_20_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF51_1_P8_NBITER_NF_256APSK_20_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_0_P8_NBITER_NF_256APSK_124_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_0_P8_NBITER_NF_256APSK_124_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_1_P8_NBITER_NF_256APSK_128_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF52_1_P8_NBITER_NF_256APSK_128_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_0_P8_NBITER_NF_256APSK_22_30 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_0_P8_NBITER_NF_256APSK_22_30__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_1_P8_NBITER_NF_256APSK_135_180 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_NF53_1_P8_NBITER_NF_256APSK_135_180__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_0_P8_NBITER_SF_QPSK_11_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_0_P8_NBITER_SF_QPSK_11_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_1_P8_NBITER_SF_QPSK_4_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF54_1_P8_NBITER_SF_QPSK_4_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_0_P8_NBITER_SF_QPSK_14_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_0_P8_NBITER_SF_QPSK_14_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_1_P8_NBITER_SF_QPSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF55_1_P8_NBITER_SF_QPSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_0_P8_NBITER_SF_QPSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_0_P8_NBITER_SF_QPSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_1_P8_NBITER_SF_QPSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF56_1_P8_NBITER_SF_QPSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_0_P8_NBITER_SF_8PSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_0_P8_NBITER_SF_8PSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_1_P8_NBITER_SF_8PSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF57_1_P8_NBITER_SF_8PSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_0_P8_NBITER_SF_8PSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_0_P8_NBITER_SF_8PSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_1_P8_NBITER_SF_8PSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF58_1_P8_NBITER_SF_8PSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_0_P8_NBITER_SF_16APSK_7_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_0_P8_NBITER_SF_16APSK_7_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_1_P8_NBITER_SF_16APSK_8_15 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF59_1_P8_NBITER_SF_16APSK_8_15__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_0_P8_NBITER_SF_16APSK_26_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_0_P8_NBITER_SF_16APSK_26_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_1_P8_NBITER_SF_16APSK_3_5 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF60_1_P8_NBITER_SF_16APSK_3_5__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_0_P8_NBITER_SF_16APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_0_P8_NBITER_SF_16APSK_32_45__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_1 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_1)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_1_P8_NBITER_SF_32APSK_2_3 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_1*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF61_1_P8_NBITER_SF_32APSK_2_3__MASK)

#define REG_RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF62_0 (C8CODEW_DVBS2FEC[0] + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF62_0)
#define FLD_FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF62_0_P8_NBITER_SF_32APSK_32_45 (C8CODEW_DVBS2FEC[0]*(1<<16) + RC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF62_0*(1<<16) + FC8CODEW_C8CODEW_DVBS2FEC_P8_NBITER_SF62_0_P8_NBITER_SF_32APSK_32_45__MASK)

#define REG_RSTID135_SYSCFG_NORTH_RESERVED0 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_RESERVED0)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS16 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS16)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS16_THS_VOBS (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS16*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS16_THS_VOBS__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG32 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG32)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG32_SMPS_SEL_CLK (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG32*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG32_SMPS_SEL_CLK__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG33 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG33)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG33_SMPS_POFF (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG33*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG33_SMPS_POFF__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG34 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG34)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG34_SELCURRENTFREQ (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG34*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG34_SELCURRENTFREQ__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG35 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG35)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG35_SMPS_BYPASS_CALIBRATE (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG35*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG35_SMPS_BYPASS_CALIBRATE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG35_SMPS_START_CALIBRATE (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG35*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG35_SMPS_START_CALIBRATE__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG36 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG36)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG36_SMPS_VREF_SELECT (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG36*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG36_SMPS_VREF_SELECT__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG37 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG37)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG37_SMPS_TEST_SELECT (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG37*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG37_SMPS_TEST_SELECT__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG38 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG38)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG38_SMPS_EXT_CAPA_SELECT (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG38*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG38_SMPS_EXT_CAPA_SELECT__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39_SMPS_EN_TEST (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39_SMPS_EN_TEST__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39_SMPS_TEST (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39_SMPS_TEST__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39_SMPS_EN_LOOP (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG39_SMPS_EN_LOOP__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS48 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS48)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS48_SMPS_VCAL_END (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS48*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS48_SMPS_VCAL_END__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS49 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS49)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS49_SMPS_VCAL_START (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS49*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS49_SMPS_VCAL_START__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS50 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS50)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS50_SMPS_CAPA_SELECT (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS50*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS50_SMPS_CAPA_SELECT__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS51 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS51)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS51_SMPS_SOFT_START_BEGIN (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS51*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS51_SMPS_SOFT_START_BEGIN__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS52 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS52)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS52_SMPS_SOFT_START_END (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS52*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS52_SMPS_SOFT_START_END__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_EN (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_EN__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_COMPTQ (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_COMPTQ__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_FREEZE (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_FREEZE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_ACCURATE (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_ACCURATE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_RESERVED_COMP_CONFIG (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_RESERVED_COMP_CONFIG__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_RASRC (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP3V3_RASRC__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP_RESERVED (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_NORTH_COMP_RESERVED__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_EN (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_EN__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_COMPTQ (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_COMPTQ__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_FREEZE (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_FREEZE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_ACCURATE (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_ACCURATE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_RESERVED_COMP_CONFIG (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_RESERVED_COMP_CONFIG__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_RASRC (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP3V3_RASRC__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP_RESERVED (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG64_SOUTH_COMP_RESERVED__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS80 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS80)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS80_NORTH_COMP3V3_OK (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS80*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS80_NORTH_COMP3V3_OK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS80_NORTH_COMP3V3_NASRC (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS80*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS80_NORTH_COMP3V3_NASRC__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS80_SOUTH_COMP3V3_OK (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS80*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS80_SOUTH_COMP3V3_OK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS80_SOUTH_COMP3V3_NASRC (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS80*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS80_SOUTH_COMP3V3_NASRC__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG96 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG96)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG96_STATIC_ADC_ENABLE (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG96*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG96_STATIC_ADC_ENABLE__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG97 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG97)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG97_STATIC_ADC_DUMP (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG97*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG97_STATIC_ADC_DUMP__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG97_STATIC_TST_BYPASS_DIVIDER (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG97*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG97_STATIC_TST_BYPASS_DIVIDER__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG98 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG98)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG98_STATIC_ADC_MEM_MAX_SAMPLING (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG98*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG98_STATIC_ADC_MEM_MAX_SAMPLING__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG99 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG99)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG99_STATIC_ADC_DIV_CLK (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG99*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG99_STATIC_ADC_DIV_CLK__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS112 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS112)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS112_STATIC_ADC_END_STORE (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS112_STATIC_ADC_END_STORE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS112_STATIC_ADC_END_DUMP (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS112_STATIC_ADC_END_DUMP__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_STATUS144 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS144)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS144_FLEX_CLOCKGEN_JE_STATUS (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS144*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS144_FLEX_CLOCKGEN_JE_STATUS__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_STATUS144_FLEX_CLOCKGEN_JE_DYN_OUT (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_STATUS144*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_STATUS144_FLEX_CLOCKGEN_JE_DYN_OUT__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG160 (SYSCONFIGN[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG160)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG160_ETI_ADC_TST_DIGAD_IQ_SEL (SYSCONFIGN[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG160*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG160_ETI_ADC_TST_DIGAD_IQ_SEL__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_POUT(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_POUT)
#define FLD_FSTID135_X5BANKPIONORTHPIO_POUT_PIO_OUT_BITS(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_POUT*(1<<16) + FSTID135_PIO_POUT_PIO_OUT_BITS__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_POUT_SET(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_POUT_SET)
#define FLD_FSTID135_X5BANKPIONORTHPIO_POUT_SET_POUT_SET(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_POUT_SET*(1<<16) + FSTID135_PIO_POUT_SET_POUT_SET__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_POUT_RESET(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_POUT_RESET)
#define FLD_FSTID135_X5BANKPIONORTHPIO_POUT_RESET_POUT_RST(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_POUT_RESET*(1<<16) + FSTID135_PIO_POUT_RESET_POUT_RST__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PIO_IN(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PIO_IN)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PIO_IN_PIO_IN(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PIO_IN*(1<<16) + FSTID135_PIO_PIO_IN_PIO_IN__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC0(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC0)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC0_CONFIG_0(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC0*(1<<16) + FSTID135_PIO_PC0_CONFIG_0__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC0_SET(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC0_SET)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC0_SET_PC0_SET(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC0_SET*(1<<16) + FSTID135_PIO_PC0_SET_PC0_SET__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC0_RST(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC0_RST)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC0_RST_PC0_RST(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC0_RST*(1<<16) + FSTID135_PIO_PC0_RST_PC0_RST__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC1(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC1)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC1_CONFIG_1(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC1*(1<<16) + FSTID135_PIO_PC1_CONFIG_1__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC1_SET(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC1_SET)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC1_SET_PC1_SET(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC1_SET*(1<<16) + FSTID135_PIO_PC1_SET_PC1_SET__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC1_RST(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC1_RST)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC1_RST_PC1_RST(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC1_RST*(1<<16) + FSTID135_PIO_PC1_RST_PC1_RST__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC2(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC2)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC2_CONFIG_2(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC2*(1<<16) + FSTID135_PIO_PC2_CONFIG_2__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC2_SET(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC2_SET)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC2_SET_PC2_SET(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC2_SET*(1<<16) + FSTID135_PIO_PC2_SET_PC2_SET__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PC2_RST(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PC2_RST)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PC2_RST_PC2_RST(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PC2_RST*(1<<16) + FSTID135_PIO_PC2_RST_PC2_RST__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PCOMP(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PCOMP)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PCOMP_PCOMP(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PCOMP*(1<<16) + FSTID135_PIO_PCOMP_PCOMP__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PCOMP_SET(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PCOMP_SET)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PCOMP_SET_PCOMP_SET(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PCOMP_SET*(1<<16) + FSTID135_PIO_PCOMP_SET_PCOMP_SET__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PCOMP_RST(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PCOMP_RST)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PCOMP_RST_PCOMP_RST(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PCOMP_RST*(1<<16) + FSTID135_PIO_PCOMP_RST_PCOMP_RST__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PMASK(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PMASK)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PMASK_MASK(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PMASK*(1<<16) + FSTID135_PIO_PMASK_MASK__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PMASK_SET(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PMASK_SET)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PMASK_SET_PMASK_SET(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PMASK_SET*(1<<16) + FSTID135_PIO_PMASK_SET_PMASK_SET__MASK)

#define REG_RSTID135_X5BANKPIONORTHPIO_PMASK_RST(PATH) (X5BANKPIONORTH[PATH-1] + RSTID135_PIO_PMASK_RST)
#define FLD_FSTID135_X5BANKPIONORTHPIO_PMASK_RST_PMASK_RST(PATH) (X5BANKPIONORTH[PATH-1]*(1<<16) + RSTID135_PIO_PMASK_RST*(1<<16) + FSTID135_PIO_PMASK_RST_PMASK_RST__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_0_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_0_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_1_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_1_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_2_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_2_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_3_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_3_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_4_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1000_PIO0_4_SELECTOR__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_0_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_0_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_1_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_1_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_2_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_2_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_3_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_3_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_4_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1001_PIO2_4_SELECTOR__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_0_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_0_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_1_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_1_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_2_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_2_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_3_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_3_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_4_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_4_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_5_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_5_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_6_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_6_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_7_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1002_PIO3_7_SELECTOR__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_0_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_0_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_1_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_1_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_2_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_2_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_3_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_3_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_4_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_4_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_5_SELECTOR (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1003_PIO7_5_SELECTOR__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO0_0_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO0_0_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO0_1_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO0_1_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO0_3_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO0_3_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO0_4_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO0_4_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_0_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_0_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_1_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_1_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_2_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_2_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_3_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_3_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_4_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO2_4_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO3_4_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO3_4_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO3_5_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO3_5_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO3_6_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO3_6_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO3_7_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO3_7_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_0_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_0_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_1_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_1_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_2_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_2_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_3_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_3_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_4_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_4_OE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_5_OE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1040_SYSCFG_PIO7_5_OE__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_0_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_0_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_1_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_1_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_2_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_2_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_3_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_3_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_4_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO0_4_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_0_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_0_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_1_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_1_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_2_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_2_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_3_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_3_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_4_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO2_4_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_0_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_0_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_1_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_1_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_2_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_2_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_3_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_3_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_4_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_4_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_5_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_5_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_6_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_6_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_7_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO3_7_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_0_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_0_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_1_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_1_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_2_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_2_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_3_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_3_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_4_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_4_PU__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_5_PU (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1050_SYSCFG_PIO7_5_PU__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1055 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1055)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_0_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_0_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_1_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_1_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_2_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_2_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_3_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_3_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_4_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO0_4_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_0_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_0_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_1_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_1_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_2_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_2_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_3_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_3_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_4_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO2_4_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_0_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_0_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_1_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_1_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_2_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_2_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_3_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_3_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_4_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_4_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_5_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_5_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_6_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_6_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_7_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO3_7_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_0_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_0_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_1_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_1_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_2_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_2_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_3_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_3_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_4_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_4_OD__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_5_OD (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1060_SYSCFG_PIO7_5_OD__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1100_PIO0_0_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1101_PIO0_1_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1102_PIO0_2_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1103_PIO0_3_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1104_PIO0_4_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1105_PIO0_5_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1106_PIO0_6_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1107_PIO0_7_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1108_PIO2_0_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1109_PIO2_1_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1110_PIO2_2_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1111_PIO2_3_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1112_PIO2_4_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1113_PIO2_5_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1114_PIO2_6_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1115_PIO2_7_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1116_PIO3_0_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1117_PIO3_1_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1118_PIO3_2_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1119_PIO3_3_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1120_PIO3_4_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1121_PIO3_5_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1122_PIO3_6_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1123_PIO3_7_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1124_PIO7_0_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1125_PIO7_1_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1126_PIO7_2_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1127_PIO7_3_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1128_PIO7_4_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1129_PIO7_5_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1130_PIO7_6_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131 (PIONORTHMUX[0] + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_CLK_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_CLK_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_CLKNOTDATA (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_0 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_1 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_2 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_3 (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_INNOTOUT (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DOUBLE_EDGE (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_INVERTCLK (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_RETIME (PIONORTHMUX[0]*(1<<16) + RSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_NORTH_SYSTEM_CONFIG1131_PIO7_7_CFG_RETIME__MASK)

#define REG_RSTID135_AFE_AFE_OSC (AFE_CTRL[0] + RSTID135_AFE_AFE_OSC)
#define FLD_FSTID135_AFE_AFE_OSC_OSC_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_OSC*(1<<16) + FSTID135_AFE_AFE_OSC_OSC_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_OSC_OSC_EXT_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_OSC*(1<<16) + FSTID135_AFE_AFE_OSC_OSC_EXT_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_OSC_DIG1_CLK_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_OSC*(1<<16) + FSTID135_AFE_AFE_OSC_DIG1_CLK_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_OSC_DIG2_CLK_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_OSC*(1<<16) + FSTID135_AFE_AFE_OSC_DIG2_CLK_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_OSC_CLK_DCDC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_OSC*(1<<16) + FSTID135_AFE_AFE_OSC_CLK_DCDC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_OSC_CLK_DCDC_DIV (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_OSC*(1<<16) + FSTID135_AFE_AFE_OSC_CLK_DCDC_DIV__MASK)

#define REG_RSTID135_AFE_AFE_PLL_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_PLL_CTRL)
#define FLD_FSTID135_AFE_AFE_PLL_CTRL_PLL_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_CTRL*(1<<16) + FSTID135_AFE_AFE_PLL_CTRL_PLL_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_CTRL_PLL_REFDIV_N (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_CTRL*(1<<16) + FSTID135_AFE_AFE_PLL_CTRL_PLL_REFDIV_N__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_CTRL_PLL_ICP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_CTRL*(1<<16) + FSTID135_AFE_AFE_PLL_CTRL_PLL_ICP__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_CTRL_PLL_START_FAST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_CTRL*(1<<16) + FSTID135_AFE_AFE_PLL_CTRL_PLL_START_FAST__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_CTRL_PLL_RST_N (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_CTRL*(1<<16) + FSTID135_AFE_AFE_PLL_CTRL_PLL_RST_N__MASK)

#define REG_RSTID135_AFE_AFE_PLL_INT (AFE_CTRL[0] + RSTID135_AFE_AFE_PLL_INT)
#define FLD_FSTID135_AFE_AFE_PLL_INT_PLL_INT (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_INT*(1<<16) + FSTID135_AFE_AFE_PLL_INT_PLL_INT__MASK)

#define REG_RSTID135_AFE_AFE_PLL_FRAC1 (AFE_CTRL[0] + RSTID135_AFE_AFE_PLL_FRAC1)
#define FLD_FSTID135_AFE_AFE_PLL_FRAC1_PLL_FRAC_1 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_FRAC1*(1<<16) + FSTID135_AFE_AFE_PLL_FRAC1_PLL_FRAC_1__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_FRAC1_PLL_SDON (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_FRAC1*(1<<16) + FSTID135_AFE_AFE_PLL_FRAC1_PLL_SDON__MASK)

#define REG_RSTID135_AFE_AFE_PLL_FRAC2 (AFE_CTRL[0] + RSTID135_AFE_AFE_PLL_FRAC2)
#define FLD_FSTID135_AFE_AFE_PLL_FRAC2_PLL_FRAC_0 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_FRAC2*(1<<16) + FSTID135_AFE_AFE_PLL_FRAC2_PLL_FRAC_0__MASK)

#define REG_RSTID135_AFE_AFE_PLL_TST1 (AFE_CTRL[0] + RSTID135_AFE_AFE_PLL_TST1)
#define FLD_FSTID135_AFE_AFE_PLL_TST1_PLL_CPDNS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_TST1*(1<<16) + FSTID135_AFE_AFE_PLL_TST1_PLL_CPDNS__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_TST1_PLL_CPA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_TST1*(1<<16) + FSTID135_AFE_AFE_PLL_TST1_PLL_CPA__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_TST1_PLL_TCP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_TST1*(1<<16) + FSTID135_AFE_AFE_PLL_TST1_PLL_TCP__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_TST1_PLL_TSTBUF_BYPASS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_TST1*(1<<16) + FSTID135_AFE_AFE_PLL_TST1_PLL_TSTBUF_BYPASS__MASK)

#define REG_RSTID135_AFE_AFE_PLL_TST2 (AFE_CTRL[0] + RSTID135_AFE_AFE_PLL_TST2)
#define FLD_FSTID135_AFE_AFE_PLL_TST2_PLL_TSELA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_TST2*(1<<16) + FSTID135_AFE_AFE_PLL_TST2_PLL_TSELA__MASK)
#define FLD_FSTID135_AFE_AFE_PLL_TST2_PLL_TSELD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_PLL_TST2*(1<<16) + FSTID135_AFE_AFE_PLL_TST2_PLL_TSELD__MASK)

#define REG_RSTID135_AFE_AFE_VCO_CAL1 (AFE_CTRL[0] + RSTID135_AFE_AFE_VCO_CAL1)
#define FLD_FSTID135_AFE_AFE_VCO_CAL1_VCO_CAL_START (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_VCO_CAL1*(1<<16) + FSTID135_AFE_AFE_VCO_CAL1_VCO_CAL_START__MASK)
#define FLD_FSTID135_AFE_AFE_VCO_CAL1_VCO_CAL_OFF (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_VCO_CAL1*(1<<16) + FSTID135_AFE_AFE_VCO_CAL1_VCO_CAL_OFF__MASK)
#define FLD_FSTID135_AFE_AFE_VCO_CAL1_VCO_DIVCAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_VCO_CAL1*(1<<16) + FSTID135_AFE_AFE_VCO_CAL1_VCO_DIVCAL__MASK)

#define REG_RSTID135_AFE_AFE_VCO_CAL2 (AFE_CTRL[0] + RSTID135_AFE_AFE_VCO_CAL2)
#define FLD_FSTID135_AFE_AFE_VCO_CAL2_VCO_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_VCO_CAL2*(1<<16) + FSTID135_AFE_AFE_VCO_CAL2_VCO_CAL__MASK)

#define REG_RSTID135_AFE_AFE_VCO_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_VCO_CTRL)
#define FLD_FSTID135_AFE_AFE_VCO_CTRL_VCO_AMP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_VCO_CTRL*(1<<16) + FSTID135_AFE_AFE_VCO_CTRL_VCO_AMP__MASK)
#define FLD_FSTID135_AFE_AFE_VCO_CTRL_VCO_BUF_AMP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_VCO_CTRL*(1<<16) + FSTID135_AFE_AFE_VCO_CTRL_VCO_BUF_AMP__MASK)

#define REG_RSTID135_AFE_AFE_DFECLK_CTRL1 (AFE_CTRL[0] + RSTID135_AFE_AFE_DFECLK_CTRL1)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL1_DFE1_CLK_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL1*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL1_DFE1_CLK_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL1_DFE2_CLK_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL1*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL1_DFE2_CLK_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL1_DFE3_CLK_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL1*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL1_DFE3_CLK_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL1_DFE1_CLK_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL1*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL1_DFE1_CLK_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL1_DFE2_CLK_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL1*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL1_DFE2_CLK_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL1_DFE3_CLK_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL1*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL1_DFE3_CLK_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL1_DFE_CLK_RST_N (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL1*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL1_DFE_CLK_RST_N__MASK)

#define REG_RSTID135_AFE_AFE_DFECLK_CTRL2 (AFE_CTRL[0] + RSTID135_AFE_AFE_DFECLK_CTRL2)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL2_DFE1_CLK_SS_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL2*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL2_DFE1_CLK_SS_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL2_DFE2_CLK_SS_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL2*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL2_DFE2_CLK_SS_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL2_DFE3_CLK_SS_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL2*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL2_DFE3_CLK_SS_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_DFECLK_CTRL2_DFE_CLK_SS_DIV (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DFECLK_CTRL2*(1<<16) + FSTID135_AFE_AFE_DFECLK_CTRL2_DFE_CLK_SS_DIV__MASK)

#define REG_RSTID135_AFE_AFE_RX1_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_RX1_CTRL)
#define FLD_FSTID135_AFE_AFE_RX1_CTRL_ADC1_VREG_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX1_CTRL*(1<<16) + FSTID135_AFE_AFE_RX1_CTRL_ADC1_VREG_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_RX1_CTRL_VGLNA1_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX1_CTRL*(1<<16) + FSTID135_AFE_AFE_RX1_CTRL_VGLNA1_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX1_CTRL_MIXER1_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX1_CTRL*(1<<16) + FSTID135_AFE_AFE_RX1_CTRL_MIXER1_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX1_CTRL_BB1_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX1_CTRL*(1<<16) + FSTID135_AFE_AFE_RX1_CTRL_BB1_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX1_CTRL_ADC1_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX1_CTRL*(1<<16) + FSTID135_AFE_AFE_RX1_CTRL_ADC1_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX1_CTRL_LO1_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX1_CTRL*(1<<16) + FSTID135_AFE_AFE_RX1_CTRL_LO1_ENA__MASK)

#define REG_RSTID135_AFE_AFE_RX2_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_RX2_CTRL)
#define FLD_FSTID135_AFE_AFE_RX2_CTRL_ADC2_VREG_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX2_CTRL*(1<<16) + FSTID135_AFE_AFE_RX2_CTRL_ADC2_VREG_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_RX2_CTRL_VGLNA2_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX2_CTRL*(1<<16) + FSTID135_AFE_AFE_RX2_CTRL_VGLNA2_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX2_CTRL_MIXER2_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX2_CTRL*(1<<16) + FSTID135_AFE_AFE_RX2_CTRL_MIXER2_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX2_CTRL_BB2_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX2_CTRL*(1<<16) + FSTID135_AFE_AFE_RX2_CTRL_BB2_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX2_CTRL_ADC2_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX2_CTRL*(1<<16) + FSTID135_AFE_AFE_RX2_CTRL_ADC2_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX2_CTRL_LO2_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX2_CTRL*(1<<16) + FSTID135_AFE_AFE_RX2_CTRL_LO2_ENA__MASK)

#define REG_RSTID135_AFE_AFE_RX3_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_RX3_CTRL)
#define FLD_FSTID135_AFE_AFE_RX3_CTRL_ADC3_VREG_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX3_CTRL*(1<<16) + FSTID135_AFE_AFE_RX3_CTRL_ADC3_VREG_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_RX3_CTRL_VGLNA3_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX3_CTRL*(1<<16) + FSTID135_AFE_AFE_RX3_CTRL_VGLNA3_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX3_CTRL_MIXER3_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX3_CTRL*(1<<16) + FSTID135_AFE_AFE_RX3_CTRL_MIXER3_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX3_CTRL_BB3_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX3_CTRL*(1<<16) + FSTID135_AFE_AFE_RX3_CTRL_BB3_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX3_CTRL_ADC3_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX3_CTRL*(1<<16) + FSTID135_AFE_AFE_RX3_CTRL_ADC3_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX3_CTRL_LO3_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX3_CTRL*(1<<16) + FSTID135_AFE_AFE_RX3_CTRL_LO3_ENA__MASK)

#define REG_RSTID135_AFE_AFE_RX4_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_RX4_CTRL)
#define FLD_FSTID135_AFE_AFE_RX4_CTRL_ADC4_VREG_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX4_CTRL*(1<<16) + FSTID135_AFE_AFE_RX4_CTRL_ADC4_VREG_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_RX4_CTRL_VGLNA4_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX4_CTRL*(1<<16) + FSTID135_AFE_AFE_RX4_CTRL_VGLNA4_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX4_CTRL_MIXER4_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX4_CTRL*(1<<16) + FSTID135_AFE_AFE_RX4_CTRL_MIXER4_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX4_CTRL_BB4_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX4_CTRL*(1<<16) + FSTID135_AFE_AFE_RX4_CTRL_BB4_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX4_CTRL_ADC4_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX4_CTRL*(1<<16) + FSTID135_AFE_AFE_RX4_CTRL_ADC4_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_RX4_CTRL_LO4_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RX4_CTRL*(1<<16) + FSTID135_AFE_AFE_RX4_CTRL_LO4_ENA__MASK)

#define REG_RSTID135_AFE_AFE_BB_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB_CAL)
#define FLD_FSTID135_AFE_AFE_BB_CAL_BB1_CAL_START (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB_CAL*(1<<16) + FSTID135_AFE_AFE_BB_CAL_BB1_CAL_START__MASK)
#define FLD_FSTID135_AFE_AFE_BB_CAL_BB2_CAL_START (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB_CAL*(1<<16) + FSTID135_AFE_AFE_BB_CAL_BB2_CAL_START__MASK)
#define FLD_FSTID135_AFE_AFE_BB_CAL_BB3_CAL_START (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB_CAL*(1<<16) + FSTID135_AFE_AFE_BB_CAL_BB3_CAL_START__MASK)
#define FLD_FSTID135_AFE_AFE_BB_CAL_BB4_CAL_START (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB_CAL*(1<<16) + FSTID135_AFE_AFE_BB_CAL_BB4_CAL_START__MASK)
#define FLD_FSTID135_AFE_AFE_BB_CAL_BB1_CAL_SAF_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB_CAL*(1<<16) + FSTID135_AFE_AFE_BB_CAL_BB1_CAL_SAF_DIS__MASK)
#define FLD_FSTID135_AFE_AFE_BB_CAL_BB2_CAL_SAF_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB_CAL*(1<<16) + FSTID135_AFE_AFE_BB_CAL_BB2_CAL_SAF_DIS__MASK)
#define FLD_FSTID135_AFE_AFE_BB_CAL_BB3_CAL_SAF_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB_CAL*(1<<16) + FSTID135_AFE_AFE_BB_CAL_BB3_CAL_SAF_DIS__MASK)
#define FLD_FSTID135_AFE_AFE_BB_CAL_BB4_CAL_SAF_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB_CAL*(1<<16) + FSTID135_AFE_AFE_BB_CAL_BB4_CAL_SAF_DIS__MASK)

#define REG_RSTID135_AFE_AFE_BB1I_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB1I_CAL)
#define FLD_FSTID135_AFE_AFE_BB1I_CAL_BB1I_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB1I_CAL*(1<<16) + FSTID135_AFE_AFE_BB1I_CAL_BB1I_CAL__MASK)

#define REG_RSTID135_AFE_AFE_BB1Q_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB1Q_CAL)
#define FLD_FSTID135_AFE_AFE_BB1Q_CAL_BB1Q_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB1Q_CAL*(1<<16) + FSTID135_AFE_AFE_BB1Q_CAL_BB1Q_CAL__MASK)

#define REG_RSTID135_AFE_AFE_BB2I_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB2I_CAL)
#define FLD_FSTID135_AFE_AFE_BB2I_CAL_BB2I_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB2I_CAL*(1<<16) + FSTID135_AFE_AFE_BB2I_CAL_BB2I_CAL__MASK)

#define REG_RSTID135_AFE_AFE_BB2Q_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB2Q_CAL)
#define FLD_FSTID135_AFE_AFE_BB2Q_CAL_BB2Q_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB2Q_CAL*(1<<16) + FSTID135_AFE_AFE_BB2Q_CAL_BB2Q_CAL__MASK)

#define REG_RSTID135_AFE_AFE_BB3I_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB3I_CAL)
#define FLD_FSTID135_AFE_AFE_BB3I_CAL_BB3I_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB3I_CAL*(1<<16) + FSTID135_AFE_AFE_BB3I_CAL_BB3I_CAL__MASK)

#define REG_RSTID135_AFE_AFE_BB3Q_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB3Q_CAL)
#define FLD_FSTID135_AFE_AFE_BB3Q_CAL_BB3Q_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB3Q_CAL*(1<<16) + FSTID135_AFE_AFE_BB3Q_CAL_BB3Q_CAL__MASK)

#define REG_RSTID135_AFE_AFE_BB4I_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB4I_CAL)
#define FLD_FSTID135_AFE_AFE_BB4I_CAL_BB4I_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB4I_CAL*(1<<16) + FSTID135_AFE_AFE_BB4I_CAL_BB4I_CAL__MASK)

#define REG_RSTID135_AFE_AFE_BB4Q_CAL (AFE_CTRL[0] + RSTID135_AFE_AFE_BB4Q_CAL)
#define FLD_FSTID135_AFE_AFE_BB4Q_CAL_BB4Q_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BB4Q_CAL*(1<<16) + FSTID135_AFE_AFE_BB4Q_CAL_BB4Q_CAL__MASK)

#define REG_RSTID135_AFE_AFE_RF_CFG1 (AFE_CTRL[0] + RSTID135_AFE_AFE_RF_CFG1)
#define FLD_FSTID135_AFE_AFE_RF_CFG1_VGLNA1_SELGAIN (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG1*(1<<16) + FSTID135_AFE_AFE_RF_CFG1_VGLNA1_SELGAIN__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG1_VGLNA2_SELGAIN (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG1*(1<<16) + FSTID135_AFE_AFE_RF_CFG1_VGLNA2_SELGAIN__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG1_VGLNA3_SELGAIN (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG1*(1<<16) + FSTID135_AFE_AFE_RF_CFG1_VGLNA3_SELGAIN__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG1_VGLNA4_SELGAIN (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG1*(1<<16) + FSTID135_AFE_AFE_RF_CFG1_VGLNA4_SELGAIN__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG1_VGLNA1_DIFF (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG1*(1<<16) + FSTID135_AFE_AFE_RF_CFG1_VGLNA1_DIFF__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG1_VGLNA2_DIFF (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG1*(1<<16) + FSTID135_AFE_AFE_RF_CFG1_VGLNA2_DIFF__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG1_VGLNA3_DIFF (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG1*(1<<16) + FSTID135_AFE_AFE_RF_CFG1_VGLNA3_DIFF__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG1_VGLNA4_DIFF (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG1*(1<<16) + FSTID135_AFE_AFE_RF_CFG1_VGLNA4_DIFF__MASK)

#define REG_RSTID135_AFE_AFE_RF_CFG2 (AFE_CTRL[0] + RSTID135_AFE_AFE_RF_CFG2)
#define FLD_FSTID135_AFE_AFE_RF_CFG2_RF1_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG2*(1<<16) + FSTID135_AFE_AFE_RF_CFG2_RF1_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG2_RF2_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG2*(1<<16) + FSTID135_AFE_AFE_RF_CFG2_RF2_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG2_RF3_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG2*(1<<16) + FSTID135_AFE_AFE_RF_CFG2_RF3_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_RF_CFG2_RF4_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_RF_CFG2*(1<<16) + FSTID135_AFE_AFE_RF_CFG2_RF4_CTRL__MASK)

#define REG_RSTID135_AFE_AFE_ADC_ADDR1 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC_ADDR1)
#define FLD_FSTID135_AFE_AFE_ADC_ADDR1_ADC_READ_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_ADDR1*(1<<16) + FSTID135_AFE_AFE_ADC_ADDR1_ADC_READ_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_ADDR1_ADC_ADDR (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_ADDR1*(1<<16) + FSTID135_AFE_AFE_ADC_ADDR1_ADC_ADDR__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_ADDR1_ADC_IQ (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_ADDR1*(1<<16) + FSTID135_AFE_AFE_ADC_ADDR1_ADC_IQ__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_ADDR1_ADC_PATH_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_ADDR1*(1<<16) + FSTID135_AFE_AFE_ADC_ADDR1_ADC_PATH_SEL__MASK)

#define REG_RSTID135_AFE_AFE_ADC_ADDR2 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC_ADDR2)
#define FLD_FSTID135_AFE_AFE_ADC_ADDR2_ADC_DSEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_ADDR2*(1<<16) + FSTID135_AFE_AFE_ADC_ADDR2_ADC_DSEL__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_ADDR2_ADC_RW (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_ADDR2*(1<<16) + FSTID135_AFE_AFE_ADC_ADDR2_ADC_RW__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_ADDR2_ADC_REQ (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_ADDR2*(1<<16) + FSTID135_AFE_AFE_ADC_ADDR2_ADC_REQ__MASK)

#define REG_RSTID135_AFE_AFE_ADC_CORR1 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC_CORR1)
#define FLD_FSTID135_AFE_AFE_ADC_CORR1_ADC_DATA_1 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CORR1*(1<<16) + FSTID135_AFE_AFE_ADC_CORR1_ADC_DATA_1__MASK)

#define REG_RSTID135_AFE_AFE_ADC_CORR2 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC_CORR2)
#define FLD_FSTID135_AFE_AFE_ADC_CORR2_ADC_DATA_0 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CORR2*(1<<16) + FSTID135_AFE_AFE_ADC_CORR2_ADC_DATA_0__MASK)

#define REG_RSTID135_AFE_AFE_ADC1_CTRL1 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC1_CTRL1)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_CALC_RST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_CALC_RST__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_CORR_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_CORR_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_OFFSET_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_OFFSET_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_OFFSET_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_OFFSET_CALC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_SKEW_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_SKEW_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_SKEW_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_SKEW_CALC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_GAIN_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_GAIN_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_GAIN_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL1_ADC1_GAIN_CALC_ENA__MASK)

#define REG_RSTID135_AFE_AFE_ADC1_CTRL2 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC1_CTRL2)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL2_ADC1_OFFSET_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL2_ADC1_OFFSET_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL2_ADC1_SKEW_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL2_ADC1_SKEW_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL2_ADC1_GAIN_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL2_ADC1_GAIN_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC1_CTRL2_ADC1_RST_N (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC1_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC1_CTRL2_ADC1_RST_N__MASK)

#define REG_RSTID135_AFE_AFE_ADC2_CTRL1 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC2_CTRL1)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_CALC_RST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_CALC_RST__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_CORR_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_CORR_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_OFFSET_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_OFFSET_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_OFFSET_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_OFFSET_CALC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_SKEW_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_SKEW_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_SKEW_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_SKEW_CALC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_GAIN_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_GAIN_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_GAIN_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL1_ADC2_GAIN_CALC_ENA__MASK)

#define REG_RSTID135_AFE_AFE_ADC2_CTRL2 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC2_CTRL2)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL2_ADC2_OFFSET_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL2_ADC2_OFFSET_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL2_ADC2_SKEW_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL2_ADC2_SKEW_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL2_ADC2_GAIN_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL2_ADC2_GAIN_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC2_CTRL2_ADC2_RST_N (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC2_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC2_CTRL2_ADC2_RST_N__MASK)

#define REG_RSTID135_AFE_AFE_ADC3_CTRL1 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC3_CTRL1)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_CALC_RST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_CALC_RST__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_CORR_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_CORR_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_OFFSET_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_OFFSET_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_OFFSET_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_OFFSET_CALC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_SKEW_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_SKEW_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_SKEW_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_SKEW_CALC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_GAIN_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_GAIN_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_GAIN_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL1_ADC3_GAIN_CALC_ENA__MASK)

#define REG_RSTID135_AFE_AFE_ADC3_CTRL2 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC3_CTRL2)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL2_ADC3_OFFSET_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL2_ADC3_OFFSET_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL2_ADC3_SKEW_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL2_ADC3_SKEW_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL2_ADC3_GAIN_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL2_ADC3_GAIN_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC3_CTRL2_ADC3_RST_N (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC3_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC3_CTRL2_ADC3_RST_N__MASK)

#define REG_RSTID135_AFE_AFE_ADC4_CTRL1 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC4_CTRL1)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_CALC_RST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_CALC_RST__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_CORR_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_CORR_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_OFFSET_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_OFFSET_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_OFFSET_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_OFFSET_CALC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_SKEW_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_SKEW_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_SKEW_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_SKEW_CALC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_GAIN_CORR_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_GAIN_CORR_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_GAIN_CALC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL1*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL1_ADC4_GAIN_CALC_ENA__MASK)

#define REG_RSTID135_AFE_AFE_ADC4_CTRL2 (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC4_CTRL2)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL2_ADC4_OFFSET_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL2_ADC4_OFFSET_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL2_ADC4_SKEW_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL2_ADC4_SKEW_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL2_ADC4_GAIN_EXT_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL2_ADC4_GAIN_EXT_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_ADC4_CTRL2_ADC4_RST_N (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC4_CTRL2*(1<<16) + FSTID135_AFE_AFE_ADC4_CTRL2_ADC4_RST_N__MASK)

#define REG_RSTID135_AFE_AFE_ADC_CFG (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC_CFG)
#define FLD_FSTID135_AFE_AFE_ADC_CFG_ADC1_BUF_PRECH (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CFG*(1<<16) + FSTID135_AFE_AFE_ADC_CFG_ADC1_BUF_PRECH__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_CFG_ADC2_BUF_PRECH (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CFG*(1<<16) + FSTID135_AFE_AFE_ADC_CFG_ADC2_BUF_PRECH__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_CFG_ADC3_BUF_PRECH (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CFG*(1<<16) + FSTID135_AFE_AFE_ADC_CFG_ADC3_BUF_PRECH__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_CFG_ADC4_BUF_PRECH (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CFG*(1<<16) + FSTID135_AFE_AFE_ADC_CFG_ADC4_BUF_PRECH__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_CFG_ADC1_STUP_DL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CFG*(1<<16) + FSTID135_AFE_AFE_ADC_CFG_ADC1_STUP_DL__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_CFG_ADC2_STUP_DL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CFG*(1<<16) + FSTID135_AFE_AFE_ADC_CFG_ADC2_STUP_DL__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_CFG_ADC3_STUP_DL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CFG*(1<<16) + FSTID135_AFE_AFE_ADC_CFG_ADC3_STUP_DL__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_CFG_ADC4_STUP_DL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_CFG*(1<<16) + FSTID135_AFE_AFE_ADC_CFG_ADC4_STUP_DL__MASK)

#define REG_RSTID135_AFE_AFE_ADC_TST (AFE_CTRL[0] + RSTID135_AFE_AFE_ADC_TST)
#define FLD_FSTID135_AFE_AFE_ADC_TST_ADC1_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_TST*(1<<16) + FSTID135_AFE_AFE_ADC_TST_ADC1_TST__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_TST_ADC2_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_TST*(1<<16) + FSTID135_AFE_AFE_ADC_TST_ADC2_TST__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_TST_ADC3_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_TST*(1<<16) + FSTID135_AFE_AFE_ADC_TST_ADC3_TST__MASK)
#define FLD_FSTID135_AFE_AFE_ADC_TST_ADC4_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ADC_TST*(1<<16) + FSTID135_AFE_AFE_ADC_TST_ADC4_TST__MASK)

#define REG_RSTID135_AFE_AFE_AGC1_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC1_CTRL)
#define FLD_FSTID135_AFE_AFE_AGC1_CTRL_AGC1_MODE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC1_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC1_CTRL_AGC1_MODE__MASK)
#define FLD_FSTID135_AFE_AFE_AGC1_CTRL_AGC1_RF_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC1_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC1_CTRL_AGC1_RF_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_AGC1_CTRL_AGC1_BB_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC1_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC1_CTRL_AGC1_BB_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_AGC1_CTRL_AGC1_PWM_FDIV (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC1_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC1_CTRL_AGC1_PWM_FDIV__MASK)

#define REG_RSTID135_AFE_AFE_AGC2_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC2_CTRL)
#define FLD_FSTID135_AFE_AFE_AGC2_CTRL_AGC2_MODE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC2_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC2_CTRL_AGC2_MODE__MASK)
#define FLD_FSTID135_AFE_AFE_AGC2_CTRL_AGC2_RF_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC2_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC2_CTRL_AGC2_RF_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_AGC2_CTRL_AGC2_BB_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC2_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC2_CTRL_AGC2_BB_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_AGC2_CTRL_AGC2_PWM_FDIV (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC2_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC2_CTRL_AGC2_PWM_FDIV__MASK)

#define REG_RSTID135_AFE_AFE_AGC3_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC3_CTRL)
#define FLD_FSTID135_AFE_AFE_AGC3_CTRL_AGC3_MODE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC3_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC3_CTRL_AGC3_MODE__MASK)
#define FLD_FSTID135_AFE_AFE_AGC3_CTRL_AGC3_RF_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC3_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC3_CTRL_AGC3_RF_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_AGC3_CTRL_AGC3_BB_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC3_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC3_CTRL_AGC3_BB_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_AGC3_CTRL_AGC3_PWM_FDIV (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC3_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC3_CTRL_AGC3_PWM_FDIV__MASK)

#define REG_RSTID135_AFE_AFE_AGC4_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC4_CTRL)
#define FLD_FSTID135_AFE_AFE_AGC4_CTRL_AGC4_MODE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC4_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC4_CTRL_AGC4_MODE__MASK)
#define FLD_FSTID135_AFE_AFE_AGC4_CTRL_AGC4_RF_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC4_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC4_CTRL_AGC4_RF_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_AGC4_CTRL_AGC4_BB_CTRL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC4_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC4_CTRL_AGC4_BB_CTRL__MASK)
#define FLD_FSTID135_AFE_AFE_AGC4_CTRL_AGC4_PWM_FDIV (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC4_CTRL*(1<<16) + FSTID135_AFE_AFE_AGC4_CTRL_AGC4_PWM_FDIV__MASK)

#define REG_RSTID135_AFE_AFE_AGC1_RF_PWM (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC1_RF_PWM)
#define FLD_FSTID135_AFE_AFE_AGC1_RF_PWM_AGC1_RF_PWM (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC1_RF_PWM*(1<<16) + FSTID135_AFE_AFE_AGC1_RF_PWM_AGC1_RF_PWM__MASK)

#define REG_RSTID135_AFE_AFE_AGC2_RF_PWM (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC2_RF_PWM)
#define FLD_FSTID135_AFE_AFE_AGC2_RF_PWM_AGC2_RF_PWM (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC2_RF_PWM*(1<<16) + FSTID135_AFE_AFE_AGC2_RF_PWM_AGC2_RF_PWM__MASK)

#define REG_RSTID135_AFE_AFE_AGC3_RF_PWM (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC3_RF_PWM)
#define FLD_FSTID135_AFE_AFE_AGC3_RF_PWM_AGC3_RF_PWM (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC3_RF_PWM*(1<<16) + FSTID135_AFE_AFE_AGC3_RF_PWM_AGC3_RF_PWM__MASK)

#define REG_RSTID135_AFE_AFE_AGC4_RF_PWM (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC4_RF_PWM)
#define FLD_FSTID135_AFE_AFE_AGC4_RF_PWM_AGC4_RF_PWM (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC4_RF_PWM*(1<<16) + FSTID135_AFE_AFE_AGC4_RF_PWM_AGC4_RF_PWM__MASK)

#define REG_RSTID135_AFE_AFE_AGC1_BB_PWM (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC1_BB_PWM)
#define FLD_FSTID135_AFE_AFE_AGC1_BB_PWM_AGC1_BB_PWM (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC1_BB_PWM*(1<<16) + FSTID135_AFE_AFE_AGC1_BB_PWM_AGC1_BB_PWM__MASK)

#define REG_RSTID135_AFE_AFE_AGC2_BB_PWM (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC2_BB_PWM)
#define FLD_FSTID135_AFE_AFE_AGC2_BB_PWM_AGC2_BB_PWM (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC2_BB_PWM*(1<<16) + FSTID135_AFE_AFE_AGC2_BB_PWM_AGC2_BB_PWM__MASK)

#define REG_RSTID135_AFE_AFE_AGC3_BB_PWM (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC3_BB_PWM)
#define FLD_FSTID135_AFE_AFE_AGC3_BB_PWM_AGC3_BB_PWM (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC3_BB_PWM*(1<<16) + FSTID135_AFE_AFE_AGC3_BB_PWM_AGC3_BB_PWM__MASK)

#define REG_RSTID135_AFE_AFE_AGC4_BB_PWM (AFE_CTRL[0] + RSTID135_AFE_AFE_AGC4_BB_PWM)
#define FLD_FSTID135_AFE_AFE_AGC4_BB_PWM_AGC4_BB_PWM (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_AGC4_BB_PWM*(1<<16) + FSTID135_AFE_AFE_AGC4_BB_PWM_AGC4_BB_PWM__MASK)

#define REG_RSTID135_AFE_AFE_FSK (AFE_CTRL[0] + RSTID135_AFE_AFE_FSK)
#define FLD_FSTID135_AFE_AFE_FSK_FSK_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FSK*(1<<16) + FSTID135_AFE_AFE_FSK_FSK_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_FSK_FSK_OPENLOOP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FSK*(1<<16) + FSTID135_AFE_AFE_FSK_FSK_OPENLOOP__MASK)

#define REG_RSTID135_AFE_AFE_DISEQC (AFE_CTRL[0] + RSTID135_AFE_AFE_DISEQC)
#define FLD_FSTID135_AFE_AFE_DISEQC_DISEQC_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DISEQC*(1<<16) + FSTID135_AFE_AFE_DISEQC_DISEQC_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_DISEQC_DISEQC_CLK_DIV (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DISEQC*(1<<16) + FSTID135_AFE_AFE_DISEQC_DISEQC_CLK_DIV__MASK)
#define FLD_FSTID135_AFE_AFE_DISEQC_DISEQC_ENCH (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DISEQC*(1<<16) + FSTID135_AFE_AFE_DISEQC_DISEQC_ENCH__MASK)

#define REG_RSTID135_AFE_AFE_LNBCTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_LNBCTRL)
#define FLD_FSTID135_AFE_AFE_LNBCTRL_LNBCTRL_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LNBCTRL*(1<<16) + FSTID135_AFE_AFE_LNBCTRL_LNBCTRL_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_LNBCTRL_LNBCTRL_ISENSE_TH (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LNBCTRL*(1<<16) + FSTID135_AFE_AFE_LNBCTRL_LNBCTRL_ISENSE_TH__MASK)
#define FLD_FSTID135_AFE_AFE_LNBCTRL_LNBCTRL_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LNBCTRL*(1<<16) + FSTID135_AFE_AFE_LNBCTRL_LNBCTRL_TST__MASK)

#define REG_RSTID135_AFE_AFE_BIAS_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_BIAS_CTRL)
#define FLD_FSTID135_AFE_AFE_BIAS_CTRL_BIAS_RCAL_START (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BIAS_CTRL*(1<<16) + FSTID135_AFE_AFE_BIAS_CTRL_BIAS_RCAL_START__MASK)
#define FLD_FSTID135_AFE_AFE_BIAS_CTRL_BIAS_RCAL_OFF (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BIAS_CTRL*(1<<16) + FSTID135_AFE_AFE_BIAS_CTRL_BIAS_RCAL_OFF__MASK)
#define FLD_FSTID135_AFE_AFE_BIAS_CTRL_BIAS_RCAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BIAS_CTRL*(1<<16) + FSTID135_AFE_AFE_BIAS_CTRL_BIAS_RCAL__MASK)
#define FLD_FSTID135_AFE_AFE_BIAS_CTRL_BIAS_RCAL_CLK_DIV (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BIAS_CTRL*(1<<16) + FSTID135_AFE_AFE_BIAS_CTRL_BIAS_RCAL_CLK_DIV__MASK)
#define FLD_FSTID135_AFE_AFE_BIAS_CTRL_BIAS_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_BIAS_CTRL*(1<<16) + FSTID135_AFE_AFE_BIAS_CTRL_BIAS_TST__MASK)

#define REG_RSTID135_AFE_AFE_LDO2V5_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_LDO2V5_CTRL)
#define FLD_FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LDO2V5_CTRL*(1<<16) + FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_VSEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LDO2V5_CTRL*(1<<16) + FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_VSEL__MASK)
#define FLD_FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_VREG_OK_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LDO2V5_CTRL*(1<<16) + FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_VREG_OK_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_POR_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LDO2V5_CTRL*(1<<16) + FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_POR_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_POR_BYPASS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LDO2V5_CTRL*(1<<16) + FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_POR_BYPASS__MASK)
#define FLD_FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_LDO2V5_CTRL*(1<<16) + FSTID135_AFE_AFE_LDO2V5_CTRL_LDO_TST__MASK)

#define REG_RSTID135_AFE_AFE_DCDC1V8_CTRL (AFE_CTRL[0] + RSTID135_AFE_AFE_DCDC1V8_CTRL)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_PWD (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CTRL*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_PWD__MASK)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_ISEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CTRL*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_ISEL__MASK)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_VREF_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CTRL*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_VREF_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_CLK_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CTRL*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_CLK_SEL__MASK)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_POR_BYPASS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CTRL*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_POR_BYPASS__MASK)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_SAF_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CTRL*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CTRL_DCDC_SAF_DIS__MASK)

#define REG_RSTID135_AFE_AFE_DCDC1V8_CAL1 (AFE_CTRL[0] + RSTID135_AFE_AFE_DCDC1V8_CAL1)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CAL1_DCDC_CAL_START (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CAL1*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CAL1_DCDC_CAL_START__MASK)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CAL1_DCDC_CAL_OFF (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CAL1*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CAL1_DCDC_CAL_OFF__MASK)

#define REG_RSTID135_AFE_AFE_DCDC1V8_CAL2 (AFE_CTRL[0] + RSTID135_AFE_AFE_DCDC1V8_CAL2)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_CAL2_DCDC_CAPA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_CAL2*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_CAL2_DCDC_CAPA__MASK)

#define REG_RSTID135_AFE_AFE_DCDC1V8_TST (AFE_CTRL[0] + RSTID135_AFE_AFE_DCDC1V8_TST)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_TST_DCDC_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_TST*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_TST_DCDC_TST__MASK)
#define FLD_FSTID135_AFE_AFE_DCDC1V8_TST_DCDC_TSTA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_DCDC1V8_TST*(1<<16) + FSTID135_AFE_AFE_DCDC1V8_TST_DCDC_TSTA__MASK)

#define REG_RSTID135_AFE_AFE_TST_CTRL1 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_CTRL1)
#define FLD_FSTID135_AFE_AFE_TST_CTRL1_BUF12_I_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL1*(1<<16) + FSTID135_AFE_AFE_TST_CTRL1_BUF12_I_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL1_BUF12_I_DIR (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL1*(1<<16) + FSTID135_AFE_AFE_TST_CTRL1_BUF12_I_DIR__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL1_KELVIN12_IN (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL1*(1<<16) + FSTID135_AFE_AFE_TST_CTRL1_KELVIN12_IN__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL1_KELVIN12_IP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL1*(1<<16) + FSTID135_AFE_AFE_TST_CTRL1_KELVIN12_IP__MASK)

#define REG_RSTID135_AFE_AFE_TST_CTRL2 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_CTRL2)
#define FLD_FSTID135_AFE_AFE_TST_CTRL2_BUF12_Q_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL2*(1<<16) + FSTID135_AFE_AFE_TST_CTRL2_BUF12_Q_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL2_BUF12_Q_DIR (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL2*(1<<16) + FSTID135_AFE_AFE_TST_CTRL2_BUF12_Q_DIR__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL2_KELVIN12_QN (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL2*(1<<16) + FSTID135_AFE_AFE_TST_CTRL2_KELVIN12_QN__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL2_KELVIN12_QP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL2*(1<<16) + FSTID135_AFE_AFE_TST_CTRL2_KELVIN12_QP__MASK)

#define REG_RSTID135_AFE_AFE_TST_CTRL3 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_CTRL3)
#define FLD_FSTID135_AFE_AFE_TST_CTRL3_BUF34_I_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL3*(1<<16) + FSTID135_AFE_AFE_TST_CTRL3_BUF34_I_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL3_BUF34_I_DIR (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL3*(1<<16) + FSTID135_AFE_AFE_TST_CTRL3_BUF34_I_DIR__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL3_KELVIN34_IN (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL3*(1<<16) + FSTID135_AFE_AFE_TST_CTRL3_KELVIN34_IN__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL3_KELVIN34_IP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL3*(1<<16) + FSTID135_AFE_AFE_TST_CTRL3_KELVIN34_IP__MASK)

#define REG_RSTID135_AFE_AFE_TST_CTRL4 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_CTRL4)
#define FLD_FSTID135_AFE_AFE_TST_CTRL4_BUF34_Q_ENA (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL4*(1<<16) + FSTID135_AFE_AFE_TST_CTRL4_BUF34_Q_ENA__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL4_BUF34_Q_DIR (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL4*(1<<16) + FSTID135_AFE_AFE_TST_CTRL4_BUF34_Q_DIR__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL4_KELVIN34_QN (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL4*(1<<16) + FSTID135_AFE_AFE_TST_CTRL4_KELVIN34_QN__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL4_KELVIN34_QP (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL4*(1<<16) + FSTID135_AFE_AFE_TST_CTRL4_KELVIN34_QP__MASK)

#define REG_RSTID135_AFE_AFE_TST_CTRL5 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_CTRL5)
#define FLD_FSTID135_AFE_AFE_TST_CTRL5_BUF12_I_ZIN50 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL5*(1<<16) + FSTID135_AFE_AFE_TST_CTRL5_BUF12_I_ZIN50__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL5_BUF12_Q_ZIN50 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL5*(1<<16) + FSTID135_AFE_AFE_TST_CTRL5_BUF12_Q_ZIN50__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL5_BUF34_I_ZIN50 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL5*(1<<16) + FSTID135_AFE_AFE_TST_CTRL5_BUF34_I_ZIN50__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL5_BUF34_Q_ZIN50 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL5*(1<<16) + FSTID135_AFE_AFE_TST_CTRL5_BUF34_Q_ZIN50__MASK)

#define REG_RSTID135_AFE_AFE_TST_CTRL6 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_CTRL6)
#define FLD_FSTID135_AFE_AFE_TST_CTRL6_BB1_I_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL6*(1<<16) + FSTID135_AFE_AFE_TST_CTRL6_BB1_I_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL6_BB1_Q_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL6*(1<<16) + FSTID135_AFE_AFE_TST_CTRL6_BB1_Q_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL6_BB2_I_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL6*(1<<16) + FSTID135_AFE_AFE_TST_CTRL6_BB2_I_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL6_BB2_Q_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL6*(1<<16) + FSTID135_AFE_AFE_TST_CTRL6_BB2_Q_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL6_BB3_I_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL6*(1<<16) + FSTID135_AFE_AFE_TST_CTRL6_BB3_I_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL6_BB3_Q_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL6*(1<<16) + FSTID135_AFE_AFE_TST_CTRL6_BB3_Q_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL6_BB4_I_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL6*(1<<16) + FSTID135_AFE_AFE_TST_CTRL6_BB4_I_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_CTRL6_BB4_Q_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_CTRL6*(1<<16) + FSTID135_AFE_AFE_TST_CTRL6_BB4_Q_TST__MASK)

#define REG_RSTID135_AFE_AFE_TST_RF12 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_RF12)
#define FLD_FSTID135_AFE_AFE_TST_RF12_RF1_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_RF12*(1<<16) + FSTID135_AFE_AFE_TST_RF12_RF1_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_RF12_RF2_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_RF12*(1<<16) + FSTID135_AFE_AFE_TST_RF12_RF2_TST__MASK)

#define REG_RSTID135_AFE_AFE_TST_RF34 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_RF34)
#define FLD_FSTID135_AFE_AFE_TST_RF34_RF3_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_RF34*(1<<16) + FSTID135_AFE_AFE_TST_RF34_RF3_TST__MASK)
#define FLD_FSTID135_AFE_AFE_TST_RF34_RF4_TST (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_RF34*(1<<16) + FSTID135_AFE_AFE_TST_RF34_RF4_TST__MASK)

#define REG_RSTID135_AFE_AFE_TST_BB12 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_BB12)
#define FLD_FSTID135_AFE_AFE_TST_BB12_BB1_TST_AVDD_SENSE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB12*(1<<16) + FSTID135_AFE_AFE_TST_BB12_BB1_TST_AVDD_SENSE__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB12_BB1_TST_BYPASS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB12*(1<<16) + FSTID135_AFE_AFE_TST_BB12_BB1_TST_BYPASS__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB12_BB1_TST_GMCOMP_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB12*(1<<16) + FSTID135_AFE_AFE_TST_BB12_BB1_TST_GMCOMP_DIS__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB12_BB2_TST_AVDD_SENSE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB12*(1<<16) + FSTID135_AFE_AFE_TST_BB12_BB2_TST_AVDD_SENSE__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB12_BB2_TST_BYPASS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB12*(1<<16) + FSTID135_AFE_AFE_TST_BB12_BB2_TST_BYPASS__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB12_BB2_TST_GMCOMP_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB12*(1<<16) + FSTID135_AFE_AFE_TST_BB12_BB2_TST_GMCOMP_DIS__MASK)

#define REG_RSTID135_AFE_AFE_TST_BB34 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_BB34)
#define FLD_FSTID135_AFE_AFE_TST_BB34_BB3_TST_AVDD_SENSE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB34*(1<<16) + FSTID135_AFE_AFE_TST_BB34_BB3_TST_AVDD_SENSE__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB34_BB3_TST_BYPASS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB34*(1<<16) + FSTID135_AFE_AFE_TST_BB34_BB3_TST_BYPASS__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB34_BB3_TST_GMCOMP_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB34*(1<<16) + FSTID135_AFE_AFE_TST_BB34_BB3_TST_GMCOMP_DIS__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB34_BB4_TST_AVDD_SENSE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB34*(1<<16) + FSTID135_AFE_AFE_TST_BB34_BB4_TST_AVDD_SENSE__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB34_BB4_TST_BYPASS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB34*(1<<16) + FSTID135_AFE_AFE_TST_BB34_BB4_TST_BYPASS__MASK)
#define FLD_FSTID135_AFE_AFE_TST_BB34_BB4_TST_GMCOMP_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_BB34*(1<<16) + FSTID135_AFE_AFE_TST_BB34_BB4_TST_GMCOMP_DIS__MASK)

#define REG_RSTID135_AFE_AFE_TST_SPARE1 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_SPARE1)
#define FLD_FSTID135_AFE_AFE_TST_SPARE1_TST_SPARE1_BITS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_SPARE1*(1<<16) + FSTID135_AFE_AFE_TST_SPARE1_TST_SPARE1_BITS__MASK)

#define REG_RSTID135_AFE_AFE_TST_SPARE2 (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_SPARE2)
#define FLD_FSTID135_AFE_AFE_TST_SPARE2_TST_SPARE2_BITS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_SPARE2*(1<<16) + FSTID135_AFE_AFE_TST_SPARE2_TST_SPARE2_BITS__MASK)

#define REG_RSTID135_AFE_AFE_TST_MODE (AFE_CTRL[0] + RSTID135_AFE_AFE_TST_MODE)
#define FLD_FSTID135_AFE_AFE_TST_MODE_TST_MODE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_TST_MODE*(1<<16) + FSTID135_AFE_AFE_TST_MODE_TST_MODE__MASK)

#define REG_RSTID135_AFE_AFE_ID (AFE_CTRL[0] + RSTID135_AFE_AFE_ID)
#define FLD_FSTID135_AFE_AFE_ID_FIX_ID (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ID*(1<<16) + FSTID135_AFE_AFE_ID_FIX_ID__MASK)
#define FLD_FSTID135_AFE_AFE_ID_CUT_ID (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_ID*(1<<16) + FSTID135_AFE_AFE_ID_CUT_ID__MASK)

#define REG_RSTID135_AFE_AFE_STATUS (AFE_CTRL[0] + RSTID135_AFE_AFE_STATUS)
#define FLD_FSTID135_AFE_AFE_STATUS_LDO_VREG_OK (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_STATUS*(1<<16) + FSTID135_AFE_AFE_STATUS_LDO_VREG_OK__MASK)
#define FLD_FSTID135_AFE_AFE_STATUS_LDO_POR_3V3 (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_STATUS*(1<<16) + FSTID135_AFE_AFE_STATUS_LDO_POR_3V3__MASK)
#define FLD_FSTID135_AFE_AFE_STATUS_DCDC_VREG_OK (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_STATUS*(1<<16) + FSTID135_AFE_AFE_STATUS_DCDC_VREG_OK__MASK)
#define FLD_FSTID135_AFE_AFE_STATUS_LNBCTRL_ISENSE (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_STATUS*(1<<16) + FSTID135_AFE_AFE_STATUS_LNBCTRL_ISENSE__MASK)
#define FLD_FSTID135_AFE_AFE_STATUS_PLL_LOCK (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_STATUS*(1<<16) + FSTID135_AFE_AFE_STATUS_PLL_LOCK__MASK)

#define REG_RSTID135_AFE_AFE_FUSE1 (AFE_CTRL[0] + RSTID135_AFE_AFE_FUSE1)
#define FLD_FSTID135_AFE_AFE_FUSE1_SAF_RX_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE1*(1<<16) + FSTID135_AFE_AFE_FUSE1_SAF_RX_DIS__MASK)
#define FLD_FSTID135_AFE_AFE_FUSE1_SAF_TSTMODE_REG_DIS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE1*(1<<16) + FSTID135_AFE_AFE_FUSE1_SAF_TSTMODE_REG_DIS__MASK)
#define FLD_FSTID135_AFE_AFE_FUSE1_SAF_DCDC1V8_VREF_SEL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE1*(1<<16) + FSTID135_AFE_AFE_FUSE1_SAF_DCDC1V8_VREF_SEL__MASK)

#define REG_RSTID135_AFE_AFE_FUSE2 (AFE_CTRL[0] + RSTID135_AFE_AFE_FUSE2)
#define FLD_FSTID135_AFE_AFE_FUSE2_SAF_BB1I_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE2*(1<<16) + FSTID135_AFE_AFE_FUSE2_SAF_BB1I_CAL__MASK)

#define REG_RSTID135_AFE_AFE_FUSE3 (AFE_CTRL[0] + RSTID135_AFE_AFE_FUSE3)
#define FLD_FSTID135_AFE_AFE_FUSE3_SAF_BB2I_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE3*(1<<16) + FSTID135_AFE_AFE_FUSE3_SAF_BB2I_CAL__MASK)

#define REG_RSTID135_AFE_AFE_FUSE4 (AFE_CTRL[0] + RSTID135_AFE_AFE_FUSE4)
#define FLD_FSTID135_AFE_AFE_FUSE4_SAF_BB3I_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE4*(1<<16) + FSTID135_AFE_AFE_FUSE4_SAF_BB3I_CAL__MASK)

#define REG_RSTID135_AFE_AFE_FUSE5 (AFE_CTRL[0] + RSTID135_AFE_AFE_FUSE5)
#define FLD_FSTID135_AFE_AFE_FUSE5_SAF_BB4I_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE5*(1<<16) + FSTID135_AFE_AFE_FUSE5_SAF_BB4I_CAL__MASK)

#define REG_RSTID135_AFE_AFE_FUSE6 (AFE_CTRL[0] + RSTID135_AFE_AFE_FUSE6)
#define FLD_FSTID135_AFE_AFE_FUSE6_SAF_BB1Q_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE6*(1<<16) + FSTID135_AFE_AFE_FUSE6_SAF_BB1Q_CAL__MASK)
#define FLD_FSTID135_AFE_AFE_FUSE6_SAF_BB2Q_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE6*(1<<16) + FSTID135_AFE_AFE_FUSE6_SAF_BB2Q_CAL__MASK)
#define FLD_FSTID135_AFE_AFE_FUSE6_SAF_BB3Q_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE6*(1<<16) + FSTID135_AFE_AFE_FUSE6_SAF_BB3Q_CAL__MASK)
#define FLD_FSTID135_AFE_AFE_FUSE6_SAF_BB4Q_CAL (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_FUSE6*(1<<16) + FSTID135_AFE_AFE_FUSE6_SAF_BB4Q_CAL__MASK)

#define REG_RSTID135_AFE_AFE_IRQ_MASK (AFE_CTRL[0] + RSTID135_AFE_AFE_IRQ_MASK)
#define FLD_FSTID135_AFE_AFE_IRQ_MASK_LDO_KO_MSK (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_IRQ_MASK*(1<<16) + FSTID135_AFE_AFE_IRQ_MASK_LDO_KO_MSK__MASK)
#define FLD_FSTID135_AFE_AFE_IRQ_MASK_DCDC_KO_MSK (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_IRQ_MASK*(1<<16) + FSTID135_AFE_AFE_IRQ_MASK_DCDC_KO_MSK__MASK)

#define REG_RSTID135_AFE_AFE_IRQ (AFE_CTRL[0] + RSTID135_AFE_AFE_IRQ)
#define FLD_FSTID135_AFE_AFE_IRQ_LDO_KO (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_IRQ*(1<<16) + FSTID135_AFE_AFE_IRQ_LDO_KO__MASK)
#define FLD_FSTID135_AFE_AFE_IRQ_DCDC_KO (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_IRQ*(1<<16) + FSTID135_AFE_AFE_IRQ_DCDC_KO__MASK)

#define REG_RSTID135_AFE_AFE_SPARE1 (AFE_CTRL[0] + RSTID135_AFE_AFE_SPARE1)
#define FLD_FSTID135_AFE_AFE_SPARE1_SPARE1_BITS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_SPARE1*(1<<16) + FSTID135_AFE_AFE_SPARE1_SPARE1_BITS__MASK)

#define REG_RSTID135_AFE_AFE_SPARE2 (AFE_CTRL[0] + RSTID135_AFE_AFE_SPARE2)
#define FLD_FSTID135_AFE_AFE_SPARE2_SPARE2_BITS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_SPARE2*(1<<16) + FSTID135_AFE_AFE_SPARE2_SPARE2_BITS__MASK)

#define REG_RSTID135_AFE_AFE_SPARE3 (AFE_CTRL[0] + RSTID135_AFE_AFE_SPARE3)
#define FLD_FSTID135_AFE_AFE_SPARE3_SPARE3_BITS (AFE_CTRL[0]*(1<<16) + RSTID135_AFE_AFE_SPARE3*(1<<16) + FSTID135_AFE_AFE_SPARE3_SPARE3_BITS__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_OBS (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_OBS__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_CMDTCO (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_CMDTCO__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_PDN (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_PDN__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_DCORRECT (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_DCORRECT__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_SRSTN (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_SRSTN__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_TEST (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_TEST__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_CLK_INV (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_CONFIG_CLK_INV__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_COMPOUT (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_COMPOUT__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_INTREG (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_INTREG__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_OVERFLOW (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_OVERFLOW__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_DATAREADY (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_DATAREADY__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_TEMP_DATA (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_STATUS_TEMP_DATA__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_THRESH (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_THRESH)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_THRESH_INT_THRESH_HI (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_THRESH*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_THRESH_INT_THRESH_HI__MASK)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_THRESH_INT_THRESH_LO (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_THRESH*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_THRESH_INT_THRESH_LO__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_ENABLE (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_ENABLE)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_ENABLE_INT_ENABLE (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_ENABLE*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_ENABLE_INT_ENABLE__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_EVENT (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_EVENT)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_EVENT_INT_EVENT (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_EVENT*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_EVENT_INT_EVENT__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_STATUS (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_STATUS)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_STATUS_INT_STATUS (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_INT_STATUS*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_INT_STATUS_INT_STATUS__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_THRESH (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_THRESH)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_THRESH_LPA_THRESH (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_THRESH*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_THRESH_LPA_THRESH__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_ENABLE (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_ENABLE)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_ENABLE_LPA_ENABLE (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_ENABLE*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_ENABLE_LPA_ENABLE__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_EVENT (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_EVENT)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_EVENT_LPA_EVENT (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_EVENT*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_EVENT_LPA_EVENT__MASK)

#define REG_RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_STATUS (THSENSOR[0] + RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_STATUS)
#define FLD_FSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_STATUS_LPA_STATUS (THSENSOR[0]*(1<<16) + RSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_STATUS*(1<<16) + FSTID135_C9THS_GLUE_TOP_TSENSOR_LPA_STATUS_LPA_STATUS__MASK)

#define REG_RSTID135_PWMTIMER_PWM_VAL0 (PWM[0] + RSTID135_PWMTIMER_PWM_VAL0)
#define FLD_FSTID135_PWMTIMER_PWM_VAL0_PWM_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_VAL0*(1<<16) + FSTID135_PWMTIMER_PWM_VAL0_PWM_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_VAL1 (PWM[0] + RSTID135_PWMTIMER_PWM_VAL1)
#define FLD_FSTID135_PWMTIMER_PWM_VAL1_PWM_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_VAL1*(1<<16) + FSTID135_PWMTIMER_PWM_VAL1_PWM_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_VAL2 (PWM[0] + RSTID135_PWMTIMER_PWM_VAL2)
#define FLD_FSTID135_PWMTIMER_PWM_VAL2_PWM_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_VAL2*(1<<16) + FSTID135_PWMTIMER_PWM_VAL2_PWM_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_VAL3 (PWM[0] + RSTID135_PWMTIMER_PWM_VAL3)
#define FLD_FSTID135_PWMTIMER_PWM_VAL3_PWM_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_VAL3*(1<<16) + FSTID135_PWMTIMER_PWM_VAL3_PWM_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_VAL0 (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_VAL0)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_VAL0_CPT_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_VAL0*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_VAL0_CPT_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_VAL1 (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_VAL1)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_VAL1_CPT_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_VAL1*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_VAL1_CPT_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_VAL2 (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_VAL2)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_VAL2_CPT_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_VAL2*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_VAL2_CPT_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_VAL3 (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_VAL3)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_VAL3_CPT_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_VAL3*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_VAL3_CPT_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CMP_VAL0 (PWM[0] + RSTID135_PWMTIMER_PWM_CMP_VAL0)
#define FLD_FSTID135_PWMTIMER_PWM_CMP_VAL0_CMP_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CMP_VAL0*(1<<16) + FSTID135_PWMTIMER_PWM_CMP_VAL0_CMP_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CMP_VAL1 (PWM[0] + RSTID135_PWMTIMER_PWM_CMP_VAL1)
#define FLD_FSTID135_PWMTIMER_PWM_CMP_VAL1_CMP_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CMP_VAL1*(1<<16) + FSTID135_PWMTIMER_PWM_CMP_VAL1_CMP_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CMP_VAL2 (PWM[0] + RSTID135_PWMTIMER_PWM_CMP_VAL2)
#define FLD_FSTID135_PWMTIMER_PWM_CMP_VAL2_CMP_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CMP_VAL2*(1<<16) + FSTID135_PWMTIMER_PWM_CMP_VAL2_CMP_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CMP_VAL3 (PWM[0] + RSTID135_PWMTIMER_PWM_CMP_VAL3)
#define FLD_FSTID135_PWMTIMER_PWM_CMP_VAL3_CMP_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CMP_VAL3*(1<<16) + FSTID135_PWMTIMER_PWM_CMP_VAL3_CMP_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_EDGE0 (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_EDGE0)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_EDGE0_CE (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_EDGE0*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_EDGE0_CE__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_EDGE1 (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_EDGE1)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_EDGE1_CE (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_EDGE1*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_EDGE1_CE__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_EDGE2 (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_EDGE2)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_EDGE2_CE (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_EDGE2*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_EDGE2_CE__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_EDGE3 (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_EDGE3)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_EDGE3_CE (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_EDGE3*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_EDGE3_CE__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CMP_OUT_VAL0 (PWM[0] + RSTID135_PWMTIMER_PWM_CMP_OUT_VAL0)
#define FLD_FSTID135_PWMTIMER_PWM_CMP_OUT_VAL0_CPT_OUT_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CMP_OUT_VAL0*(1<<16) + FSTID135_PWMTIMER_PWM_CMP_OUT_VAL0_CPT_OUT_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CMP_OUT_VAL1 (PWM[0] + RSTID135_PWMTIMER_PWM_CMP_OUT_VAL1)
#define FLD_FSTID135_PWMTIMER_PWM_CMP_OUT_VAL1_CPT_OUT_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CMP_OUT_VAL1*(1<<16) + FSTID135_PWMTIMER_PWM_CMP_OUT_VAL1_CPT_OUT_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CMP_OUT_VAL2 (PWM[0] + RSTID135_PWMTIMER_PWM_CMP_OUT_VAL2)
#define FLD_FSTID135_PWMTIMER_PWM_CMP_OUT_VAL2_CPT_OUT_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CMP_OUT_VAL2*(1<<16) + FSTID135_PWMTIMER_PWM_CMP_OUT_VAL2_CPT_OUT_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CMP_OUT_VAL3 (PWM[0] + RSTID135_PWMTIMER_PWM_CMP_OUT_VAL3)
#define FLD_FSTID135_PWMTIMER_PWM_CMP_OUT_VAL3_CPT_OUT_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CMP_OUT_VAL3*(1<<16) + FSTID135_PWMTIMER_PWM_CMP_OUT_VAL3_CPT_OUT_VAL__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CTRL (PWM[0] + RSTID135_PWMTIMER_PWM_CTRL)
#define FLD_FSTID135_PWMTIMER_PWM_CTRL_PWM_CLK_VALL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CTRL*(1<<16) + FSTID135_PWMTIMER_PWM_CTRL_PWM_CLK_VALL__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_CTRL_CPT_CLK_VAL (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CTRL*(1<<16) + FSTID135_PWMTIMER_PWM_CTRL_CPT_CLK_VAL__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_CTRL_PWM_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CTRL*(1<<16) + FSTID135_PWMTIMER_PWM_CTRL_PWM_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_CTRL_CPT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CTRL*(1<<16) + FSTID135_PWMTIMER_PWM_CTRL_CPT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_CTRL_PWM_CLK_VALH (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CTRL*(1<<16) + FSTID135_PWMTIMER_PWM_CTRL_PWM_CLK_VALH__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_CTRL_VSYNC_ENABLE (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CTRL*(1<<16) + FSTID135_PWMTIMER_PWM_CTRL_VSYNC_ENABLE__MASK)

#define REG_RSTID135_PWMTIMER_PWM_INT_EN (PWM[0] + RSTID135_PWMTIMER_PWM_INT_EN)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_PWM_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_PWM_INT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_CPT0_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_CPT0_INT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_CPT1_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_CPT1_INT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_CPT2_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_CPT2_INT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_CPT3_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_CPT3_INT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_CMP0_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_CMP0_INT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_CMP1_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_CMP1_INT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_CMP2_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_CMP2_INT_EN__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_EN_CMP3_INT_EN (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_EN*(1<<16) + FSTID135_PWMTIMER_PWM_INT_EN_CMP3_INT_EN__MASK)

#define REG_RSTID135_PWMTIMER_PWM_INT_STA (PWM[0] + RSTID135_PWMTIMER_PWM_INT_STA)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_PWM_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_PWM_INT__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_CPT0_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_CPT0_INT__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_CPT1_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_CPT1_INT__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_CPT2_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_CPT2_INT__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_CPT3_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_CPT3_INT__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_CMP0_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_CMP0_INT__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_CMP1_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_CMP1_INT__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_CMP2_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_CMP2_INT__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_STA_CMP3_INT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_STA*(1<<16) + FSTID135_PWMTIMER_PWM_INT_STA_CMP3_INT__MASK)

#define REG_RSTID135_PWMTIMER_PWM_INT_ACK (PWM[0] + RSTID135_PWMTIMER_PWM_INT_ACK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_PWM_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_PWM_INT_ACK__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_CPT0_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_CPT0_INT_ACK__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_CPT1_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_CPT1_INT_ACK__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_CPT2_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_CPT2_INT_ACK__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_CPT3_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_CPT3_INT_ACK__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_CMP0_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_CMP0_INT_ACK__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_CMP1_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_CMP1_INT_ACK__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_CMP2_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_CMP2_INT_ACK__MASK)
#define FLD_FSTID135_PWMTIMER_PWM_INT_ACK_CMP3_INT_ACK (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_INT_ACK*(1<<16) + FSTID135_PWMTIMER_PWM_INT_ACK_CMP3_INT_ACK__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CNT (PWM[0] + RSTID135_PWMTIMER_PWM_CNT)
#define FLD_FSTID135_PWMTIMER_PWM_CNT_PWM_CNT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CNT*(1<<16) + FSTID135_PWMTIMER_PWM_CNT_PWM_CNT__MASK)

#define REG_RSTID135_PWMTIMER_PWM_CPT_CMP_CNT (PWM[0] + RSTID135_PWMTIMER_PWM_CPT_CMP_CNT)
#define FLD_FSTID135_PWMTIMER_PWM_CPT_CMP_CNT_CPT_CMP_CNT (PWM[0]*(1<<16) + RSTID135_PWMTIMER_PWM_CPT_CMP_CNT*(1<<16) + FSTID135_PWMTIMER_PWM_CPT_CMP_CNT_CPT_CMP_CNT__MASK)

#define REG_RSTID135_C8IRQ_MERGER_TOP_IRQ_POL (IRQMERGER[0] + RSTID135_C8IRQ_MERGER_TOP_IRQ_POL)
#define FLD_FSTID135_C8IRQ_MERGER_TOP_IRQ_POL_IRQ_POL (IRQMERGER[0]*(1<<16) + RSTID135_C8IRQ_MERGER_TOP_IRQ_POL*(1<<16) + FSTID135_C8IRQ_MERGER_TOP_IRQ_POL_IRQ_POL__MASK)

#define REG_RSTID135_C8IRQ_MERGER_TOP_IRQ_VAL (IRQMERGER[0] + RSTID135_C8IRQ_MERGER_TOP_IRQ_VAL)
#define FLD_FSTID135_C8IRQ_MERGER_TOP_IRQ_VAL_IRQ_VAL (IRQMERGER[0]*(1<<16) + RSTID135_C8IRQ_MERGER_TOP_IRQ_VAL*(1<<16) + FSTID135_C8IRQ_MERGER_TOP_IRQ_VAL_IRQ_VAL__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN0 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN1 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN2 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN3 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG0_PWM_CAPTURE_IN3__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS16 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS16)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS16_PWM_CAMPARE_OUT (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS16*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS16_PWM_CAMPARE_OUT__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS17 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS17)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS17_PWM_OUT (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS17*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS17_PWM_OUT__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG32 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG32)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG32_RESET_LEVEL1_N (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG32*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG32_RESET_LEVEL1_N__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS48 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS48)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS48_MODE_PIN_OUT (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS48*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS48_MODE_PIN_OUT__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS49 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS49)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS49_NOTRESETOUT (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS49*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS49_NOTRESETOUT__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG64 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG64)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG64_I2C_ADD_ID0 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG64*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG64_I2C_ADD_ID0__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG65 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG65)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG65_I2C_ADD_ID1 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG65*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG65_I2C_ADD_ID1__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG66 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG66)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG66_I2C_ADD_ID2 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG66*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG66_I2C_ADD_ID2__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG67 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG67)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG67_I2C_ADD_ID3 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG67*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG67_I2C_ADD_ID3__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_I2C_ENABLE (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_I2C_ENABLE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_MSB_FIRST (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_MSB_FIRST__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_I2C_ID_BASE (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG68_I2C_ID_BASE__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80_I2C_STORE_OP_SBAG (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80_I2C_STORE_OP_SBAG__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80_I2C_LOAD_OP_SBAG (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS80_I2C_LOAD_OP_SBAG__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD0 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD1 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD2 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG96_SAFA_TREAD2__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS97 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS97)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS97_OXFORD_DEVICE_ID (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS97*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS97_OXFORD_DEVICE_ID__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS98 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS98)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS98_SOUTH_SYSTEM_STATUS_ENG_METAL_FIX_NB (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS98*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS98_SOUTH_SYSTEM_STATUS_ENG_METAL_FIX_NB__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS99 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS99)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS99_SOUTH_SYSTEM_STATUS_ENG_PROC_TYPE (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS99*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS99_SOUTH_SYSTEM_STATUS_ENG_PROC_TYPE__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS100 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS100)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS100_SOUTH_SYSTEM_STATUS_ENG_FAB_LOC (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS100_SOUTH_SYSTEM_STATUS_ENG_FAB_LOC__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS101 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS101)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS101_SOUTH_SYSTEM_STATUS_ENG_SUBSTRATE_VER (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS101_SOUTH_SYSTEM_STATUS_ENG_SUBSTRATE_VER__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS102 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS102)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS102_SOUTH_SYSTEM_STATUS_ENG_PROG_TRACK (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS102_SOUTH_SYSTEM_STATUS_ENG_PROG_TRACK__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS103 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS103)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS103_SOUTH_SYSTEM_STATUS_ENG_SALES_TYPE (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS103_SOUTH_SYSTEM_STATUS_ENG_SALES_TYPE__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS112 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS112)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS112_SOUTH_SYSTEM_STATUS_RX_DIS (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS112_SOUTH_SYSTEM_STATUS_RX_DIS__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS113 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS113)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS113_SOUTH_SYSTEM_STATUS_DCDCVREF_TST (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS113_SOUTH_SYSTEM_STATUS_DCDCVREF_TST__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS114 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS114)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS114_SOUTH_SYSTEM_STATUS_RX1_BB_CAL (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS114_SOUTH_SYSTEM_STATUS_RX1_BB_CAL__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS115 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS115)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS115_SOUTH_SYSTEM_STATUS_RX2_BB_CAL (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS115_SOUTH_SYSTEM_STATUS_RX2_BB_CAL__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS116 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS116)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS116_SOUTH_SYSTEM_STATUS_RX3_BB_CAL (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS116_SOUTH_SYSTEM_STATUS_RX3_BB_CAL__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS117 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS117)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS117_SOUTH_SYSTEM_STATUS_RX4_BB_CAL (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS117_SOUTH_SYSTEM_STATUS_RX4_BB_CAL__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS118 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS118)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS118_SOUTH_SYSTEM_STATUS_RXS_BB_CAL (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS118_SOUTH_SYSTEM_STATUS_RXS_BB_CAL__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS119 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS119)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS119_SOUTH_SYSTEM_STATUS_RX1_RF_PWR (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS119_SOUTH_SYSTEM_STATUS_RX1_RF_PWR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS120 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS120)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS120_SOUTH_SYSTEM_STATUS_RX2_RF_PWR (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS120_SOUTH_SYSTEM_STATUS_RX2_RF_PWR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS121 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS121)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS121_SOUTH_SYSTEM_STATUS_RX3_RF_PWR (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS121_SOUTH_SYSTEM_STATUS_RX3_RF_PWR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS122 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS122)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS122_SOUTH_SYSTEM_STATUS_RX4_RF_PWR (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS122_SOUTH_SYSTEM_STATUS_RX4_RF_PWR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS123 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS123)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS123_SOUTH_SYSTEM_STATUS_RXS_RF_PWR (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS123_SOUTH_SYSTEM_STATUS_RXS_RF_PWR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS124 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS124)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS124_SOUTH_SYSTEM_STATUS_DEMOD (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS124_SOUTH_SYSTEM_STATUS_DEMOD__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS125 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS125)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS125_SOUTH_SYSTEM_STATUS_MINOR_CUT_ID (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS125_SOUTH_SYSTEM_STATUS_MINOR_CUT_ID__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS126 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS126)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS126_SOUTH_SYSTEM_STATUS_THS_DCORRECT (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS126_SOUTH_SYSTEM_STATUS_THS_DCORRECT__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS127 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS127)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS127_SOUTH_SYSTEM_STATUS_PM_SPEED (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS127_SOUTH_SYSTEM_STATUS_PM_SPEED__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB0 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB1 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB2 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB3 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB4 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB4__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB5 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB5__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB6 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB6__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB7 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG128_CUST_DISABLE_IB7__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129_CUST_DISABLE_TSOUT0 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129_CUST_DISABLE_TSOUT0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129_TSOUT0_REQ (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG129_TSOUT0_REQ__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130_CUST_DISABLE_TSOUT1 (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130_CUST_DISABLE_TSOUT1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130_TSOUT1_REQ (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG130_TSOUT1_REQ__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG131 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG131)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG131_CLK_FRC0_EXT_SRC_SEL (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG131_CLK_FRC0_EXT_SRC_SEL__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG132 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG132)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG132_CLK_FRC1_EXT_SRC_SEL (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG132*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG132_CLK_FRC1_EXT_SRC_SEL__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_RESERVED144 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_RESERVED144)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160_TSMUX_SEL (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160_TSMUX_SEL__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160_RESERVED_FOR_9TH_STREAM (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG160_RESERVED_FOR_9TH_STREAM__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS176 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS176)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG192 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG192)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG192_PROM_REF_COUNTER_VALUE (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG192*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG192_PROM_REF_COUNTER_VALUE__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG193 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG193)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG193_PROM_SENS_CONTROL_VALUE (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG193*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG193_PROM_SENS_CONTROL_VALUE__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG194 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG194)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG194_PROM_MODE (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG194*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG194_PROM_MODE__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208 (SYSCONFIGS[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208_PROM_DATAREADY (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208_PROM_DATAREADY__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208_PROM_SENSOR_STAT_O (SYSCONFIGS[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_STATUS208_PROM_SENSOR_STAT_O__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_POUT(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_POUT)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_POUT_PIO_OUT_BITS(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_POUT*(1<<16) + FSTID135_PIO_POUT_PIO_OUT_BITS__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_POUT_SET(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_POUT_SET)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_POUT_SET_POUT_SET(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_POUT_SET*(1<<16) + FSTID135_PIO_POUT_SET_POUT_SET__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_POUT_RESET(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_POUT_RESET)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_POUT_RESET_POUT_RST(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_POUT_RESET*(1<<16) + FSTID135_PIO_POUT_RESET_POUT_RST__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PIO_IN(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PIO_IN)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PIO_IN_PIO_IN(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PIO_IN*(1<<16) + FSTID135_PIO_PIO_IN_PIO_IN__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC0(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC0)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC0_CONFIG_0(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC0*(1<<16) + FSTID135_PIO_PC0_CONFIG_0__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC0_SET(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC0_SET)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC0_SET_PC0_SET(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC0_SET*(1<<16) + FSTID135_PIO_PC0_SET_PC0_SET__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC0_RST(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC0_RST)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC0_RST_PC0_RST(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC0_RST*(1<<16) + FSTID135_PIO_PC0_RST_PC0_RST__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC1(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC1)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC1_CONFIG_1(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC1*(1<<16) + FSTID135_PIO_PC1_CONFIG_1__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC1_SET(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC1_SET)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC1_SET_PC1_SET(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC1_SET*(1<<16) + FSTID135_PIO_PC1_SET_PC1_SET__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC1_RST(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC1_RST)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC1_RST_PC1_RST(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC1_RST*(1<<16) + FSTID135_PIO_PC1_RST_PC1_RST__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC2(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC2)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC2_CONFIG_2(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC2*(1<<16) + FSTID135_PIO_PC2_CONFIG_2__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC2_SET(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC2_SET)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC2_SET_PC2_SET(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC2_SET*(1<<16) + FSTID135_PIO_PC2_SET_PC2_SET__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PC2_RST(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PC2_RST)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PC2_RST_PC2_RST(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PC2_RST*(1<<16) + FSTID135_PIO_PC2_RST_PC2_RST__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PCOMP(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PCOMP)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PCOMP_PCOMP(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PCOMP*(1<<16) + FSTID135_PIO_PCOMP_PCOMP__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PCOMP_SET(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PCOMP_SET)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PCOMP_SET_PCOMP_SET(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PCOMP_SET*(1<<16) + FSTID135_PIO_PCOMP_SET_PCOMP_SET__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PCOMP_RST(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PCOMP_RST)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PCOMP_RST_PCOMP_RST(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PCOMP_RST*(1<<16) + FSTID135_PIO_PCOMP_RST_PCOMP_RST__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PMASK(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PMASK)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PMASK_MASK(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PMASK*(1<<16) + FSTID135_PIO_PMASK_MASK__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PMASK_SET(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PMASK_SET)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PMASK_SET_PMASK_SET(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PMASK_SET*(1<<16) + FSTID135_PIO_PMASK_SET_PMASK_SET__MASK)

#define REG_RSTID135_X5BANKPIOSOUTHPIO_PMASK_RST(PATH) (X5BANKPIOSOUTH[PATH-1] + RSTID135_PIO_PMASK_RST)
#define FLD_FSTID135_X5BANKPIOSOUTHPIO_PMASK_RST_PMASK_RST(PATH) (X5BANKPIOSOUTH[PATH-1]*(1<<16) + RSTID135_PIO_PMASK_RST*(1<<16) + FSTID135_PIO_PMASK_RST_PMASK_RST__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_0_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_0_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_1_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_1_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_2_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_2_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_3_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1000_PIO1_3_SELECTOR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_0_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_0_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_1_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_1_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_2_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_2_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_3_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_3_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_4_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_4_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_5_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1001_PIO4_5_SELECTOR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_0_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_0_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_1_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_1_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_2_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_2_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_3_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_3_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_4_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_4_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_5_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1002_PIO5_5_SELECTOR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_0_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_0_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_1_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_1_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_2_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_2_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_3_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_3_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_4_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_4_SELECTOR__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_5_SELECTOR (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1003_PIO6_5_SELECTOR__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_0_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_0_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_1_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_1_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_2_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_2_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_3_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO1_3_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_0_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_0_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_1_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_1_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_2_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_2_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_3_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_3_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_4_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_4_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_5_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO4_5_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_0_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_0_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_1_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_1_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_2_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_2_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_3_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_3_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_4_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_4_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_5_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO5_5_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_0_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_0_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_1_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_1_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_2_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_2_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_3_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_3_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_4_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_4_OE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_5_OE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1040_SYSCFG_PIO6_5_OE__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_0_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_0_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_1_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_1_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_2_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_2_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_3_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO1_3_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_0_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_0_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_1_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_1_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_2_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_2_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_3_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_3_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_4_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_4_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_5_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO4_5_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_0_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_0_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_1_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_1_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_2_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_2_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_3_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_3_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_4_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_4_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_5_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO5_5_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_0_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_0_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_1_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_1_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_2_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_2_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_3_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_3_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_4_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_4_PU__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_5_PU (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1050_SYSCFG_PIO6_5_PU__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1055 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1055)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_0_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_0_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_1_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_1_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_2_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_2_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_3_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO1_3_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_0_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_0_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_1_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_1_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_2_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_2_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_3_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_3_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_4_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_4_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_5_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO4_5_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_0_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_0_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_1_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_1_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_2_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_2_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_3_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_3_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_4_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_4_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_5_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO5_5_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_0_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_0_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_1_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_1_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_2_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_2_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_3_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_3_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_4_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_4_OD__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_5_OD (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1060_SYSCFG_PIO6_5_OD__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1100_PIO1_0_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1101_PIO1_1_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1102_PIO1_2_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1103_PIO1_3_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1104_PIO1_4_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1105_PIO1_5_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1106_PIO1_6_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1107_PIO1_7_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1108_PIO4_0_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1109_PIO4_1_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1110_PIO4_2_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1111_PIO4_3_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1112_PIO4_4_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1113_PIO4_5_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1114_PIO4_6_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1115_PIO4_7_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1116_PIO5_0_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1117_PIO5_1_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1118_PIO5_2_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1119_PIO5_3_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1120_PIO5_4_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1121_PIO5_5_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1122_PIO5_6_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1123_PIO5_7_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1124_PIO6_0_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1125_PIO6_1_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1126_PIO6_2_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1127_PIO6_3_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1128_PIO6_4_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1129_PIO6_5_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1130_PIO6_6_CFG_RETIME__MASK)

#define REG_RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131 (PIOSOUTHMUX[0] + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLK_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLK_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLK_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLK_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLKNOTDATA (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_CLKNOTDATA__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_0 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_0__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_1 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_1__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_2 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_2__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_3 (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_3__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_INNOTOUT (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DELAY_INNOTOUT__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DOUBLE_EDGE (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_DOUBLE_EDGE__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_INVERTCLK (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_INVERTCLK__MASK)
#define FLD_FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_RETIME (PIOSOUTHMUX[0]*(1<<16) + RSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131*(1<<16) + FSTID135_SYSCFG_SOUTH_SYSTEM_CONFIG1131_PIO6_7_CFG_RETIME__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG0 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG0)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG1 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG1)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG2 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG2)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG3 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG3)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG4 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG4)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG5 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG5)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR0SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR0SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_RESERVED_5_3 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_RESERVED_5_3__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR0ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR0ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR0STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR0STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR1SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR1SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_RESERVED_13_11 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_RESERVED_13_11__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR1ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR1ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR1STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR1STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR2SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR2SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_RESERVED_21_19 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_RESERVED_21_19__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR2ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR2ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR2STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR2STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR3SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR3SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_RESERVED_29_27 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_RESERVED_29_27__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR3ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR3ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR3STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG6_CROSSBAR3STATUS__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR4SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR4SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_RESERVED_5_3 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_RESERVED_5_3__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR4ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR4ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR4STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR4STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR5SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR5SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_RESERVED_13_11 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_RESERVED_13_11__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR5ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR5ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR5STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR5STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR6SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR6SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_RESERVED_21_19 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_RESERVED_21_19__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR6ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR6ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR6STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR6STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR7SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR7SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_RESERVED_29_27 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_RESERVED_29_27__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR7ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR7ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR7STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG7_CROSSBAR7STATUS__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR8SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR8SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_RESERVED_5_3 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_RESERVED_5_3__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR8ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR8ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR8STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR8STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR9SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR9SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_RESERVED_13_11 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_RESERVED_13_11__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR9ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR9ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR9STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR9STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR10SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR10SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_RESERVED_21_19 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_RESERVED_21_19__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR10ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR10ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR10STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR10STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR11SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR11SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_RESERVED_29_27 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_RESERVED_29_27__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR11ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR11ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR11STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG8_CROSSBAR11STATUS__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR12SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR12SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_RESERVED_5_3 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_RESERVED_5_3__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR12ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR12ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR12STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR12STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR13SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR13SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_RESERVED_13_11 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_RESERVED_13_11__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR13ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR13ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR13STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR13STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR14SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR14SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_RESERVED_21_19 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_RESERVED_21_19__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR14ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR14ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR14STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR14STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR15SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR15SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_RESERVED_29_27 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_RESERVED_29_27__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR15ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR15ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR15STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG9_CROSSBAR15STATUS__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG10 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG10)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG11 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG11)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG12 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG12)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG13 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG13)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG14 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG14)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG15 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG15)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG16 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG16)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG17 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG17)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG18 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG18)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG19 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG19)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG20 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG20)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG21 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG21)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG22 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG22)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG22_PREDIV0DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG22*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG22_PREDIV0DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG22_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG22*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG22_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG23 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG23)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG23_PREDIV1DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG23*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG23_PREDIV1DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG23_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG23*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG23_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG24 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG24)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG24_PREDIV2DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG24*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG24_PREDIV2DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG24_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG24*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG24_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG25 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG25)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG25_PREDIV3DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG25*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG25_PREDIV3DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG25_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG25*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG25_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG26 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG26)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG26_PREDIV4DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG26*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG26_PREDIV4DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG26_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG26*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG26_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG27 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG27)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG27_PREDIV5DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG27*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG27_PREDIV5DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG27_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG27*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG27_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG28 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG28)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG28_PREDIV6DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG28*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG28_PREDIV6DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG28_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG28*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG28_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG29 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG29)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG29_PREDIV7DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG29*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG29_PREDIV7DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG29_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG29*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG29_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG30 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG30)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG30_PREDIV8DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG30*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG30_PREDIV8DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG30_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG30*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG30_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG31 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG31)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG31_PREDIV9DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG31*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG31_PREDIV9DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG31_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG31*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG31_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG32 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG32)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG32_PREDIV10DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG32*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG32_PREDIV10DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG32_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG32*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG32_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG33 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG33)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG33_PREDIV11DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG33*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG33_PREDIV11DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG33_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG33*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG33_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG34 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG34)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG34_PREDIV12DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG34*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG34_PREDIV12DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG34_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG34*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG34_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG35 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG35)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG35_PREDIV13DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG35*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG35_PREDIV13DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG35_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG35*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG35_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG36 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG36)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG36_PREDIV14DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG36*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG36_PREDIV14DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG36_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG36*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG36_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG37 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG37)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG37_PREDIV15DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG37*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG37_PREDIV15DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG37_RESERVED_31_10 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG37*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG37_RESERVED_31_10__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG38 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG38)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG39 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG39)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG40 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG40)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG41 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG41)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG42 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG42)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG43 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG43)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG44 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG44)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG45 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG45)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG46 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG46)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG47 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG47)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG48 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG48)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG49 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG49)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG50 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG50)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG51 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG51)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG52 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG52)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG53 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG53)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG54 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG54)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG55 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG55)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG56 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG56)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG57 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG57)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG58 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG58)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG59 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG59)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG60 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG60)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG61 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG61)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG62 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG62)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG63 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG63)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG64 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG64)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG65 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG65)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG66 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG66)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG67 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG67)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG68 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG68)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG69 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG69)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG70 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG70)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG71 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG71)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG72 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG72)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG73 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG73)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG74 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG74)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG75 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG75)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG76 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG76)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG77 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG77)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG78 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG78)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG79 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG79)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG80 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG80)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG81 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG81)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG82 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG82)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG83 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG83)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG84 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG84)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG85 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG85)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV0STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV0STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV1STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV1STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV2STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV2STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV3STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV3STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV4STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV4STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV5STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV5STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV6STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV6STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV7STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV7STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV8STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV8STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV9STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV9STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV10STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV10STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV11STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV11STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV12STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV12STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV13STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV13STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV14STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV14STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV15STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_PREDIV15STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_RESERVED_31_16 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG86_RESERVED_31_16__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG87 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG87)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG88 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG88)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89_FINDIV0DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89_FINDIV0DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89_FINDIV0ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89_FINDIV0ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG89_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90_FINDIV1DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90_FINDIV1DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90_FINDIV1ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90_FINDIV1ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG90_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91_FINDIV2DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91_FINDIV2DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91_FINDIV2ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91_FINDIV2ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG91_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92_FINDIV3DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92_FINDIV3DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92_FINDIV3ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92_FINDIV3ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG92_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93_FINDIV4DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93_FINDIV4DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93_FINDIV4ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93_FINDIV4ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG93_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94_FINDIV5DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94_FINDIV5DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94_FINDIV5ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94_FINDIV5ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG94_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95_FINDIV6DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95_FINDIV6DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95_FINDIV6ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95_FINDIV6ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG95_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96_FINDIV7DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96_FINDIV7DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96_FINDIV7ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96_FINDIV7ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG96_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97_FINDIV8DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97_FINDIV8DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97_FINDIV8ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97_FINDIV8ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG97_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98_FINDIV9DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98_FINDIV9DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98_FINDIV9ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98_FINDIV9ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG98_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99_FINDIV10DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99_FINDIV10DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99_FINDIV10ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99_FINDIV10ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG99_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100_FINDIV11DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100_FINDIV11DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100_FINDIV11ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100_FINDIV11ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG100_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101_FINDIV12DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101_FINDIV12DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101_FINDIV12ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101_FINDIV12ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG101_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102_FINDIV13DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102_FINDIV13DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102_FINDIV13ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102_FINDIV13ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG102_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103_FINDIV14DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103_FINDIV14DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103_FINDIV14ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103_FINDIV14ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG103_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104_FINDIV15DIVBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104_FINDIV15DIVBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104_FINDIV15ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104_FINDIV15ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104_RESERVED_31_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG104_RESERVED_31_7__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG105 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG105)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG106 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG106)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG107 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG107)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG108 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG108)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG109 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG109)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG110 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG110)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG111 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG111)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG112 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG112)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG113 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG113)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG114 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG114)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG115 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG115)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG116 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG116)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG117 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG117)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG118 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG118)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG119 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG119)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG120 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG120)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG121 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG121)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG122 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG122)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG123 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG123)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG124 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG124)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG125 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG125)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG126 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG126)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG127 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG127)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG128 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG128)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG129 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG129)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG130 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG130)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG131 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG131)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG132 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG132)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG133 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG133)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG134 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG134)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG135 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG135)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG136 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG136)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG137 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG137)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG138 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG138)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG139 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG139)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG140 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG140)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG141 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG141)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG142 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG142)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG143 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG143)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG144 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG144)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG145 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG145)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG146 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG146)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG147 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG147)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG148 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG148)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG149 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG149)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG150 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG150)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG151 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG151)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG152 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG152)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV0STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV0STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV1STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV1STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV2STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV2STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV3STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV3STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV4STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV4STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV5STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV5STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV6STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV6STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV7STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV7STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV8STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV8STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV9STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV9STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV10STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV10STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV11STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV11STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV12STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV12STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV13STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV13STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV14STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV14STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV15STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_FINDIV15STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_RESERVED_31_16 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG153_RESERVED_31_16__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG154 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG154)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG155 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG155)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG156 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG156)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG157 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG157)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG158 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG158)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG159 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG159)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEOBSINT0SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEOBSINT0SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_RESERVED_7_6 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_RESERVED_7_6__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEOBSEXT0SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEOBSEXT0SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_RESERVED_14_12 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_RESERVED_14_12__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEINTEXT0SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEINTEXT0SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_OBSINTEXT0SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_OBSINTEXT0SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEMUX0INVERT (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEMUX0INVERT__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_OBSMUX0INVERT (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_OBSMUX0INVERT__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEMUX0DIV (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEMUX0DIV__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_OBSMUX0DIV (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_OBSMUX0DIV__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEMUX0ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEMUX0ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_OBSMUX0ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_OBSMUX0ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEDYNOUTSEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_JEDYNOUTSEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_RESERVED_31_30 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG160_RESERVED_31_30__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEOBSINT1SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEOBSINT1SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_RESERVED_7_6 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_RESERVED_7_6__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEOBSEXT1SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEOBSEXT1SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_RESERVED_14_12 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_RESERVED_14_12__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEINTEXT1SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEINTEXT1SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_OBSINTEXT1SEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_OBSINTEXT1SEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEMUX1INVERT (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEMUX1INVERT__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_OBSMUX1INVERT (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_OBSMUX1INVERT__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEMUX1DIV (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEMUX1DIV__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_OBSMUX1DIV (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_OBSMUX1DIV__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEMUX1ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JEMUX1ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_OBSMUX1ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_OBSMUX1ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JE_ENABLE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_JE_ENABLE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_RESERVED_31_28 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG161_RESERVED_31_28__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEINFFSEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEINFFSEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_RESERVED_3 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_RESERVED_3__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEXXFOUTSEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEXXFOUTSEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_RESERVED_7 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_RESERVED_7__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JELOCKSEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JELOCKSEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_RESERVED_11 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_RESERVED_11__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEANDLOCKSSEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEANDLOCKSSEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEORLOCKSSEL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEORLOCKSSEL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEANDLOCKSSTATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEANDLOCKSSTATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEORLOCKSSTATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JEORLOCKSSTATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JELOCKSUSED (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_JELOCKSUSED__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_RESERVED_31_21 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG162_RESERVED_31_21__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163_JE_PLL_BIST_RUN (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163_JE_PLL_BIST_RUN__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163_JE_WORD_PATT (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163_JE_WORD_PATT__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163_JE_WORD_MASK (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163_JE_WORD_MASK__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163_RESERVED_31_25 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG163_RESERVED_31_25__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG164 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG164)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG164_JE_THRES_LO (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG164*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG164_JE_THRES_LO__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG164_JE_THRES_HI (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG164*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG164_JE_THRES_HI__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_EDGE_MODE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_EDGE_MODE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_SR_MODE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_SR_MODE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_STOP_PULSE_MODE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_STOP_PULSE_MODE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_VISU_MODE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_VISU_MODE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_BCC_DIV (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_BCC_DIV__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_BEC_CODE_STOP (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_BEC_CODE_STOP__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_DC_COMP_MUX (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_DC_COMP_MUX__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_SELECT_OUT (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_JE_SELECT_OUT__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_RESERVED_31_22 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG165_RESERVED_31_22__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166_JE_REGOUT (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166_JE_REGOUT__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166_JE_STATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166_JE_STATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166_RESERVED_31_20 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG166_RESERVED_31_20__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG167 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_FCG_CONFIG167)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_RESET (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_RESET__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_RESERVED_7_4 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_RESERVED_7_4__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_STANDBY (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_STANDBY__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_RESERVED_15_13 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_RESERVED_15_13__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_QUALCONTROL (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_QUALCONTROL__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_RESERVED_23_17 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_RESERVED_23_17__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_LOCK (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_LOCK__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_REFCLKDETRESETLSN (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_REFCLKDETRESETLSN__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_REFCLKDETSTATUS (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_REFCLKDETSTATUS__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_REFCLKDETRESETMSN (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG0_GFG0_REFCLKDETRESETMSN__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1_RESERVED_15_0 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1_RESERVED_15_0__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1_GFG0_FBDIV (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1_GFG0_FBDIV__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1_RESERVED_31_19 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG1_RESERVED_31_19__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG2 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG2)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3_GFG0_STROBE (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3_GFG0_STROBE__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3_RESERVED_7_4 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3_RESERVED_7_4__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3_RESERVED_31_8 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG3_RESERVED_31_8__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG4 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG4)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG5 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG5)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG5_GFG0_CHAN0CON (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG5*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG5_GFG0_CHAN0CON__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG5_RESERVED_31_25 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG5*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG5_RESERVED_31_25__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG6 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG6)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG6_GFG0_CHAN1CON (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG6_GFG0_CHAN1CON__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG6_RESERVED_31_25 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG6*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG6_RESERVED_31_25__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG7 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG7)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG7_GFG0_CHAN2CON (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG7_GFG0_CHAN2CON__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG7_RESERVED_31_25 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG7*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG7_RESERVED_31_25__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG8 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG8)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG8_GFG0_CHAN3CON (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG8_GFG0_CHAN3CON__MASK)
#define FLD_FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG8_RESERVED_31_25 (CLOCKGENNORTH[0]*(1<<16) + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG8*(1<<16) + FSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG8_RESERVED_31_25__MASK)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG9 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_GFG0_CONFIG9)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG0 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG0)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG1 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG1)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG2 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG2)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG3 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG3)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG4 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG4)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG5 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG5)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG6 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG6)

#define REG_RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG7 (CLOCKGENNORTH[0] + RSTID135_OXFORD_FLEXCLKGEN_A_EXT_CONFIG7)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_STATUS (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_STATUS)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_STATUS_IBERROR (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_STATUS*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_STATUS_IBERROR__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_STATUS (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_STATUS)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_STATUS_TSDMAERROR (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_STATUS*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_STATUS_TSDMAERROR__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_MASK (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_MASK_IBERROR (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_MASK*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_ERR_MASK_IBERROR__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_MASK (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_MASK_TSDMAERROR (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_MASK*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_ERR_MASK_TSDMAERROR__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_CLKEN (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_CLKEN)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_CLKEN_IBENABLE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_CLKEN*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_INPUT_CLKEN_IBENABLE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_CLKEN (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_CLKEN)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_CLKEN_TSDMAENABLE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_CLKEN*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_OTHER_CLKEN_TSDMAENABLE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_IB (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_IB)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_IB_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_IB*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_IB_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_MIB (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_MIB)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_MIB_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_MIB*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_MIB_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_SWTS (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_SWTS)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_SWTS_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_SWTS*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_SWTS_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TSOUT (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TSOUT)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TSOUT_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TSOUT*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TSOUT_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_CCSC (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_CCSC)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_CCSC_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_CCSC*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_CCSC_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_RAM (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_RAM)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_RAM_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_RAM*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_RAM_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TP (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TP)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TP_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TP*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_NUM_TP_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO_STREAM_NUM__MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO_RAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_INFO_RAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_DMA_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_DMA_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_DMA_INFO_TSDMA_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_DMA_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB0_DMA_INFO_TSDMA_STREAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO_STREAM_NUM__MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO_RAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_INFO_RAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_DMA_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_DMA_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_DMA_INFO_TSDMA_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_DMA_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB1_DMA_INFO_TSDMA_STREAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO_STREAM_NUM__MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO_RAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_INFO_RAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_DMA_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_DMA_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_DMA_INFO_TSDMA_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_DMA_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB2_DMA_INFO_TSDMA_STREAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO_STREAM_NUM__MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO_RAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_INFO_RAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_DMA_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_DMA_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_DMA_INFO_TSDMA_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_DMA_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB3_DMA_INFO_TSDMA_STREAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO_STREAM_NUM__MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO_RAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_INFO_RAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_DMA_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_DMA_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_DMA_INFO_TSDMA_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_DMA_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB4_DMA_INFO_TSDMA_STREAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO_STREAM_NUM__MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO_RAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_INFO_RAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_DMA_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_DMA_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_DMA_INFO_TSDMA_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_DMA_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB5_DMA_INFO_TSDMA_STREAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO_STREAM_NUM__MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO_RAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_INFO_RAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_DMA_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_DMA_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_DMA_INFO_TSDMA_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_DMA_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB6_DMA_INFO_TSDMA_STREAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO_STREAM_NUM__MASK)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO_RAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_INFO_RAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_DMA_INFO (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_DMA_INFO)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_DMA_INFO_TSDMA_STREAM_NUM (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_DMA_INFO*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_IB7_DMA_INFO_TSDMA_STREAM_NUM__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_BASE (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_BASE)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_BASE_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_BASE*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_BASE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_SIZE (STFECONFIG[0] + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_SIZE)
#define FLD_FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_SIZE_VALUE (STFECONFIG[0]*(1<<16) + RSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_SIZE*(1<<16) + FSTID135_C8SECTPFE_SYS_C8SECTPFE_SYS_CFG_RAM0_SIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_SERIAL_NOT_PARALLEL(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_SERIAL_NOT_PARALLEL__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_BYTE_ENDIANNESS(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_BYTE_ENDIANNESS__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_ASYNC_NOT_SYNC(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_ASYNC_NOT_SYNC__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_ALIGN_BYTE_SOP(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_ALIGN_BYTE_SOP__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_INVERT_TSCLK(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_INVERT_TSCLK__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_IGNORE_ERROR_IN_BYTE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_IGNORE_ERROR_IN_BYTE__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_IGNORE_ERROR_IN_PKT(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_IGNORE_ERROR_IN_PKT__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_IGNORE_ERROR_AT_SOP(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_INPUT_FORMAT_CONFIG_IGNORE_ERROR_AT_SOP__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG_SYNC(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG_SYNC__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG_DROP(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG_DROP__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG_TOKEN(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG_TOKEN__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG_ENDIANNESS(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SLD_CONFIG_ENDIANNESS__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES_ENABLE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES_ENABLE__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES_COUNTER(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES_COUNTER__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES_TAG_HEADER(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_TAG_BYTES_TAG_HEADER__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER_OFFSET(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER_OFFSET__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER_NUM_BITS(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER_NUM_BITS__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER_ENABLE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PID_FILTER_ENABLE__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PKT_LENGTH(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PKT_LENGTH)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PKT_LENGTH_VALUE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PKT_LENGTH*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PKT_LENGTH_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_START(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_START)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_START_VALUE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_START*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_START_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_END(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_END)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_END_VALUE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_END*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_BUFFER_END_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_READ_POINTER(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_READ_POINTER)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_READ_POINTER_VALUE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_READ_POINTER*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_READ_POINTER_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_WRITE_POINTER(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_WRITE_POINTER)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_WRITE_POINTER_VALUE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_WRITE_POINTER*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_WRITE_POINTER_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD_VALUE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD_VALUE__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD_LOW_PRI(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD_LOW_PRI__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD_HIGH_PRI(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_PRIORITY_THRESHOLD_HIGH_PRI__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_FIFO_OVERFLOW(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_FIFO_OVERFLOW__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_BUFFER_OVERFLOW(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_BUFFER_OVERFLOW__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_OUT_OF_ORDER_RP(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_OUT_OF_ORDER_RP__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_PID_OVERFLOW(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_PID_OVERFLOW__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_PKT_OVERFLOW(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_PKT_OVERFLOW__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_ERROR_PACKETS(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_ERROR_PACKETS__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_SHORT_PACKETS(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_SHORT_PACKETS__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_LOCKED(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_STATUS_LOCKED__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_FIFO_OVERFLOW(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_FIFO_OVERFLOW__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_BUFFER_OVERFLOW(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_BUFFER_OVERFLOW__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_OUT_OF_ORDER_RP(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_OUT_OF_ORDER_RP__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_PID_OVERFLOW(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_PID_OVERFLOW__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_PKT_OVERFLOW(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_PKT_OVERFLOW__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_ERROR_PACKETS(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_ERROR_PACKETS__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_SHORT_PACKETS(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_MASK_SHORT_PACKETS__MASK)

#define REG_RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM(PATH) (C8SECTPFE_IB[PATH-1] + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM_ENABLE(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM_ENABLE__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM_RESET(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM_RESET__MASK)
#define FLD_FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM_BYPASS(PATH) (C8SECTPFE_IB[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM*(1<<16) + FSTID135_C8SECTPFE_IB_C8SECTPFE_IB_SYSTEM_BYPASS__MASK)

#define REG_RSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_LSW(PATH) (C8SECTPFE_TC[PATH-1] + RSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_LSW)
#define FLD_FSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_LSW_VALUE(PATH) (C8SECTPFE_TC[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_LSW*(1<<16) + FSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_LSW_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_MSW(PATH) (C8SECTPFE_TC[PATH-1] + RSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_MSW)
#define FLD_FSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_MSW_VALUE(PATH) (C8SECTPFE_TC[PATH-1]*(1<<16) + RSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_MSW*(1<<16) + FSTID135_C8SECTPFE_TC_C8SECTPFE_TC_COUNTER_MSW_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_BASE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_BASE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_BASE_BUFBASE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_BASE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_BASE_BUFBASE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_TOP (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_TOP)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_TOP_BUFTOP (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_TOP*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_TOP_BUFTOP__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_PKTSIZE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_PKTSIZE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_PKTSIZE_VALUE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_PKTSIZE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_PKTSIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_FORMAT_TAGGED (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_FORMAT_TAGGED__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM0_STATUS_IDLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_BASE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_BASE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_BASE_BUFBASE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_BASE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_BASE_BUFBASE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_TOP (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_TOP)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_TOP_BUFTOP (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_TOP*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_TOP_BUFTOP__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_PKTSIZE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_PKTSIZE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_PKTSIZE_VALUE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_PKTSIZE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_PKTSIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_FORMAT_TAGGED (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_FORMAT_TAGGED__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM1_STATUS_IDLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_BASE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_BASE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_BASE_BUFBASE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_BASE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_BASE_BUFBASE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_TOP (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_TOP)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_TOP_BUFTOP (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_TOP*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_TOP_BUFTOP__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_PKTSIZE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_PKTSIZE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_PKTSIZE_VALUE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_PKTSIZE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_PKTSIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_FORMAT_TAGGED (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_FORMAT_TAGGED__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM2_STATUS_IDLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_BASE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_BASE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_BASE_BUFBASE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_BASE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_BASE_BUFBASE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_TOP (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_TOP)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_TOP_BUFTOP (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_TOP*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_TOP_BUFTOP__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_PKTSIZE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_PKTSIZE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_PKTSIZE_VALUE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_PKTSIZE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_PKTSIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_FORMAT_TAGGED (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_FORMAT_TAGGED__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM3_STATUS_IDLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_BASE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_BASE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_BASE_BUFBASE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_BASE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_BASE_BUFBASE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_TOP (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_TOP)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_TOP_BUFTOP (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_TOP*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_TOP_BUFTOP__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_PKTSIZE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_PKTSIZE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_PKTSIZE_VALUE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_PKTSIZE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_PKTSIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_FORMAT_TAGGED (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_FORMAT_TAGGED__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM4_STATUS_IDLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_BASE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_BASE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_BASE_BUFBASE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_BASE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_BASE_BUFBASE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_TOP (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_TOP)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_TOP_BUFTOP (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_TOP*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_TOP_BUFTOP__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_PKTSIZE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_PKTSIZE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_PKTSIZE_VALUE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_PKTSIZE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_PKTSIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_FORMAT_TAGGED (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_FORMAT_TAGGED__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM5_STATUS_IDLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_BASE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_BASE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_BASE_BUFBASE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_BASE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_BASE_BUFBASE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_TOP (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_TOP)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_TOP_BUFTOP (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_TOP*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_TOP_BUFTOP__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_PKTSIZE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_PKTSIZE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_PKTSIZE_VALUE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_PKTSIZE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_PKTSIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_FORMAT_TAGGED (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_FORMAT_TAGGED__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM6_STATUS_IDLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_BASE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_BASE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_BASE_BUFBASE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_BASE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_BASE_BUFBASE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_TOP (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_TOP)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_TOP_BUFTOP (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_TOP*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_TOP_BUFTOP__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_PKTSIZE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_PKTSIZE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_PKTSIZE_VALUE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_PKTSIZE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_PKTSIZE_VALUE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_FORMAT_TAGGED (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_FORMAT_TAGGED__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_STRM7_STATUS_IDLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_ROUTE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_ROUTE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_ROUTE_ENABLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_ROUTE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_ROUTE_ENABLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FIFOTRIG (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FIFOTRIG)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FIFOTRIG_TRIGGER (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FIFOTRIG*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FIFOTRIG_TRIGGER__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_BYPASS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_BYPASS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_BYPASS_SELECT (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_BYPASS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_BYPASS_SELECT__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_BYPASS_ENABLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_BYPASS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_BYPASS_ENABLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_CLKDIV (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_CLKDIV)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_CLKDIV_RATIO (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_CLKDIV*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_CLKDIV_RATIO__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_CLKDIV_DATA_DELAY (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_CLKDIV*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_CLKDIV_DATA_DELAY__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_SERIAL_NOT_PARALLEL (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_SERIAL_NOT_PARALLEL__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_BYTE_ENDIANNESS (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_BYTE_ENDIANNESS__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_REMOVE_TAG (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_REMOVE_TAG__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_COMPLETE_BYTE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_COMPLETE_BYTE__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_SOP_FIRST_BIT (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_SOP_FIRST_BIT__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_WAIT_WHOLE_PACKET (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_FORMAT_WAIT_WHOLE_PACKET__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_STATUS_IDLE__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_STATUS_DMA_OVERFLOW (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST0_STATUS_DMA_OVERFLOW__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_ROUTE (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_ROUTE)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_ROUTE_ENABLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_ROUTE*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_ROUTE_ENABLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FIFOTRIG (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FIFOTRIG)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FIFOTRIG_TRIGGER (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FIFOTRIG*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FIFOTRIG_TRIGGER__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_BYPASS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_BYPASS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_BYPASS_SELECT (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_BYPASS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_BYPASS_SELECT__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_BYPASS_ENABLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_BYPASS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_BYPASS_ENABLE__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_CLKDIV (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_CLKDIV)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_CLKDIV_RATIO (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_CLKDIV*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_CLKDIV_RATIO__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_CLKDIV_DATA_DELAY (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_CLKDIV*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_CLKDIV_DATA_DELAY__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_SERIAL_NOT_PARALLEL (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_SERIAL_NOT_PARALLEL__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_BYTE_ENDIANNESS (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_BYTE_ENDIANNESS__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_REMOVE_TAG (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_REMOVE_TAG__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_COMPLETE_BYTE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_COMPLETE_BYTE__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_SOP_FIRST_BIT (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_SOP_FIRST_BIT__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_WAIT_WHOLE_PACKET (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_FORMAT_WAIT_WHOLE_PACKET__MASK)

#define REG_RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_STATUS (C8SECTPFE_TSDMA[0] + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_STATUS)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_STATUS_IDLE (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_STATUS_IDLE__MASK)
#define FLD_FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_STATUS_DMA_OVERFLOW (C8SECTPFE_TSDMA[0]*(1<<16) + RSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_STATUS*(1<<16) + FSTID135_C8SECTPFE_TSDMA_C8SECTPFE_TSDMA_DEST1_STATUS_DMA_OVERFLOW__MASK)

#endif
